ARM: prima2: build reset code standalone
The prima2 platform code currently depends on the rstc implementation and that in turn depends on the reset controller framework. This removes the platform dependency by letting the driver access arm_pm_restart directly to turn the driver into a standalone entity, and also removes the dependency on the reset controller framework by using "if (IS_ENABLED(CONFIG_RESET_CONTROLLER))". This will cause all code that is used for the reset controller to be dropped by the compiler if the framework is disabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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397d77a566
commit
48352e5286
3 changed files with 13 additions and 13 deletions
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@ -37,7 +37,6 @@ DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
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.map_io = sirfsoc_map_io,
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.init_late = sirfsoc_init_late,
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.dt_compat = atlas6_dt_match,
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.restart = sirfsoc_restart,
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MACHINE_END
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#endif
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@ -53,7 +52,6 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
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.dma_zone_size = SZ_256M,
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.init_late = sirfsoc_init_late,
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.dt_compat = prima2_dt_match,
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.restart = sirfsoc_restart,
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MACHINE_END
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#endif
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@ -69,6 +67,5 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
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.map_io = sirfsoc_map_io,
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.init_late = sirfsoc_init_late,
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.dt_compat = marco_dt_match,
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.restart = sirfsoc_restart,
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MACHINE_END
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#endif
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@ -23,7 +23,6 @@ extern void sirfsoc_secondary_startup(void);
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extern void sirfsoc_cpu_die(unsigned int cpu);
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extern void __init sirfsoc_of_irq_init(void);
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extern void sirfsoc_restart(enum reboot_mode, const char *);
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extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
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#ifndef CONFIG_DEBUG_LL
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@ -17,9 +17,11 @@
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#include <linux/reboot.h>
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#include <linux/reset-controller.h>
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#include <asm/system_misc.h>
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#define SIRFSOC_RSTBIT_NUM 64
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void __iomem *sirfsoc_rstc_base;
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static void __iomem *sirfsoc_rstc_base;
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static DEFINE_MUTEX(rstc_lock);
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static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
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@ -71,6 +73,13 @@ static struct reset_controller_dev sirfsoc_reset_controller = {
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.nr_resets = SIRFSOC_RSTBIT_NUM,
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};
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#define SIRFSOC_SYS_RST_BIT BIT(31)
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static void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
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{
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writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
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}
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static int sirfsoc_rstc_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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@ -81,8 +90,10 @@ static int sirfsoc_rstc_probe(struct platform_device *pdev)
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}
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sirfsoc_reset_controller.of_node = np;
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arm_pm_restart = sirfsoc_restart;
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reset_controller_register(&sirfsoc_reset_controller);
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if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
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reset_controller_register(&sirfsoc_reset_controller);
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return 0;
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}
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@ -107,10 +118,3 @@ static int __init sirfsoc_rstc_init(void)
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return platform_driver_register(&sirfsoc_rstc_driver);
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}
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subsys_initcall(sirfsoc_rstc_init);
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#define SIRFSOC_SYS_RST_BIT BIT(31)
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void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
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{
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writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
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}
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