scsi: ncr5380: Increase register polling limit
If NCR5380_poll_politely() is called under irq lock, the polling time limit is clamped to avoid a spike in interrupt latency. When not under irq lock, the same polling time limit acts as the worst case delay between schedule() calls. During PDMA (under irq lock) I've found that the 10 ms time limit is sometimes too short, and leads to the error message, sd 0:0:0:0: [sda] tag#1 macscsi_pread: !REQ and !ACK This particular target identifies itself as a QUANTUM DAYTONA514S. It seems to be slower to assert ACK than the other targets I've tested. This patch solves the problem by increasing the polling timeout. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.com> Tested-by: Ondrej Zary <linux@rainbow-software.org> Tested-by: Michael Schmitz <schmitzmic@gmail.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -253,7 +253,7 @@ struct NCR5380_cmd {
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#define NCR5380_PIO_CHUNK_SIZE 256
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/* Time limit (ms) to poll registers when IRQs are disabled, e.g. during PDMA */
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#define NCR5380_REG_POLL_TIME 10
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#define NCR5380_REG_POLL_TIME 15
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static inline struct scsi_cmnd *NCR5380_to_scmd(struct NCR5380_cmd *ncmd_ptr)
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{
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