perf, x86: Fix PEBS enable/disable vs cpuc->enabled
We should never call ->enable with the pmu enabled, and we _can_ have ->disable called with the pmu enabled. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: paulus@samba.org Cc: eranian@google.com Cc: robert.richter@amd.com Cc: fweisbec@gmail.com LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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1 changed files with 3 additions and 2 deletions
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@ -338,7 +338,7 @@ static void intel_pmu_pebs_enable(struct perf_event *event)
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hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT;
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val |= 1ULL << hwc->idx;
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wrmsrl(MSR_IA32_PEBS_ENABLE, val);
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WARN_ON_ONCE(cpuc->enabled);
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if (x86_pmu.intel_cap.pebs_trap)
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intel_pmu_lbr_enable(event);
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@ -351,6 +351,7 @@ static void intel_pmu_pebs_disable(struct perf_event *event)
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u64 val = cpuc->pebs_enabled;
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val &= ~(1ULL << hwc->idx);
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if (cpuc->enabled)
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wrmsrl(MSR_IA32_PEBS_ENABLE, val);
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hwc->config |= ARCH_PERFMON_EVENTSEL_INT;
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