Linux 3.3-rc7
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.18 (GNU/Linux) iQEcBAABAgAGBQJPW8yUAAoJEHm+PkMAQRiGhFIH/RGUPxGmUkJv8EP5I4HDA4dJ c6/PrzZCHs8rxzYzvn7ojXqZGXTOAA5ZgS9A6LkJ2sxMFvgMnkpFi6B4CwMzizS3 vLWo/HNxbiTCNGFfQrhQB8O58uNI8wOBa87lrQfkXkDqN0cFhdjtIxeY1BD9LXIo qbWysGxCcZhJWHapsQ3NZaVJQnIK5vA/+mhyYP4HzbcHI3aWnbIEZ8GQKeY28Ch0 +pct5UQBjZavV5SujaW0Xd65oIiycm8XHAQw6FxQy//DfaabauWgFteR162Q/oew xxUBDOHF3nO1bdteHHaYqxig0j1MbIHsqxTnE/neR8UryF04//1SFF7DYuY/1pg= =SV5V -----END PGP SIGNATURE----- Merge tag 'v3.3-rc7' into sched/core Merge reason: merge back final fixes, prepare for the merge window. Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar
commit
47258cf3c4
302 changed files with 1921 additions and 984 deletions
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@ -7,9 +7,9 @@ Each LED is represented as a sub-node of the gpio-leds device. Each
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node's name represents the name of the corresponding LED.
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LED sub-node properties:
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- gpios : Should specify the LED's GPIO, see "Specifying GPIO information
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for devices" in Documentation/devicetree/booting-without-of.txt. Active
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low LEDs should be indicated using flags in the GPIO specifier.
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- gpios : Should specify the LED's GPIO, see "gpios property" in
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Documentation/devicetree/gpio.txt. Active low LEDs should be
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indicated using flags in the GPIO specifier.
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- label : (optional) The label for this LED. If omitted, the label is
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taken from the node name (excluding the unit address).
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- linux,default-trigger : (optional) This parameter, if present, is a
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@ -30,6 +30,7 @@ national National Semiconductor
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nintendo Nintendo
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nvidia NVIDIA
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nxp NXP Semiconductors
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picochip Picochip Ltd
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powervr Imagination Technologies
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qcom Qualcomm, Inc.
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ramtron Ramtron International
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@ -7,21 +7,29 @@ Supported chips:
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
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* IDT TSE2002B3, TS3000B3
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Prefix: 'tse2002b3', 'ts3000b3'
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* Atmel AT30TS00
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Prefix: 'at30ts00'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://www.idt.com/products/getdoc.cfm?docid=18715691
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http://www.idt.com/products/getdoc.cfm?docid=18715692
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http://www.atmel.com/Images/doc8585.pdf
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* IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
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Prefix: 'tse2002', 'ts3000'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
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http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
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http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
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http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
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* Maxim MAX6604
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Prefix: 'max6604'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
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* Microchip MCP9805, MCP98242, MCP98243, MCP9843
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Prefixes: 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
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* Microchip MCP9804, MCP9805, MCP98242, MCP98243, MCP9843
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Prefixes: 'mcp9804', 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
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http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
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http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
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http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
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@ -48,6 +56,12 @@ Supported chips:
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Datasheets:
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http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
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http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
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* ST Microelectronics STTS2002, STTS3000
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Prefix: 'stts2002', 'stts3000'
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Addresses scanned: I2C 0x18 - 0x1f
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Datasheets:
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http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00225278.pdf
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http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00270920.pdf
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* JEDEC JC 42.4 compliant temperature sensor chips
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Prefix: 'jc42'
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Addresses scanned: I2C 0x18 - 0x1f
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@ -13,7 +13,8 @@ Detection
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All ALPS touchpads should respond to the "E6 report" command sequence:
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E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
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00-00-64.
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00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
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if some buttons are pressed.
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If the E6 report is successful, the touchpad model is identified using the "E7
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report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
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@ -2211,6 +2211,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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default: off.
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printk.always_kmsg_dump=
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Trigger kmsg_dump for cases other than kernel oops or
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panics
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Format: <bool> (1/Y/y=enable, 0/N/n=disable)
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default: disabled
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printk.time= Show timing data prefixed to each printk message line
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Format: <bool> (1/Y/y=enable, 0/N/n=disable)
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@ -962,7 +962,7 @@ F: drivers/tty/serial/msm_serial.c
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F: drivers/platform/msm/
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F: drivers/*/pm8???-*
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F: include/linux/mfd/pm8xxx/
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T: git git://codeaurora.org/quic/kernel/davidb/linux-msm.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
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S: Maintained
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ARM/TOSA MACHINE SUPPORT
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@ -1310,7 +1310,7 @@ F: drivers/atm/
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F: include/linux/atm*
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ATMEL AT91 MCI DRIVER
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M: Nicolas Ferre <nicolas.ferre@atmel.com>
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M: Ludovic Desroches <ludovic.desroches@atmel.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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W: http://www.atmel.com/products/AT91/
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W: http://www.at91.com/
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@ -1318,7 +1318,7 @@ S: Maintained
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F: drivers/mmc/host/at91_mci.c
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ATMEL AT91 / AT32 MCI DRIVER
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M: Nicolas Ferre <nicolas.ferre@atmel.com>
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M: Ludovic Desroches <ludovic.desroches@atmel.com>
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S: Maintained
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F: drivers/mmc/host/atmel-mci.c
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F: drivers/mmc/host/atmel-mci-regs.h
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@ -7271,7 +7271,7 @@ WATCHDOG DEVICE DRIVERS
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M: Wim Van Sebroeck <wim@iguana.be>
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L: linux-watchdog@vger.kernel.org
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W: http://www.linux-watchdog.org/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog.git
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T: git git://www.linux-watchdog.org/linux-watchdog.git
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S: Maintained
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F: Documentation/watchdog/
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F: drivers/watchdog/
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2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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VERSION = 3
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PATCHLEVEL = 3
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SUBLEVEL = 0
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EXTRAVERSION = -rc5
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EXTRAVERSION = -rc7
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NAME = Saber-toothed Squirrel
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# *DOCUMENTATION*
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@ -108,7 +108,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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" lda $31,3b-2b(%0)\n"
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" .previous\n"
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: "+r"(ret), "=&r"(prev), "=&r"(cmp)
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: "r"(uaddr), "r"((long)oldval), "r"(newval)
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: "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
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: "memory");
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*uval = prev;
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@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622
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depends on CPU_V7
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help
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This option enables the workaround for the 743622 Cortex-A9
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(r2p0..r2p2) erratum. Under very rare conditions, a faulty
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(r2p*) erratum. Under very rare conditions, a faulty
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optimisation in the Cortex-A9 Store Buffer may lead to data
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corruption. This workaround sets a specific bit in the diagnostic
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register of the Cortex-A9 which disables the Store Buffer
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1
arch/arm/boot/.gitignore
vendored
1
arch/arm/boot/.gitignore
vendored
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@ -3,3 +3,4 @@ zImage
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xipImage
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bootpImage
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uImage
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*.dtb
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@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
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u64 armpmu_event_update(struct perf_event *event,
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struct hw_perf_event *hwc,
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int idx, int overflow);
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int idx);
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int armpmu_event_set_period(struct perf_event *event,
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struct hw_perf_event *hwc,
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@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
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memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
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vma.vm_flags = VM_EXEC;
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vma.vm_mm = mm;
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flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
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@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
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u64
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armpmu_event_update(struct perf_event *event,
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struct hw_perf_event *hwc,
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int idx, int overflow)
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int idx)
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{
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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u64 delta, prev_raw_count, new_raw_count;
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@ -193,13 +193,7 @@ armpmu_event_update(struct perf_event *event,
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new_raw_count) != prev_raw_count)
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goto again;
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new_raw_count &= armpmu->max_period;
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prev_raw_count &= armpmu->max_period;
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if (overflow)
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delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
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else
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delta = new_raw_count - prev_raw_count;
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delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
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if (hwc->idx < 0)
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return;
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armpmu_event_update(event, hwc, hwc->idx, 0);
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armpmu_event_update(event, hwc, hwc->idx);
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}
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static void
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@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
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if (!(hwc->state & PERF_HES_STOPPED)) {
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armpmu->disable(hwc, hwc->idx);
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barrier(); /* why? */
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armpmu_event_update(event, hwc, hwc->idx, 0);
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armpmu_event_update(event, hwc, hwc->idx);
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hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
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}
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}
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@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
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hwc->config_base |= (unsigned long)mapping;
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if (!hwc->sample_period) {
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hwc->sample_period = armpmu->max_period;
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/*
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* For non-sampling runs, limit the sample_period to half
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* of the counter width. That way, the new counter value
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* is far less likely to overtake the previous one unless
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* you have some serious IRQ latency issues.
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*/
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hwc->sample_period = armpmu->max_period >> 1;
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hwc->last_period = hwc->sample_period;
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local64_set(&hwc->period_left, hwc->sample_period);
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}
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@ -679,6 +679,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
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armpmu->type = ARM_PMU_DEVICE_CPU;
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}
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/*
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* PMU hardware loses all context when a CPU goes offline.
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* When a CPU is hotplugged back in, since some hardware registers are
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* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
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* junk values out of them.
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*/
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static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
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unsigned long action, void *hcpu)
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{
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if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
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return NOTIFY_DONE;
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if (cpu_pmu && cpu_pmu->reset)
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cpu_pmu->reset(NULL);
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return NOTIFY_OK;
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}
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static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
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.notifier_call = pmu_cpu_notify,
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};
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/*
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* CPU PMU identification and registration.
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*/
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@ -730,6 +752,7 @@ init_hw_perf_events(void)
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pr_info("enabled with %s PMU driver, %d counters available\n",
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cpu_pmu->name, cpu_pmu->num_events);
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cpu_pmu_init(cpu_pmu);
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register_cpu_notifier(&pmu_cpu_notifier);
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armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
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} else {
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pr_info("no hardware support available\n");
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|
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@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
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raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
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}
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static int counter_is_active(unsigned long pmcr, int idx)
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{
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unsigned long mask = 0;
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if (idx == ARMV6_CYCLE_COUNTER)
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mask = ARMV6_PMCR_CCOUNT_IEN;
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else if (idx == ARMV6_COUNTER0)
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mask = ARMV6_PMCR_COUNT0_IEN;
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else if (idx == ARMV6_COUNTER1)
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mask = ARMV6_PMCR_COUNT1_IEN;
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if (mask)
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return pmcr & mask;
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WARN_ONCE(1, "invalid counter number (%d)\n", idx);
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return 0;
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}
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static irqreturn_t
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armv6pmu_handle_irq(int irq_num,
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void *dev)
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@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
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struct perf_event *event = cpuc->events[idx];
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struct hw_perf_event *hwc;
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if (!counter_is_active(pmcr, idx))
|
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/* Ignore if we don't have an event. */
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if (!event)
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continue;
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/*
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@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
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continue;
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hwc = &event->hw;
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armpmu_event_update(event, hwc, idx, 1);
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armpmu_event_update(event, hwc, idx);
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data.period = event->hw.last_period;
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if (!armpmu_event_set_period(event, hwc, idx))
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continue;
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|
|
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|
|
@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
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counter = ARMV7_IDX_TO_COUNTER(idx);
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asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
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isb();
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/* Clear the overflow flag in case an interrupt is pending. */
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asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
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isb();
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return idx;
|
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}
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|
|
@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
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struct perf_event *event = cpuc->events[idx];
|
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struct hw_perf_event *hwc;
|
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|
||||
/* Ignore if we don't have an event. */
|
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if (!event)
|
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continue;
|
||||
|
||||
/*
|
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* We have a single interrupt for all counters. Check that
|
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* each counter has overflowed before we process it.
|
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|
|
@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
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continue;
|
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hwc = &event->hw;
|
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armpmu_event_update(event, hwc, idx, 1);
|
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armpmu_event_update(event, hwc, idx);
|
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data.period = event->hw.last_period;
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if (!armpmu_event_set_period(event, hwc, idx))
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continue;
|
||||
|
|
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|
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@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
|
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struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
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if (!event)
|
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continue;
|
||||
|
||||
if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
|
@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
|
|||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
|
@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
|
|||
static void
|
||||
xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||
{
|
||||
unsigned long flags, ien, evtsel;
|
||||
unsigned long flags, ien, evtsel, of_flags;
|
||||
struct pmu_hw_events *events = cpu_pmu->get_hw_events();
|
||||
|
||||
ien = xscale2pmu_read_int_enable();
|
||||
|
|
@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
|||
switch (idx) {
|
||||
case XSCALE_CYCLE_COUNTER:
|
||||
ien &= ~XSCALE2_CCOUNT_INT_EN;
|
||||
of_flags = XSCALE2_CCOUNT_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER0:
|
||||
ien &= ~XSCALE2_COUNT0_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT0_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER1:
|
||||
ien &= ~XSCALE2_COUNT1_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT1_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER2:
|
||||
ien &= ~XSCALE2_COUNT2_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT2_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER3:
|
||||
ien &= ~XSCALE2_COUNT3_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT3_OVERFLOW;
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
||||
|
|
@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
|||
raw_spin_lock_irqsave(&events->pmu_lock, flags);
|
||||
xscale2pmu_write_event_select(evtsel);
|
||||
xscale2pmu_write_int_enable(ien);
|
||||
xscale2pmu_write_overflow_flags(of_flags);
|
||||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -38,10 +38,6 @@
|
|||
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
||||
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct at_dma_platform_data atdma_pdata = {
|
||||
.nr_channels = 8,
|
||||
};
|
||||
|
||||
static struct resource hdmac_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9G45_BASE_DMA,
|
||||
|
|
@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = {
|
|||
};
|
||||
|
||||
static struct platform_device at_hdmac_device = {
|
||||
.name = "at_hdmac",
|
||||
.name = "at91sam9g45_dma",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &hdmac_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &atdma_pdata,
|
||||
},
|
||||
.resource = hdmac_resources,
|
||||
.num_resources = ARRAY_SIZE(hdmac_resources),
|
||||
|
|
@ -69,9 +64,15 @@ static struct platform_device at_hdmac_device = {
|
|||
|
||||
void __init at91_add_device_hdmac(void)
|
||||
{
|
||||
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
|
||||
dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
|
||||
platform_device_register(&at_hdmac_device);
|
||||
#if defined(CONFIG_OF)
|
||||
struct device_node *of_node =
|
||||
of_find_node_by_name(NULL, "dma-controller");
|
||||
|
||||
if (of_node)
|
||||
of_node_put(of_node);
|
||||
else
|
||||
#endif
|
||||
platform_device_register(&at_hdmac_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_hdmac(void) {}
|
||||
|
|
|
|||
|
|
@ -33,10 +33,6 @@
|
|||
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
||||
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct at_dma_platform_data atdma_pdata = {
|
||||
.nr_channels = 2,
|
||||
};
|
||||
|
||||
static struct resource hdmac_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9RL_BASE_DMA,
|
||||
|
|
@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
|
|||
};
|
||||
|
||||
static struct platform_device at_hdmac_device = {
|
||||
.name = "at_hdmac",
|
||||
.name = "at91sam9rl_dma",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &hdmac_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &atdma_pdata,
|
||||
},
|
||||
.resource = hdmac_resources,
|
||||
.num_resources = ARRAY_SIZE(hdmac_resources),
|
||||
|
|
@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
|
|||
|
||||
void __init at91_add_device_hdmac(void)
|
||||
{
|
||||
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
|
||||
platform_device_register(&at_hdmac_device);
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
#include <mach/ep93xx_spi.h>
|
||||
#include <mach/gpio-ep93xx.h>
|
||||
|
||||
#include <asm/hardware/vic.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
|
|||
.atag_offset = 0x100,
|
||||
.map_io = vision_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.handle_irq = vic_handle_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
.init_machine = vision_init_machine,
|
||||
.restart = ep93xx_restart,
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/mfd/max8998.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
|
@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = {
|
|||
.threshold = 0x28,
|
||||
.voltage = 2800000, /* 2.8V */
|
||||
.orient = MXT_DIAGONAL,
|
||||
.irqflags = IRQF_TRIGGER_FALLING,
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c3_devs[] __initdata = {
|
||||
|
|
|
|||
|
|
@ -61,7 +61,7 @@
|
|||
*/
|
||||
#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
|
||||
#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
|
||||
#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
|
||||
#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
|
||||
#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
|
||||
#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
|
||||
#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
|
||||
|
|
|
|||
|
|
@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
|
|||
.event_group = &lpc32xx_event_pin_regs,
|
||||
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
|
||||
},
|
||||
[IRQ_LPC32XX_GPI_28] = {
|
||||
.event_group = &lpc32xx_event_pin_regs,
|
||||
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
|
||||
},
|
||||
[IRQ_LPC32XX_GPIO_00] = {
|
||||
.event_group = &lpc32xx_event_int_regs,
|
||||
.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
|
||||
|
|
@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)
|
|||
|
||||
if (state)
|
||||
eventreg |= lpc32xx_events[d->irq].mask;
|
||||
else
|
||||
else {
|
||||
eventreg &= ~lpc32xx_events[d->irq].mask;
|
||||
|
||||
/*
|
||||
* When disabling the wakeup, clear the latched
|
||||
* event
|
||||
*/
|
||||
__raw_writel(lpc32xx_events[d->irq].mask,
|
||||
lpc32xx_events[d->irq].
|
||||
event_group->rawstat_reg);
|
||||
}
|
||||
|
||||
__raw_writel(eventreg,
|
||||
lpc32xx_events[d->irq].event_group->enab_reg);
|
||||
|
||||
|
|
@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)
|
|||
|
||||
/* Setup SIC1 */
|
||||
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
|
||||
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
|
||||
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
|
||||
__raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
|
||||
__raw_writel(SIC1_ATR_DEFAULT,
|
||||
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
|
||||
|
||||
/* Setup SIC2 */
|
||||
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
|
||||
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
|
||||
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
|
||||
__raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
|
||||
__raw_writel(SIC2_ATR_DEFAULT,
|
||||
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
|
||||
|
||||
/* Configure supported IRQ's */
|
||||
for (i = 0; i < NR_IRQS; i++) {
|
||||
|
|
|
|||
|
|
@ -88,6 +88,7 @@ struct uartinit {
|
|||
char *uart_ck_name;
|
||||
u32 ck_mode_mask;
|
||||
void __iomem *pdiv_clk_reg;
|
||||
resource_size_t mapbase;
|
||||
};
|
||||
|
||||
static struct uartinit uartinit_data[] __initdata = {
|
||||
|
|
@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
|||
.ck_mode_mask =
|
||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
|
||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
|
||||
.mapbase = LPC32XX_UART5_BASE,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
|
||||
|
|
@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
|||
.ck_mode_mask =
|
||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
|
||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
|
||||
.mapbase = LPC32XX_UART3_BASE,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
|
||||
|
|
@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
|||
.ck_mode_mask =
|
||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
|
||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
|
||||
.mapbase = LPC32XX_UART4_BASE,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
|
||||
|
|
@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
|
|||
.ck_mode_mask =
|
||||
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
|
||||
.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
|
||||
.mapbase = LPC32XX_UART6_BASE,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
|
@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)
|
|||
|
||||
/* pre-UART clock divider set to 1 */
|
||||
__raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
|
||||
|
||||
/*
|
||||
* Force a flush of the RX FIFOs to work around a
|
||||
* HW bug
|
||||
*/
|
||||
puart = uartinit_data[i].mapbase;
|
||||
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
|
||||
__raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
|
||||
j = LPC32XX_SUART_FIFO_SIZE;
|
||||
while (j--)
|
||||
tmp = __raw_readl(
|
||||
LPC32XX_UART_DLL_FIFO(puart));
|
||||
__raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
|
||||
}
|
||||
|
||||
/* This needs to be done after all UART clocks are setup */
|
||||
__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
|
||||
for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
|
||||
/* Force a flush of the RX FIFOs to work around a HW bug */
|
||||
puart = serial_std_platform_data[i].mapbase;
|
||||
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
|
||||
|
|
|
|||
|
|
@ -17,7 +17,6 @@
|
|||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#include <mach/dma.h>
|
||||
#include <mach/devices.h>
|
||||
#include <mach/mfp.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <mach/pxa168.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,6 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
|
|||
|
|
@ -416,13 +416,13 @@ static void __init innovator_init(void)
|
|||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
if (cpu_is_omap1510()) {
|
||||
omap1_usb_init(&innovator1510_usb_config);
|
||||
innovator_config[1].data = &innovator1510_lcd_config;
|
||||
innovator_config[0].data = &innovator1510_lcd_config;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_OMAP16XX
|
||||
if (cpu_is_omap1610()) {
|
||||
omap1_usb_init(&h2_usb_config);
|
||||
innovator_config[1].data = &innovator1610_lcd_config;
|
||||
innovator_config[0].data = &innovator1610_lcd_config;
|
||||
}
|
||||
#endif
|
||||
omap_board_config = innovator_config;
|
||||
|
|
|
|||
|
|
@ -364,8 +364,8 @@ config OMAP3_SDRC_AC_TIMING
|
|||
going on could result in system crashes;
|
||||
|
||||
config OMAP4_ERRATA_I688
|
||||
bool "OMAP4 errata: Async Bridge Corruption (BROKEN)"
|
||||
depends on ARCH_OMAP4 && BROKEN
|
||||
bool "OMAP4 errata: Async Bridge Corruption"
|
||||
depends on ARCH_OMAP4
|
||||
select ARCH_HAS_BARRIERS
|
||||
help
|
||||
If a data is stalled inside asynchronous bridge because of back
|
||||
|
|
|
|||
|
|
@ -371,7 +371,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
|
|||
else
|
||||
*openp = 0;
|
||||
|
||||
#ifdef CONFIG_MMC_OMAP
|
||||
omap_mmc_notify_cover_event(mmc_device, index, *openp);
|
||||
#else
|
||||
pr_warn("MMC: notify cover event not available\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
static int n8x0_mmc_late_init(struct device *dev)
|
||||
|
|
|
|||
|
|
@ -381,7 +381,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
|
|||
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
|
||||
|
||||
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
|
||||
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
|
||||
platform_device_register(&leds_gpio);
|
||||
|
||||
|
|
|
|||
|
|
@ -132,6 +132,7 @@ void omap3_map_io(void);
|
|||
void am33xx_map_io(void);
|
||||
void omap4_map_io(void);
|
||||
void ti81xx_map_io(void);
|
||||
void omap_barriers_init(void);
|
||||
|
||||
/**
|
||||
* omap_test_timeout - busy-loop, testing a condition
|
||||
|
|
|
|||
|
|
@ -65,7 +65,6 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
|
|||
struct timespec ts_preidle, ts_postidle, ts_idle;
|
||||
u32 cpu1_state;
|
||||
int idle_time;
|
||||
int new_state_idx;
|
||||
int cpu_id = smp_processor_id();
|
||||
|
||||
/* Used to keep track of the total time in idle */
|
||||
|
|
@ -84,8 +83,8 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
|
|||
*/
|
||||
cpu1_state = pwrdm_read_pwrst(cpu1_pd);
|
||||
if (cpu1_state != PWRDM_POWER_OFF) {
|
||||
new_state_idx = drv->safe_state_index;
|
||||
cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]);
|
||||
index = drv->safe_state_index;
|
||||
cx = cpuidle_get_statedata(&dev->states_usage[index]);
|
||||
}
|
||||
|
||||
if (index > 0)
|
||||
|
|
|
|||
|
|
@ -19,6 +19,8 @@
|
|||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include <plat/board.h>
|
||||
#include <plat/gpmc.h>
|
||||
|
|
@ -42,6 +44,50 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
|
|||
.flags = SMSC911X_USE_16BIT,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
||||
};
|
||||
|
||||
/* Generic regulator definition to satisfy smsc911x */
|
||||
static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
|
||||
.constraints = {
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
|
||||
.consumer_supplies = gpmc_smsc911x_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
|
||||
.supply_name = "gpmc_smsc911x",
|
||||
.microvolts = 3300000,
|
||||
.gpio = -EINVAL,
|
||||
.startup_delay = 0,
|
||||
.enable_high = 0,
|
||||
.enabled_at_boot = 1,
|
||||
.init_data = &gpmc_smsc911x_reg_init_data,
|
||||
};
|
||||
|
||||
/*
|
||||
* Platform device id of 42 is a temporary fix to avoid conflicts
|
||||
* with other reg-fixed-voltage devices. The real fix should
|
||||
* involve the driver core providing a way of dynamically
|
||||
* assigning a unique id on registration for platform devices
|
||||
* in the same name space.
|
||||
*/
|
||||
static struct platform_device gpmc_smsc911x_regulator = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.id = 42,
|
||||
.dev = {
|
||||
.platform_data = &gpmc_smsc911x_fixed_reg_data,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Initialize smsc911x device connected to the GPMC. Note that we
|
||||
* assume that pin multiplexing is done in the board-*.c file,
|
||||
|
|
@ -55,6 +101,12 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
|
|||
|
||||
gpmc_cfg = board_data;
|
||||
|
||||
ret = platform_device_register(&gpmc_smsc911x_regulator);
|
||||
if (ret < 0) {
|
||||
pr_err("Unable to register smsc911x regulators: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
|
||||
pr_err("Failed to request GPMC mem region\n");
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -428,6 +428,7 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int omap_hsmmc_done;
|
||||
#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
|
||||
|
||||
void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
|
||||
|
|
@ -491,6 +492,11 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
|||
{
|
||||
u32 reg;
|
||||
|
||||
if (omap_hsmmc_done)
|
||||
return;
|
||||
|
||||
omap_hsmmc_done = 1;
|
||||
|
||||
if (!cpu_is_omap44xx()) {
|
||||
if (cpu_is_omap2430()) {
|
||||
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
|
||||
|
|
|
|||
|
|
@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
|
|||
case 0xb944:
|
||||
omap_revision = AM335X_REV_ES1_0;
|
||||
*cpu_rev = "1.0";
|
||||
break;
|
||||
case 0xb8f2:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
|
|
|
|||
|
|
@ -307,6 +307,7 @@ void __init omapam33xx_map_common_io(void)
|
|||
void __init omap44xx_map_common_io(void)
|
||||
{
|
||||
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
|
||||
omap_barriers_init();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -281,8 +281,16 @@ static struct omap_mbox mbox_iva_info = {
|
|||
.ops = &omap2_mbox_ops,
|
||||
.priv = &omap2_mbox_iva_priv,
|
||||
};
|
||||
#endif
|
||||
|
||||
struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
|
||||
#ifdef CONFIG_ARCH_OMAP2
|
||||
struct omap_mbox *omap2_mboxes[] = {
|
||||
&mbox_dsp_info,
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
&mbox_iva_info,
|
||||
#endif
|
||||
NULL
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4)
|
||||
|
|
@ -412,8 +420,7 @@ static void __exit omap2_mbox_exit(void)
|
|||
platform_driver_unregister(&omap2_mbox_driver);
|
||||
}
|
||||
|
||||
/* must be ready before omap3isp is probed */
|
||||
subsys_initcall(omap2_mbox_init);
|
||||
module_init(omap2_mbox_init);
|
||||
module_exit(omap2_mbox_exit);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int __init
|
||||
static int
|
||||
omap_mux_get_by_name(const char *muxname,
|
||||
struct omap_mux_partition **found_partition,
|
||||
struct omap_mux **found_mux)
|
||||
|
|
|
|||
|
|
@ -150,7 +150,8 @@ static int __init omap_iommu_init(void)
|
|||
platform_device_put(omap_iommu_pdev[i]);
|
||||
return err;
|
||||
}
|
||||
module_init(omap_iommu_init);
|
||||
/* must be ready before omap3isp is probed */
|
||||
subsys_initcall(omap_iommu_init);
|
||||
|
||||
static void __exit omap_iommu_exit(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -24,12 +24,14 @@
|
|||
|
||||
#include <plat/irqs.h>
|
||||
#include <plat/sram.h>
|
||||
#include <plat/omap-secure.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/omap-wakeupgen.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "omap4-sar-layout.h"
|
||||
#include <linux/export.h>
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
static void __iomem *l2cache_base;
|
||||
|
|
@ -43,6 +45,9 @@ static void __iomem *sar_ram_base;
|
|||
|
||||
void __iomem *dram_sync, *sram_sync;
|
||||
|
||||
static phys_addr_t paddr;
|
||||
static u32 size;
|
||||
|
||||
void omap_bus_sync(void)
|
||||
{
|
||||
if (dram_sync && sram_sync) {
|
||||
|
|
@ -51,19 +56,22 @@ void omap_bus_sync(void)
|
|||
isb();
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(omap_bus_sync);
|
||||
|
||||
static int __init omap_barriers_init(void)
|
||||
/* Steal one page physical memory for barrier implementation */
|
||||
int __init omap_barrier_reserve_memblock(void)
|
||||
{
|
||||
struct map_desc dram_io_desc[1];
|
||||
phys_addr_t paddr;
|
||||
u32 size;
|
||||
|
||||
if (!cpu_is_omap44xx())
|
||||
return -ENODEV;
|
||||
|
||||
size = ALIGN(PAGE_SIZE, SZ_1M);
|
||||
paddr = arm_memblock_steal(size, SZ_1M);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __init omap_barriers_init(void)
|
||||
{
|
||||
struct map_desc dram_io_desc[1];
|
||||
|
||||
dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
|
||||
dram_io_desc[0].pfn = __phys_to_pfn(paddr);
|
||||
dram_io_desc[0].length = size;
|
||||
|
|
@ -75,9 +83,10 @@ static int __init omap_barriers_init(void)
|
|||
pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
|
||||
(long long) paddr, dram_io_desc[0].virtual);
|
||||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(omap_barriers_init);
|
||||
#else
|
||||
void __init omap_barriers_init(void)
|
||||
{}
|
||||
#endif
|
||||
|
||||
void __init gic_init_irq(void)
|
||||
|
|
|
|||
|
|
@ -174,14 +174,17 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
|
|||
freq = clk->rate;
|
||||
clk_put(clk);
|
||||
|
||||
rcu_read_lock();
|
||||
opp = opp_find_freq_ceil(dev, &freq);
|
||||
if (IS_ERR(opp)) {
|
||||
rcu_read_unlock();
|
||||
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
|
||||
__func__, vdd_name);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
bootup_volt = opp_get_voltage(opp);
|
||||
rcu_read_unlock();
|
||||
if (!bootup_volt) {
|
||||
pr_err("%s: unable to find voltage corresponding "
|
||||
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
|
||||
|
|
|
|||
|
|
@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
|
|||
.constraints = {
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
|
|
|
|||
|
|
@ -486,7 +486,7 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
|
|||
void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
|
||||
{
|
||||
struct omap_hwmod *oh[2];
|
||||
struct omap_device *od;
|
||||
struct platform_device *pdev;
|
||||
int bus_id = -1;
|
||||
int i;
|
||||
|
||||
|
|
@ -522,11 +522,11 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
|
|||
return;
|
||||
}
|
||||
|
||||
od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
|
||||
pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
|
||||
(void *)&usbhs_data, sizeof(usbhs_data),
|
||||
omap_uhhtll_latency,
|
||||
ARRAY_SIZE(omap_uhhtll_latency), false);
|
||||
if (IS_ERR(od)) {
|
||||
if (IS_ERR(pdev)) {
|
||||
pr_err("Could not build hwmod devices %s,%s\n",
|
||||
USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
|
|||
#endif
|
||||
|
||||
extern struct syscore_ops pxa_irq_syscore_ops;
|
||||
extern struct syscore_ops pxa_gpio_syscore_ops;
|
||||
extern struct syscore_ops pxa2xx_mfp_syscore_ops;
|
||||
extern struct syscore_ops pxa3xx_mfp_syscore_ops;
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@
|
|||
#include <mach/hx4700.h>
|
||||
#include <mach/irda.h>
|
||||
|
||||
#include <sound/ak4641.h>
|
||||
#include <video/platform_lcd.h>
|
||||
#include <video/w100fb.h>
|
||||
|
||||
|
|
@ -764,6 +765,28 @@ static struct i2c_board_info __initdata pi2c_board_info[] = {
|
|||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Asahi Kasei AK4641 on I2C
|
||||
*/
|
||||
|
||||
static struct ak4641_platform_data ak4641_info = {
|
||||
.gpio_power = GPIO27_HX4700_CODEC_ON,
|
||||
.gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c_board_info[] __initdata = {
|
||||
{
|
||||
I2C_BOARD_INFO("ak4641", 0x12),
|
||||
.platform_data = &ak4641_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device audio = {
|
||||
.name = "hx4700-audio",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* PCMCIA
|
||||
*/
|
||||
|
|
@ -790,6 +813,7 @@ static struct platform_device *devices[] __initdata = {
|
|||
&gpio_vbus,
|
||||
&power_supply,
|
||||
&strataflash,
|
||||
&audio,
|
||||
&pcmcia,
|
||||
};
|
||||
|
||||
|
|
@ -827,6 +851,7 @@ static void __init hx4700_init(void)
|
|||
pxa_set_ficp_info(&ficp_info);
|
||||
pxa27x_set_i2c_power_info(NULL);
|
||||
pxa_set_i2c_info(NULL);
|
||||
i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
|
||||
i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
|
||||
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
|
||||
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
|
||||
|
|
|
|||
|
|
@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
|
|||
{
|
||||
int i;
|
||||
|
||||
/* running before pxa_gpio_probe() */
|
||||
#ifdef CONFIG_CPU_PXA26x
|
||||
pxa_last_gpio = 89;
|
||||
#else
|
||||
pxa_last_gpio = 84;
|
||||
#endif
|
||||
for (i = 0; i <= pxa_last_gpio; i++)
|
||||
gpio_desc[i].valid = 1;
|
||||
|
||||
|
|
@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
|
|||
{
|
||||
int i, gpio;
|
||||
|
||||
pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
|
||||
for (i = 0; i <= pxa_last_gpio; i++) {
|
||||
/* skip GPIO2, 5, 6, 7, 8, they are not
|
||||
* valid pins allow configuration
|
||||
|
|
|
|||
|
|
@ -25,7 +25,6 @@
|
|||
#include <linux/suspend.h>
|
||||
#include <linux/syscore_ops.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/suspend.h>
|
||||
|
|
@ -209,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
|
|||
INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
|
||||
INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
|
||||
INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
|
||||
INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
|
||||
};
|
||||
|
||||
static struct clk_lookup pxa25x_hwuart_clkreg =
|
||||
|
|
@ -368,7 +368,6 @@ static int __init pxa25x_init(void)
|
|||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(pxa25x_devices,
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/i2c/pxa-i2c.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
#include <mach/hardware.h>
|
||||
|
|
@ -230,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
|
|||
INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
|
||||
INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
|
||||
INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
|
||||
INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
|
@ -456,7 +456,6 @@ static int __init pxa27x_init(void)
|
|||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -462,7 +462,6 @@ static int __init pxa3xx_init(void)
|
|||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa3xx_mfp_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -283,7 +283,6 @@ static int __init pxa95x_init(void)
|
|||
return ret;
|
||||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/pxa-i2c.h>
|
||||
#include <linux/mfd/88pm860x.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
|
|||
|
|
@ -168,6 +168,7 @@ struct battery_thresh sharpsl_battery_levels_noac[] = {
|
|||
#define MAXCTRL_SEL_SH 4
|
||||
#define MAXCTRL_STR (1u << 7)
|
||||
|
||||
extern int max1111_read_channel(int);
|
||||
/*
|
||||
* Read MAX1111 ADC
|
||||
*/
|
||||
|
|
@ -177,8 +178,6 @@ int sharpsl_pm_pxa_read_max1111(int channel)
|
|||
if (machine_is_tosa())
|
||||
return 0;
|
||||
|
||||
extern int max1111_read_channel(int);
|
||||
|
||||
/* max1111 accepts channels from 0-3, however,
|
||||
* it is encoded from 0-7 here in the code.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -172,10 +172,9 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
|
|||
static unsigned long spitz_charger_wakeup(void)
|
||||
{
|
||||
unsigned long ret;
|
||||
ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
|
||||
ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
|
||||
<< GPIO_bit(SPITZ_GPIO_KEY_INT))
|
||||
| (!gpio_get_value(SPITZ_GPIO_SYNC)
|
||||
<< GPIO_bit(SPITZ_GPIO_SYNC));
|
||||
| gpio_get_value(SPITZ_GPIO_SYNC));
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,6 @@
|
|||
#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
|
||||
#define __ARCH_ARM_MACH_S3C2440_COMMON_H
|
||||
|
||||
void s3c2440_restart(char mode, const char *cmd);
|
||||
void s3c244x_restart(char mode, const char *cmd);
|
||||
|
||||
#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
|
||||
|
|
|
|||
|
|
@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
|
|||
.init_machine = anubis_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
|
|||
.init_machine = at2440evb_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
|
|||
.init_irq = s3c24xx_init_irq,
|
||||
.init_machine = gta02_machine_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
|
|||
.init_machine = mini2440_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
|
|||
.init_machine = nexcoder_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
|
|||
.init_irq = s3c24xx_init_irq,
|
||||
.init_machine = osiris_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
|
|||
.init_irq = s3c24xx_init_irq,
|
||||
.init_machine = rx1950_init_machine,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
|
|||
.init_irq = rx3715_init_irq,
|
||||
.init_machine = rx3715_init_machine,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
|
|||
.map_io = smdk2440_map_io,
|
||||
.init_machine = smdk2440_machine_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -35,7 +35,6 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/s3c244x.h>
|
||||
#include <plat/pm.h>
|
||||
#include <plat/watchdog-reset.h>
|
||||
|
||||
#include <plat/gpio-core.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
|
@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
|
|||
s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
|
||||
s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
|
||||
}
|
||||
|
||||
void s3c2440_restart(char mode, const char *cmd)
|
||||
{
|
||||
if (mode == 's') {
|
||||
soft_restart(0);
|
||||
}
|
||||
|
||||
arch_wdt_reset();
|
||||
|
||||
/* we'll take a jump through zero as a poor second */
|
||||
soft_restart(0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -46,6 +46,7 @@
|
|||
#include <plat/pm.h>
|
||||
#include <plat/pll.h>
|
||||
#include <plat/nand-core.h>
|
||||
#include <plat/watchdog-reset.h>
|
||||
|
||||
static struct map_desc s3c244x_iodesc[] __initdata = {
|
||||
IODESC_ENT(CLKPWR),
|
||||
|
|
@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
|
|||
.suspend = s3c244x_suspend,
|
||||
.resume = s3c244x_resume,
|
||||
};
|
||||
|
||||
void s3c244x_restart(char mode, const char *cmd)
|
||||
{
|
||||
if (mode == 's')
|
||||
soft_restart(0);
|
||||
|
||||
arch_wdt_reset();
|
||||
|
||||
/* we'll take a jump through zero as a poor second */
|
||||
soft_restart(0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@ config UX500_SOC_COMMON
|
|||
default y
|
||||
select ARM_GIC
|
||||
select HAS_MTU
|
||||
select ARM_ERRATA_753970
|
||||
select PL310_ERRATA_753970
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
|
|||
select ARM_GIC
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_751472
|
||||
select ARM_ERRATA_753970
|
||||
select PL310_ERRATA_753970
|
||||
select HAVE_SMP
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
|
||||
|
|
|
|||
|
|
@ -230,9 +230,7 @@ __v7_setup:
|
|||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_743622
|
||||
teq r6, #0x20 @ present in r2p0
|
||||
teqne r6, #0x21 @ present in r2p1
|
||||
teqne r6, #0x22 @ present in r2p2
|
||||
teq r5, #0x00200000 @ only present in r2p*
|
||||
mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||
orreq r10, r10, #1 << 6 @ set bit #6
|
||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
|
|
|
|||
|
|
@ -69,6 +69,7 @@ void __init omap_reserve(void)
|
|||
omap_vram_reserve_sdram_memblock();
|
||||
omap_dsp_reserve_sdram_memblock();
|
||||
omap_secure_ram_reserve_memblock();
|
||||
omap_barrier_reserve_memblock();
|
||||
}
|
||||
|
||||
void __init omap_init_consistent_dma_size(void)
|
||||
|
|
|
|||
|
|
@ -428,8 +428,16 @@
|
|||
#define OMAP_GPMC_NR_IRQS 8
|
||||
#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
|
||||
|
||||
/* PRCM IRQ handler */
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
|
||||
#define OMAP_PRCM_NR_IRQS 64
|
||||
#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
|
||||
#else
|
||||
#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
|
||||
#endif
|
||||
|
||||
#define NR_IRQS OMAP_GPMC_IRQ_END
|
||||
#define NR_IRQS OMAP_PRCM_IRQ_END
|
||||
|
||||
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
|
||||
|
||||
|
|
|
|||
|
|
@ -10,4 +10,10 @@ static inline void omap_secure_ram_reserve_memblock(void)
|
|||
{ }
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OMAP4_ERRATA_I688
|
||||
extern int omap_barrier_reserve_memblock(void);
|
||||
#else
|
||||
static inline void omap_barrier_reserve_memblock(void)
|
||||
{ }
|
||||
#endif
|
||||
#endif /* __OMAP_SECURE_H__ */
|
||||
|
|
|
|||
|
|
@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
|
|||
struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
|
||||
int channel;
|
||||
|
||||
for (channel = dma_channels - 1; channel >= 0; cp++, channel--)
|
||||
for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
|
||||
s3c2410_dma_resume_chan(cp);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1409,7 +1409,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
|
|||
|
||||
#ifdef CONFIG_S3C_DEV_USB_HSOTG
|
||||
static struct resource s3c_usb_hsotg_resources[] = {
|
||||
[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
|
||||
[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_OTG),
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
|
|||
static int clockevent_next_event(unsigned long cycles,
|
||||
struct clock_event_device *clk_event_dev)
|
||||
{
|
||||
u16 val;
|
||||
u16 val = readw(gpt_base + CR(CLKEVT));
|
||||
|
||||
if (val & CTRL_ENABLE)
|
||||
writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
|
||||
|
||||
writew(cycles, gpt_base + LOAD(CLKEVT));
|
||||
|
||||
val = readw(gpt_base + CR(CLKEVT));
|
||||
val |= CTRL_ENABLE | CTRL_INT_ENABLE;
|
||||
writew(val, gpt_base + CR(CLKEVT));
|
||||
|
||||
|
|
|
|||
|
|
@ -122,8 +122,8 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
|
|||
|
||||
extern unsigned long get_wchan(struct task_struct *p);
|
||||
|
||||
#define KSTK_EIP(tsk) (task_pt_regs(task)->pc)
|
||||
#define KSTK_ESP(tsk) (task_pt_regs(task)->sp)
|
||||
#define KSTK_EIP(task) (task_pt_regs(task)->pc)
|
||||
#define KSTK_ESP(task) (task_pt_regs(task)->sp)
|
||||
|
||||
#define cpu_relax() do { } while (0)
|
||||
|
||||
|
|
|
|||
|
|
@ -146,7 +146,7 @@ static int __init alchemy_time_init(unsigned int m2int)
|
|||
cd->shift = 32;
|
||||
cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift);
|
||||
cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd);
|
||||
cd->min_delta_ns = clockevent_delta2ns(8, cd); /* ~0.25ms */
|
||||
cd->min_delta_ns = clockevent_delta2ns(9, cd); /* ~0.28ms */
|
||||
clockevents_register_device(cd);
|
||||
setup_irq(m2int, &au1x_rtcmatch2_irqaction);
|
||||
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ void __init ath79_register_wmac(u8 *cal_data)
|
|||
{
|
||||
if (soc_is_ar913x())
|
||||
ar913x_wmac_setup();
|
||||
if (soc_is_ar933x())
|
||||
else if (soc_is_ar933x())
|
||||
ar933x_wmac_setup();
|
||||
else
|
||||
BUG();
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_HIGH_RES_TIMERS=y
|
|||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="mips-linux-gnu-"
|
||||
CONFIG_CROSS_COMPILE=""
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
|
|
@ -22,7 +22,7 @@ CONFIG_AUDIT=y
|
|||
CONFIG_CGROUPS=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs.xlp"
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_RD_BZIP2=y
|
||||
CONFIG_RD_LZMA=y
|
||||
CONFIG_INITRAMFS_COMPRESSION_LZMA=y
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_HIGH_RES_TIMERS=y
|
|||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="mips-linux-gnu-"
|
||||
CONFIG_CROSS_COMPILE=""
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
|
|
@ -22,7 +22,7 @@ CONFIG_AUDIT=y
|
|||
CONFIG_NAMESPACES=y
|
||||
CONFIG_SCHED_AUTOGROUP=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs.xlr"
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_RD_BZIP2=y
|
||||
CONFIG_RD_LZMA=y
|
||||
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ CONFIG_HZ_1000=y
|
|||
CONFIG_PREEMPT=y
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="mips-linux-"
|
||||
CONFIG_CROSS_COMPILE=""
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
|
|
|
|||
|
|
@ -11,6 +11,9 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
|
||||
struct gpio;
|
||||
struct gpio_chip;
|
||||
|
||||
/* with the current GPIC design, up to 128 GPIOs are possible.
|
||||
* The only implementation so far is in the Au1300, which has 75 externally
|
||||
* available GPIOs.
|
||||
|
|
@ -203,7 +206,22 @@ static inline int gpio_request(unsigned int gpio, const char *label)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static inline void gpio_free(unsigned int gpio)
|
||||
static inline int gpio_request_one(unsigned gpio,
|
||||
unsigned long flags, const char *label)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int gpio_request_array(struct gpio *array, size_t num)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void gpio_free(unsigned gpio)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void gpio_free_array(struct gpio *array, size_t num)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -39,9 +39,6 @@
|
|||
#define HPAGE_MASK (~(HPAGE_SIZE - 1))
|
||||
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
|
||||
#else /* !CONFIG_HUGETLB_PAGE */
|
||||
# ifndef BUILD_BUG
|
||||
# define BUILD_BUG() do { extern void __build_bug(void); __build_bug(); } while (0)
|
||||
# endif
|
||||
#define HPAGE_SHIFT ({BUILD_BUG(); 0; })
|
||||
#define HPAGE_SIZE ({BUILD_BUG(); 0; })
|
||||
#define HPAGE_MASK ({BUILD_BUG(); 0; })
|
||||
|
|
|
|||
|
|
@ -8,7 +8,6 @@
|
|||
* SMP support for BMIPS
|
||||
*/
|
||||
|
||||
#include <linux/version.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/mm.h>
|
||||
|
|
|
|||
|
|
@ -1135,7 +1135,7 @@ asmlinkage void do_mt(struct pt_regs *regs)
|
|||
printk(KERN_DEBUG "YIELD Scheduler Exception\n");
|
||||
break;
|
||||
case 5:
|
||||
printk(KERN_DEBUG "Gating Storage Schedulier Exception\n");
|
||||
printk(KERN_DEBUG "Gating Storage Scheduler Exception\n");
|
||||
break;
|
||||
default:
|
||||
printk(KERN_DEBUG "*** UNKNOWN THREAD EXCEPTION %d ***\n",
|
||||
|
|
|
|||
|
|
@ -69,7 +69,6 @@ SECTIONS
|
|||
RODATA
|
||||
|
||||
/* writeable */
|
||||
_sdata = .; /* Start of data section */
|
||||
.data : { /* Data */
|
||||
. = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
|
||||
|
||||
|
|
|
|||
|
|
@ -42,6 +42,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
|
|||
const int field = sizeof(unsigned long) * 2;
|
||||
siginfo_t info;
|
||||
int fault;
|
||||
unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
|
||||
(write ? FAULT_FLAG_WRITE : 0);
|
||||
|
||||
#if 0
|
||||
printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", raw_smp_processor_id(),
|
||||
|
|
@ -91,6 +93,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
|
|||
if (in_atomic() || !mm)
|
||||
goto bad_area_nosemaphore;
|
||||
|
||||
retry:
|
||||
down_read(&mm->mmap_sem);
|
||||
vma = find_vma(mm, address);
|
||||
if (!vma)
|
||||
|
|
@ -144,7 +147,11 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
|
|||
* make sure we exit gracefully rather than endlessly redo
|
||||
* the fault.
|
||||
*/
|
||||
fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0);
|
||||
fault = handle_mm_fault(mm, vma, address, flags);
|
||||
|
||||
if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
|
||||
return;
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
|
||||
if (unlikely(fault & VM_FAULT_ERROR)) {
|
||||
if (fault & VM_FAULT_OOM)
|
||||
|
|
@ -153,12 +160,27 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
|
|||
goto do_sigbus;
|
||||
BUG();
|
||||
}
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
|
||||
tsk->maj_flt++;
|
||||
} else {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
|
||||
tsk->min_flt++;
|
||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
|
||||
regs, address);
|
||||
tsk->maj_flt++;
|
||||
} else {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
|
||||
regs, address);
|
||||
tsk->min_flt++;
|
||||
}
|
||||
if (fault & VM_FAULT_RETRY) {
|
||||
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||
|
||||
/*
|
||||
* No need to up_read(&mm->mmap_sem) as we would
|
||||
* have already released it in __lock_page_or_retry
|
||||
* in mm/filemap.c.
|
||||
*/
|
||||
|
||||
goto retry;
|
||||
}
|
||||
}
|
||||
|
||||
up_read(&mm->mmap_sem);
|
||||
|
|
|
|||
|
|
@ -279,7 +279,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
{
|
||||
/* Propagate hose info into the subordinate devices. */
|
||||
|
||||
struct list_head *ln;
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
if (pci_probe_only && dev &&
|
||||
|
|
@ -288,9 +287,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
|
||||
for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
|
||||
dev = pci_dev_b(ln);
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
|
||||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,16 +35,6 @@
|
|||
*/
|
||||
void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_bus *current_bus = bus;
|
||||
struct pci_dev *devices;
|
||||
struct list_head *devices_link;
|
||||
|
||||
list_for_each(devices_link, &(current_bus->devices)) {
|
||||
devices = pci_dev_b(devices_link);
|
||||
if (devices == NULL)
|
||||
continue;
|
||||
}
|
||||
|
||||
/*
|
||||
* PLX and SPKT related changes go here
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ static int __init tx_7segled_init_sysfs(void)
|
|||
break;
|
||||
}
|
||||
dev->id = i;
|
||||
dev->dev = &tx_7segled_subsys;
|
||||
dev->bus = &tx_7segled_subsys;
|
||||
error = device_register(dev);
|
||||
if (!error) {
|
||||
device_create_file(dev, &dev_attr_ascii);
|
||||
|
|
|
|||
|
|
@ -77,7 +77,6 @@ struct pt_regs {
|
|||
long syscallno; /* Syscall number (used by strace) */
|
||||
long dummy; /* Cheap alignment fix */
|
||||
};
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/* TODO: Rename this to REDZONE because that's what it is */
|
||||
#define STACK_FRAME_OVERHEAD 128 /* size of minimum stack frame */
|
||||
|
|
@ -87,6 +86,13 @@ struct pt_regs {
|
|||
#define user_stack_pointer(regs) ((unsigned long)(regs)->sp)
|
||||
#define profile_pc(regs) instruction_pointer(regs)
|
||||
|
||||
static inline long regs_return_value(struct pt_regs *regs)
|
||||
{
|
||||
return regs->gpr[11];
|
||||
}
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* Offsets used by 'ptrace' system call interface.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
|
||||
#include <linux/init_task.h>
|
||||
#include <linux/mqueue.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
|
||||
static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -188,11 +188,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
|
|||
*/
|
||||
ret = -1L;
|
||||
|
||||
/* Are these regs right??? */
|
||||
if (unlikely(current->audit_context))
|
||||
audit_syscall_entry(audit_arch(), regs->syscallno,
|
||||
regs->gpr[3], regs->gpr[4],
|
||||
regs->gpr[5], regs->gpr[6]);
|
||||
audit_syscall_entry(audit_arch(), regs->syscallno,
|
||||
regs->gpr[3], regs->gpr[4],
|
||||
regs->gpr[5], regs->gpr[6]);
|
||||
|
||||
return ret ? : regs->syscallno;
|
||||
}
|
||||
|
|
@ -201,9 +199,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
|
|||
{
|
||||
int step;
|
||||
|
||||
if (unlikely(current->audit_context))
|
||||
audit_syscall_exit(AUDITSC_RESULT(regs->gpr[11]),
|
||||
regs->gpr[11]);
|
||||
audit_syscall_exit(regs);
|
||||
|
||||
step = test_thread_flag(TIF_SINGLESTEP);
|
||||
if (step || test_thread_flag(TIF_SYSCALL_TRACE))
|
||||
|
|
|
|||
|
|
@ -31,7 +31,11 @@ ifdef CONFIG_64BIT
|
|||
UTS_MACHINE := parisc64
|
||||
CHECKFLAGS += -D__LP64__=1 -m64
|
||||
WIDTH := 64
|
||||
|
||||
# FIXME: if no default set, should really try to locate dynamically
|
||||
ifeq ($(CROSS_COMPILE),)
|
||||
CROSS_COMPILE := hppa64-linux-gnu-
|
||||
endif
|
||||
else # 32-bit
|
||||
WIDTH :=
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -227,6 +227,9 @@ config COMPAT
|
|||
config SYSVIPC_COMPAT
|
||||
def_bool y if COMPAT && SYSVIPC
|
||||
|
||||
config KEYS_COMPAT
|
||||
def_bool y if COMPAT && KEYS
|
||||
|
||||
config AUDIT_ARCH
|
||||
def_bool y
|
||||
|
||||
|
|
|
|||
|
|
@ -11,7 +11,6 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/gfp.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/crash_dump.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/elf.h>
|
||||
#include <asm/ipl.h>
|
||||
|
|
|
|||
|
|
@ -223,16 +223,38 @@ void free_initrd_mem(unsigned long start, unsigned long end)
|
|||
#ifdef CONFIG_MEMORY_HOTPLUG
|
||||
int arch_add_memory(int nid, u64 start, u64 size)
|
||||
{
|
||||
struct pglist_data *pgdat;
|
||||
unsigned long zone_start_pfn, zone_end_pfn, nr_pages;
|
||||
unsigned long start_pfn = PFN_DOWN(start);
|
||||
unsigned long size_pages = PFN_DOWN(size);
|
||||
struct zone *zone;
|
||||
int rc;
|
||||
|
||||
pgdat = NODE_DATA(nid);
|
||||
zone = pgdat->node_zones + ZONE_MOVABLE;
|
||||
rc = vmem_add_mapping(start, size);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = __add_pages(nid, zone, PFN_DOWN(start), PFN_DOWN(size));
|
||||
for_each_zone(zone) {
|
||||
if (zone_idx(zone) != ZONE_MOVABLE) {
|
||||
/* Add range within existing zone limits */
|
||||
zone_start_pfn = zone->zone_start_pfn;
|
||||
zone_end_pfn = zone->zone_start_pfn +
|
||||
zone->spanned_pages;
|
||||
} else {
|
||||
/* Add remaining range to ZONE_MOVABLE */
|
||||
zone_start_pfn = start_pfn;
|
||||
zone_end_pfn = start_pfn + size_pages;
|
||||
}
|
||||
if (start_pfn < zone_start_pfn || start_pfn >= zone_end_pfn)
|
||||
continue;
|
||||
nr_pages = (start_pfn + size_pages > zone_end_pfn) ?
|
||||
zone_end_pfn - start_pfn : size_pages;
|
||||
rc = __add_pages(nid, zone, start_pfn, nr_pages);
|
||||
if (rc)
|
||||
break;
|
||||
start_pfn += nr_pages;
|
||||
size_pages -= nr_pages;
|
||||
if (!size_pages)
|
||||
break;
|
||||
}
|
||||
if (rc)
|
||||
vmem_remove_mapping(start, size);
|
||||
return rc;
|
||||
|
|
|
|||
|
|
@ -315,6 +315,13 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
|
|||
current->mm->free_area_cache = TASK_UNMAPPED_BASE;
|
||||
current->mm->cached_hole_size = 0;
|
||||
|
||||
retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
|
||||
if (retval < 0) {
|
||||
/* Someone check-me: is this error path enough? */
|
||||
send_sig(SIGKILL, current, 0);
|
||||
return retval;
|
||||
}
|
||||
|
||||
install_exec_creds(bprm);
|
||||
current->flags &= ~PF_FORKNOEXEC;
|
||||
|
||||
|
|
@ -410,13 +417,6 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
|
|||
|
||||
set_brk(current->mm->start_brk, current->mm->brk);
|
||||
|
||||
retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
|
||||
if (retval < 0) {
|
||||
/* Someone check-me: is this error path enough? */
|
||||
send_sig(SIGKILL, current, 0);
|
||||
return retval;
|
||||
}
|
||||
|
||||
current->mm->start_stack =
|
||||
(unsigned long)create_aout_tables((char __user *)bprm->p, bprm);
|
||||
/* start thread */
|
||||
|
|
|
|||
|
|
@ -242,4 +242,12 @@ static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
|
|||
static inline void perf_events_lapic_init(void) { }
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
|
||||
extern void amd_pmu_enable_virt(void);
|
||||
extern void amd_pmu_disable_virt(void);
|
||||
#else
|
||||
static inline void amd_pmu_enable_virt(void) { }
|
||||
static inline void amd_pmu_disable_virt(void) { }
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_X86_PERF_EVENT_H */
|
||||
|
|
|
|||
|
|
@ -147,7 +147,9 @@ struct cpu_hw_events {
|
|||
/*
|
||||
* AMD specific bits
|
||||
*/
|
||||
struct amd_nb *amd_nb;
|
||||
struct amd_nb *amd_nb;
|
||||
/* Inverted mask of bits to clear in the perf_ctr ctrl registers */
|
||||
u64 perf_ctr_virt_mask;
|
||||
|
||||
void *kfree_on_online;
|
||||
};
|
||||
|
|
@ -417,9 +419,11 @@ void x86_pmu_disable_all(void);
|
|||
static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
|
||||
u64 enable_mask)
|
||||
{
|
||||
u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
|
||||
|
||||
if (hwc->extra_reg.reg)
|
||||
wrmsrl(hwc->extra_reg.reg, hwc->extra_reg.config);
|
||||
wrmsrl(hwc->config_base, hwc->config | enable_mask);
|
||||
wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
|
||||
}
|
||||
|
||||
void x86_pmu_enable_all(int added);
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue