isci: fix oem parameter initialization and mode detection
1/ Since commit 858d4aa7
"isci: Move firmware loading to per PCI device" we have
been silently falling back to built-in defaults for the parameter settings by
skipping the call to scic_oem_parameters_set().
2/ The afe parameters from the firmware were not being honored
3/ The latest oem parameter definition flips the mode_type values which are
now 0: for APC 1: for MPC. For APC we need to make sure all the phys
default to the same address otherwise strict_wide_ports will cause duplicate
domains.
4/ Fix up the driver announcement to indicate the source of the
parameters.
5/ Fix up the sas addresses to be unique per controller (in the fallback case)
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
parent
2e8320f751
commit
4711ba10b1
9 changed files with 87 additions and 72 deletions
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@ -289,8 +289,6 @@ static inline void sci_base_controller_construct(
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u32 mde_count,
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struct sci_base_memory_descriptor_list *next_mdl)
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{
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scic_base->parent.private = NULL;
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sci_base_state_machine_construct(
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&scic_base->state_machine,
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&scic_base->parent,
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@ -595,6 +595,7 @@ void scic_sds_controller_enable_port_task_scheduler(
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*/
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void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
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{
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const struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
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u32 afe_status;
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u32 phy_id;
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@ -632,6 +633,8 @@ void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
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}
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for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
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const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
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if (is_b0()) {
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/* Configure transmitter SSC parameters */
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scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
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@ -691,16 +694,16 @@ void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
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}
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udelay(AFE_REGISTER_WRITE_DELAY);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control0);
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udelay(AFE_REGISTER_WRITE_DELAY);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control1);
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udelay(AFE_REGISTER_WRITE_DELAY);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control2);
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udelay(AFE_REGISTER_WRITE_DELAY);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
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scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, oem_phy->afe_tx_amp_control3);
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udelay(AFE_REGISTER_WRITE_DELAY);
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}
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@ -2027,6 +2030,7 @@ void scic_sds_controller_release_frame(
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*/
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static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
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{
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struct isci_host *ihost = sci_object_get_association(scic);
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u16 index;
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/* Default to APC mode. */
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@ -2058,7 +2062,7 @@ static void scic_sds_controller_set_default_config_parameters(struct scic_sds_co
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* is worked around by having the upper 32-bits of SAS address
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* with a value greater then the Vitesse company identifier.
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* Hence, usage of 0x5FCFFFFF. */
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scic->oem_parameters.sds1.phys[index].sas_address.low = 0x00000001;
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scic->oem_parameters.sds1.phys[index].sas_address.low = 0x1 + ihost->id;
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scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
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}
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@ -2604,14 +2608,11 @@ enum sci_status scic_oem_parameters_set(
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struct scic_sds_controller *scic,
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union scic_oem_parameters *scic_parms)
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{
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if (
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(scic->parent.state_machine.current_state_id
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== SCI_BASE_CONTROLLER_STATE_RESET)
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|| (scic->parent.state_machine.current_state_id
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== SCI_BASE_CONTROLLER_STATE_INITIALIZING)
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|| (scic->parent.state_machine.current_state_id
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== SCI_BASE_CONTROLLER_STATE_INITIALIZED)
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) {
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u32 state = scic->parent.state_machine.current_state_id;
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if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
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state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
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state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
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u16 index;
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u8 combined_phy_mask = 0;
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@ -2651,7 +2652,8 @@ enum sci_status scic_oem_parameters_set(
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if (scic_parms->sds1.controller.max_concurrent_dev_spin_up > MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
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return SCI_FAILURE_INVALID_PARAMETER_VALUE;
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memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
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scic->oem_parameters.sds1 = scic_parms->sds1;
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return SCI_SUCCESS;
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}
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@ -44,7 +44,7 @@ void set_binary_values(struct isci_orom *isci_orom)
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/* setting OROM signature */
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strncpy(isci_orom->hdr.signature, sig, strlen(sig));
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isci_orom->hdr.version = 0x10;
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isci_orom->hdr.version = version;
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isci_orom->hdr.total_block_length = sizeof(struct isci_orom);
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isci_orom->hdr.hdr_length = sizeof(struct sci_bios_oem_param_block_hdr);
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isci_orom->hdr.num_elements = num_elements;
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@ -65,6 +65,15 @@ void set_binary_values(struct isci_orom *isci_orom)
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(__u32)(sas_addr[ctrl_idx][phy_idx] >> 32);
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isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.low =
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(__u32)(sas_addr[ctrl_idx][phy_idx]);
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isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control0 =
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afe_tx_amp_control0;
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isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control1 =
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afe_tx_amp_control1;
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isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control2 =
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afe_tx_amp_control2;
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isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control3 =
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afe_tx_amp_control3;
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}
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}
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}
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@ -25,14 +25,37 @@ static const int num_elements = 2;
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* if there is a port/phy on which you do not wish to override the default
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* values, use the value assigned to UNINIT_PARAM (255).
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*/
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/* discovery mode type (port auto config mode by default ) */
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/*
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* if there is a port/phy on which you do not wish to override the default
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* values, use the value "0000000000000000". SAS address of zero's is
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* considered invalid and will not be used.
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*/
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#ifdef MPC
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static const int mode_type = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
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static const __u8 phy_mask[2][4] = { {1, 2, 4, 8},
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{1, 2, 4, 8} };
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static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFFF0000001ULL,
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0x5FCFFFFFF0000002ULL,
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0x5FCFFFFFF0000003ULL,
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0x5FCFFFFFF0000004ULL },
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{ 0x5FCFFFFFF0000005ULL,
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0x5FCFFFFFF0000006ULL,
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0x5FCFFFFFF0000007ULL,
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0x5FCFFFFFF0000008ULL } };
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#else /* APC (default) */
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static const int mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
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static const __u8 phy_mask[2][4];
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static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFF00000001ULL,
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0x5FCFFFFF00000001ULL,
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0x5FCFFFFF00000001ULL,
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0x5FCFFFFF00000001ULL },
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{ 0x5FCFFFFF00000002ULL,
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0x5FCFFFFF00000002ULL,
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0x5FCFFFFF00000002ULL,
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0x5FCFFFFF00000002ULL } };
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#endif
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/* Maximum number of concurrent device spin up */
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@ -47,22 +70,8 @@ static const unsigned int afe_tx_amp_control1 = 0x000e7c03;
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static const unsigned int afe_tx_amp_control2 = 0x000e7c03;
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static const unsigned int afe_tx_amp_control3 = 0x000e7c03;
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/*
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* if there is a port/phy on which you do not wish to override the default
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* values, use the value "0000000000000000". SAS address of zero's is
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* considered invalid and will not be used.
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*/
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static const unsigned long long sas_addr[2][4] = { { 0x5FCFFFFFF0000000ULL,
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0x5FCFFFFFF1000000ULL,
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0x5FCFFFFFF2000000ULL,
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0x5FCFFFFFF3000000ULL },
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{ 0x5FCFFFFFF4000000ULL,
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0x5FCFFFFFF5000000ULL,
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0x5FCFFFFFF6000000ULL,
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0x5FCFFFFFF7000000ULL } };
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static const char blob_name[] = "isci_firmware.bin";
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static const char sig[] = "ISCUOEMB";
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static const unsigned char version = 1;
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static const unsigned char version = 0x10;
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#endif
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@ -418,7 +418,7 @@ int isci_host_init(struct isci_host *isci_host)
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int err = 0, i;
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enum sci_status status;
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struct scic_sds_controller *controller;
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union scic_oem_parameters scic_oem_params;
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union scic_oem_parameters oem;
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union scic_user_parameters scic_user_params;
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struct isci_pci_info *pci_info = to_pci_info(isci_host->pdev);
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@ -435,6 +435,7 @@ int isci_host_init(struct isci_host *isci_host)
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}
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isci_host->core_controller = controller;
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sci_object_set_association(isci_host->core_controller, isci_host);
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spin_lock_init(&isci_host->state_lock);
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spin_lock_init(&isci_host->scic_lock);
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spin_lock_init(&isci_host->queue_lock);
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@ -457,12 +458,6 @@ int isci_host_init(struct isci_host *isci_host)
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isci_host->sas_ha.dev = &isci_host->pdev->dev;
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isci_host->sas_ha.lldd_ha = isci_host;
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/*----------- SCIC controller Initialization Stuff ------------------
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* set association host adapter struct in core controller.
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*/
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sci_object_set_association(isci_host->core_controller,
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(void *)isci_host);
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/*
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* grab initial values stored in the controller object for OEM and USER
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* parameters
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@ -477,11 +472,11 @@ int isci_host_init(struct isci_host *isci_host)
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return -ENODEV;
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}
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scic_oem_parameters_get(controller, &scic_oem_params);
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scic_oem_parameters_get(controller, &oem);
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/* grab any OEM parameters specified in orom */
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if (pci_info->orom) {
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status = isci_parse_oem_parameters(&scic_oem_params,
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status = isci_parse_oem_parameters(&oem,
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pci_info->orom,
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isci_host->id);
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if (status != SCI_SUCCESS) {
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@ -489,15 +484,14 @@ int isci_host_init(struct isci_host *isci_host)
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"parsing firmware oem parameters failed\n");
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return -EINVAL;
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}
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} else {
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status = scic_oem_parameters_set(isci_host->core_controller,
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&scic_oem_params);
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if (status != SCI_SUCCESS) {
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dev_warn(&isci_host->pdev->dev,
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"%s: scic_oem_parameters_set failed\n",
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__func__);
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return -ENODEV;
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}
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}
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status = scic_oem_parameters_set(isci_host->core_controller, &oem);
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if (status != SCI_SUCCESS) {
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dev_warn(&isci_host->pdev->dev,
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"%s: scic_oem_parameters_set failed\n",
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__func__);
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return -ENODEV;
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}
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tasklet_init(&isci_host->completion_tasklet,
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@ -466,6 +466,7 @@ static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_devic
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struct isci_host *isci_host;
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const struct firmware *fw = NULL;
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struct isci_orom *orom;
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char *source = "(platform)";
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check_si_rev(pdev);
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@ -480,6 +481,7 @@ static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_devic
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orom = isci_request_oprom(pdev);
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if (!orom) {
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source = "(firmware)";
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orom = isci_request_firmware(pdev, fw);
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if (!orom) {
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/* TODO convert this to WARN_TAINT_ONCE once the
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@ -496,9 +498,9 @@ static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_devic
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if (orom)
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dev_info(&pdev->dev,
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"OEM SAS parameters (version: %u.%u) loaded\n",
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"OEM SAS parameters (version: %u.%u) loaded %s\n",
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(orom->hdr.version & 0xf0) >> 4,
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(orom->hdr.version & 0xf));
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(orom->hdr.version & 0xf), source);
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pci_info->orom = orom;
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@ -138,10 +138,7 @@ enum sci_status isci_parse_oem_parameters(union scic_oem_parameters *oem_params,
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scu_index > orom->hdr.num_elements || !oem_params)
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return -EINVAL;
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memcpy(oem_params,
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&orom->ctrl[scu_index],
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sizeof(struct scic_sds_oem_params));
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oem_params->sds1 = orom->ctrl[scu_index];
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return 0;
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}
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@ -96,6 +96,10 @@ struct isci_oem_hdr {
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#define ISCI_ROM_SIG "ISCUOEMB"
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#define ISCI_ROM_SIG_SIZE 8
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#define ISCI_PREBOOT_SOURCE_INIT (0x00)
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#define ISCI_PREBOOT_SOURCE_OROM (0x80)
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#define ISCI_PREBOOT_SOURCE_EFI (0x81)
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#define ISCI_EFI_VENDOR_GUID \
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EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
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0x1a, 0x04, 0xc6)
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@ -112,8 +116,8 @@ struct isci_oem_hdr {
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* being assigned is sufficient to declare manual PORT configuration.
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*/
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enum SCIC_PORT_CONFIGURATION_MODE {
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SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
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SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
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SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 0,
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SCIC_PORT_MANUAL_CONFIGURATION_MODE = 1
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};
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struct sci_bios_oem_param_block_hdr {
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@ -1,16 +1,16 @@
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:10000000495343554F454D42E70017100002000089
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:10001000000000000000000101000000000000FFDF
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:10002000FFCF5F000000F0000000000000000000B3
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:1000300000000000000000FFFFCF5F000000F100A3
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:10004000000000000000000000000000000000FFB1
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:10005000FFCF5F000000F200000000000000000081
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:1000600000000000000000FFFFCF5F000000F30071
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:10007000000000000000000000000000000000017F
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:1000800001000000000000FFFFCF5F000000F4004F
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:10009000000000000000000000000000000000FF61
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:1000A000FFCF5F000000F50000000000000000002E
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:1000B00000000000000000FFFFCF5F000000F6001E
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:1000C000000000000000000000000000000000FF31
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:1000D000FFCF5F000000F7000000000000000000FC
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:0700E0000000000000000019
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:10001000000000000000000001000000000000FFE0
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:10002000FFCF5F01000000037C0E00037C0E000385
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:100030007C0E00037C0E00FFFFCF5F010000000379
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:100040007C0E00037C0E00037C0E00037C0E00FF80
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:10005000FFCF5F01000000037C0E00037C0E000355
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:100060007C0E00037C0E00FFFFCF5F010000000349
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:100070007C0E00037C0E00037C0E00037C0E00004F
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:1000800001000000000000FFFFCF5F02000000033E
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:100090007C0E00037C0E00037C0E00037C0E00FF30
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:1000A000FFCF5F02000000037C0E00037C0E000304
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:1000B0007C0E00037C0E00FFFFCF5F0200000003F8
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:1000C0007C0E00037C0E00037C0E00037C0E00FF00
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:1000D000FFCF5F02000000037C0E00037C0E0003D4
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:0700E0007C0E00037C0E0002
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:00000001FF
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