A last fix for v4.12, an IRQ problem reported early in the merge window
appears not to have been properly fixed, so the offending commit will be reverted and we will find the proper fix for v4.13. Hopefully. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZV5OnAAoJEEEQszewGV1zJ6gP/1IfBH3UvgoCK1HXwC+0tSRa eg1dOsmIR8Z97h0v9WF1E2KCCNDfNUtFMkOlqVxThCjG0N1IzS1WI5iC04dlTmkL eibvAzsOOESK50Th5SXSuk0a7FmIo+ZooFfwsWRfQIXji4l0Kkz2ScvsQ9Z8JL6Q n5ChhKk0qFbXoD6a7VjVLIcFHG7rQ33JEMDy1vMph+eTQQ+O1oPEyHmFubRzewjb Pp6+fK6B7GiNQkACA3IBryDsG/J3gH9tTafpw1W0yJOvQuSe6Fy9MaBSVRTe20Bn c+MkFfQYTth8VSn+TmnsPjlkdl3rx7wOwIKB0AFBH69SGuN2Q5K/wobCFasK+Y4W Un6kqKiqtvBV0mRlDZKOeFDXPdsVEt8QC1e7W25ja7IBo6GPHcsYW56o2nI4xGBh HiNisiwLXgiOAb6EpMUKQjyNTkYIPwnreZTfemn/4Q0/Z/lTB3Ex2zUoKavhysuw IMNR/9m+DvsCwocrGtdZ8tQXSsz60O7IBCf+RmY+CkXfrvt3Tktbpa43f1RHmLid FAQemEBgLRB5YwP+RRCYgGQZFIG4lElDcyHTAYB8738vAtnrTEQ7QuN33zJlfJjR f44qz6OJVl1kHfBsqwGdP7BVnPFHghDi2mWhM/p4iNlL1HeGHwlz5TQvgDE9Ec9x qeteHw7zRIqldwmKfvPi =JIJ5 -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.12-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl fix from Linus Walleij: "Brian noticed that this regression has not got a proper fix for the entire merge window and consequently we need to revert the offending commit. It's part of the RT-mainstream work, the dance goes like this, two steps forward, one step back. Summary: - A last fix for v4.12, an IRQ problem reported early in the merge window appears not to have been properly fixed, so the offending commit will be reverted and we will find the proper fix for v4.13. Hopefully" * tag 'pinctrl-v4.12-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: Revert "pinctrl: rockchip: avoid hardirq-unsafe functions in irq_chip"
This commit is contained in:
commit
46589d7ab7
1 changed files with 4 additions and 40 deletions
|
@ -143,9 +143,6 @@ struct rockchip_drv {
|
|||
* @gpio_chip: gpiolib chip
|
||||
* @grange: gpio range
|
||||
* @slock: spinlock for the gpio bank
|
||||
* @irq_lock: bus lock for irq chip
|
||||
* @new_irqs: newly configured irqs which must be muxed as GPIOs in
|
||||
* irq_bus_sync_unlock()
|
||||
*/
|
||||
struct rockchip_pin_bank {
|
||||
void __iomem *reg_base;
|
||||
|
@ -168,8 +165,6 @@ struct rockchip_pin_bank {
|
|||
struct pinctrl_gpio_range grange;
|
||||
raw_spinlock_t slock;
|
||||
u32 toggle_edge_mode;
|
||||
struct mutex irq_lock;
|
||||
u32 new_irqs;
|
||||
};
|
||||
|
||||
#define PIN_BANK(id, pins, label) \
|
||||
|
@ -2134,12 +2129,11 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
int ret;
|
||||
|
||||
/* make sure the pin is configured as gpio input */
|
||||
ret = rockchip_verify_mux(bank, d->hwirq, RK_FUNC_GPIO);
|
||||
ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
bank->new_irqs |= mask;
|
||||
|
||||
clk_enable(bank->clk);
|
||||
raw_spin_lock_irqsave(&bank->slock, flags);
|
||||
|
||||
data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
|
||||
|
@ -2197,6 +2191,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
default:
|
||||
irq_gc_unlock(gc);
|
||||
raw_spin_unlock_irqrestore(&bank->slock, flags);
|
||||
clk_disable(bank->clk);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -2205,6 +2200,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
|
|||
|
||||
irq_gc_unlock(gc);
|
||||
raw_spin_unlock_irqrestore(&bank->slock, flags);
|
||||
clk_disable(bank->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -2248,34 +2244,6 @@ static void rockchip_irq_disable(struct irq_data *d)
|
|||
clk_disable(bank->clk);
|
||||
}
|
||||
|
||||
static void rockchip_irq_bus_lock(struct irq_data *d)
|
||||
{
|
||||
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
|
||||
struct rockchip_pin_bank *bank = gc->private;
|
||||
|
||||
clk_enable(bank->clk);
|
||||
mutex_lock(&bank->irq_lock);
|
||||
}
|
||||
|
||||
static void rockchip_irq_bus_sync_unlock(struct irq_data *d)
|
||||
{
|
||||
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
|
||||
struct rockchip_pin_bank *bank = gc->private;
|
||||
|
||||
while (bank->new_irqs) {
|
||||
unsigned int irq = __ffs(bank->new_irqs);
|
||||
int ret;
|
||||
|
||||
ret = rockchip_set_mux(bank, irq, RK_FUNC_GPIO);
|
||||
WARN_ON(ret < 0);
|
||||
|
||||
bank->new_irqs &= ~BIT(irq);
|
||||
}
|
||||
|
||||
mutex_unlock(&bank->irq_lock);
|
||||
clk_disable(bank->clk);
|
||||
}
|
||||
|
||||
static int rockchip_interrupts_register(struct platform_device *pdev,
|
||||
struct rockchip_pinctrl *info)
|
||||
{
|
||||
|
@ -2342,9 +2310,6 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
|
|||
gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
|
||||
gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;
|
||||
gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
|
||||
gc->chip_types[0].chip.irq_bus_lock = rockchip_irq_bus_lock;
|
||||
gc->chip_types[0].chip.irq_bus_sync_unlock =
|
||||
rockchip_irq_bus_sync_unlock;
|
||||
gc->wake_enabled = IRQ_MSK(bank->nr_pins);
|
||||
|
||||
irq_set_chained_handler_and_data(bank->irq,
|
||||
|
@ -2518,7 +2483,6 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
|
|||
int bank_pins = 0;
|
||||
|
||||
raw_spin_lock_init(&bank->slock);
|
||||
mutex_init(&bank->irq_lock);
|
||||
bank->drvdata = d;
|
||||
bank->pin_base = ctrl->nr_pins;
|
||||
ctrl->nr_pins += bank->nr_pins;
|
||||
|
|
Loading…
Reference in a new issue