arm64: dts: hisi: add hns-dsaf cpld control for the hip07 SoC

Add cpld-syscon node to support the cpld control for hns-dsaf
on the hip07 SoC.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Huazhong Tan 2018-01-18 20:31:37 +08:00 committed by Wei Xu
parent 7928b2cbe5
commit 45cc842d5b

View file

@ -1127,6 +1127,12 @@
reg = <0x0 0xc0000000 0x0 0x10000>; reg = <0x0 0xc0000000 0x0 0x10000>;
}; };
dsa_cpld: dsa_cpld@78000010 {
compatible = "syscon";
reg = <0x0 0x78000010 0x0 0x100>;
reg-io-width = <2>;
};
pcie_subctl: pcie_subctl@a0000000 { pcie_subctl: pcie_subctl@a0000000 {
compatible = "hisilicon,pcie-sas-subctrl", "syscon"; compatible = "hisilicon,pcie-sas-subctrl", "syscon";
reg = <0x0 0xa0000000 0x0 0x10000>; reg = <0x0 0xa0000000 0x0 0x10000>;
@ -1258,6 +1264,7 @@
port@0 { port@0 {
reg = <0>; reg = <0>;
serdes-syscon = <&serdes_ctrl>; serdes-syscon = <&serdes_ctrl>;
cpld-syscon = <&dsa_cpld 0x0>;
port-rst-offset = <0>; port-rst-offset = <0>;
port-mode-offset = <0>; port-mode-offset = <0>;
mc-mac-mask = [ff f0 00 00 00 00]; mc-mac-mask = [ff f0 00 00 00 00];
@ -1267,6 +1274,7 @@
port@1 { port@1 {
reg = <1>; reg = <1>;
serdes-syscon= <&serdes_ctrl>; serdes-syscon= <&serdes_ctrl>;
cpld-syscon = <&dsa_cpld 0x4>;
port-rst-offset = <1>; port-rst-offset = <1>;
port-mode-offset = <1>; port-mode-offset = <1>;
mc-mac-mask = [ff f0 00 00 00 00]; mc-mac-mask = [ff f0 00 00 00 00];