drivers/char/rocket portability fixes
unsigned long != __le32, TYVM, and unsigned char[4] is not guaranteed to be aligned for u32. While we are at it, sanitize sOutDW() a bit - have it take Byte_t * and handle dereferencing internally. NB: sWriteTxPrioByte() is almost certainly buggered on big-endian and is missing cpu_to_le16() on assignments to *WordPtr; I've left it alone for now. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: "Theodore Ts'o" <tytso@mit.edu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
635440c023
commit
457fb60583
2 changed files with 56 additions and 64 deletions
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@ -83,6 +83,7 @@
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#include <linux/pci.h>
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#include <asm/uaccess.h>
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#include <asm/atomic.h>
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#include <asm/unaligned.h>
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#include <linux/bitops.h>
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#include <linux/spinlock.h>
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#include <linux/init.h>
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@ -1312,7 +1313,7 @@ static int rp_tiocmset(struct tty_struct *tty, struct file *file,
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if (clear & TIOCM_DTR)
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info->channel.TxControl[3] &= ~SET_DTR;
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sOutDW(info->channel.IndexAddr, *(DWord_t *) & (info->channel.TxControl[0]));
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out32(info->channel.IndexAddr, info->channel.TxControl);
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return 0;
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}
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@ -1748,7 +1749,7 @@ static int rp_write(struct tty_struct *tty,
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/* Write remaining data into the port's xmit_buf */
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while (1) {
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if (info->tty == 0) /* Seemingly obligatory check... */
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if (!info->tty) /* Seemingly obligatory check... */
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goto end;
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c = min(count, min(XMIT_BUF_SIZE - info->xmit_cnt - 1, XMIT_BUF_SIZE - info->xmit_head));
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@ -2798,7 +2799,7 @@ static int sReadAiopNumChan(WordIO_t io)
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static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
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/* write to chan 0 SRAM */
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sOutDW((DWordIO_t) io + _INDX_ADDR, *((DWord_t *) & R[0]));
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out32((DWordIO_t) io + _INDX_ADDR, R);
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sOutW(io + _INDX_ADDR, 0); /* read from SRAM, chan 0 */
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x = sInW(io + _INDX_DATA);
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sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
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@ -2864,7 +2865,7 @@ static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
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R[1] = RData[i + 1] + 0x10 * ChanNum;
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R[2] = RData[i + 2];
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R[3] = RData[i + 3];
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sOutDW(ChP->IndexAddr, *((DWord_t *) & R[0]));
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out32(ChP->IndexAddr, R);
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}
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ChR = ChP->R;
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@ -2887,43 +2888,43 @@ static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
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ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
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ChP->BaudDiv[2] = (Byte_t) brd9600;
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ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->BaudDiv[0]);
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out32(ChP->IndexAddr, ChP->BaudDiv);
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ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
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ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
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ChP->TxControl[2] = 0;
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ChP->TxControl[3] = 0;
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
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out32(ChP->IndexAddr, ChP->TxControl);
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ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
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ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
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ChP->RxControl[2] = 0;
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ChP->RxControl[3] = 0;
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
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out32(ChP->IndexAddr, ChP->RxControl);
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ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
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ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
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ChP->TxEnables[2] = 0;
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ChP->TxEnables[3] = 0;
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxEnables[0]);
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out32(ChP->IndexAddr, ChP->TxEnables);
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ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
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ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
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ChP->TxCompare[2] = 0;
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ChP->TxCompare[3] = 0;
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxCompare[0]);
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out32(ChP->IndexAddr, ChP->TxCompare);
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ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
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ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
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ChP->TxReplace1[2] = 0;
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ChP->TxReplace1[3] = 0;
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace1[0]);
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out32(ChP->IndexAddr, ChP->TxReplace1);
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ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
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ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
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ChP->TxReplace2[2] = 0;
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ChP->TxReplace2[3] = 0;
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace2[0]);
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out32(ChP->IndexAddr, ChP->TxReplace2);
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ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
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ChP->TxFIFO = ChOff + _TX_FIFO;
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@ -2979,7 +2980,7 @@ static void sStopRxProcessor(CHANNEL_T * ChP)
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R[1] = ChP->R[1];
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R[2] = 0x0a;
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R[3] = ChP->R[3];
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sOutDW(ChP->IndexAddr, *(DWord_t *) & R[0]);
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out32(ChP->IndexAddr, R);
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}
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/***************************************************************************
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@ -3094,13 +3095,13 @@ static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
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*WordPtr = ChP->TxPrioBuf; /* data byte address */
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DWBuf[2] = Data; /* data byte value */
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sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0]))); /* write it out */
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out32(IndexAddr, DWBuf); /* write it out */
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*WordPtr = ChP->TxPrioCnt; /* Tx priority count address */
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DWBuf[2] = PRI_PEND + 1; /* indicate 1 byte pending */
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DWBuf[3] = 0; /* priority buffer pointer */
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sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0]))); /* write it out */
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out32(IndexAddr, DWBuf); /* write it out */
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} else { /* write it to Tx FIFO */
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sWriteTxByte(sGetTxRxDataIO(ChP), Data);
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@ -3147,11 +3148,11 @@ static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
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ChP->RxControl[2] |=
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((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
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out32(ChP->IndexAddr, ChP->RxControl);
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ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
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out32(ChP->IndexAddr, ChP->TxControl);
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if (Flags & CHANINT_EN) {
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Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
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@ -3190,9 +3191,9 @@ static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
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ChP->RxControl[2] &=
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~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
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out32(ChP->IndexAddr, ChP->RxControl);
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ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
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sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
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out32(ChP->IndexAddr, ChP->TxControl);
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if (Flags & CHANINT_EN) {
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Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
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@ -26,7 +26,6 @@ typedef unsigned int ByteIO_t;
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typedef unsigned int Word_t;
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typedef unsigned int WordIO_t;
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typedef unsigned long DWord_t;
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typedef unsigned int DWordIO_t;
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/*
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@ -38,7 +37,6 @@ typedef unsigned int DWordIO_t;
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* instruction.
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*/
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#ifdef ROCKET_DEBUG_IO
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static inline void sOutB(unsigned short port, unsigned char value)
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{
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#ifdef ROCKET_DEBUG_IO
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@ -55,12 +53,13 @@ static inline void sOutW(unsigned short port, unsigned short value)
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outw_p(value, port);
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}
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static inline void sOutDW(unsigned short port, unsigned long value)
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static inline void out32(unsigned short port, Byte_t *p)
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{
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u32 value = le32_to_cpu(get_unaligned((__le32 *)p));
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#ifdef ROCKET_DEBUG_IO
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printk(KERN_DEBUG "sOutDW(%x, %lx)...\n", port, value);
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printk(KERN_DEBUG "out32(%x, %lx)...\n", port, value);
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#endif
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outl_p(cpu_to_le32(value), port);
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outl_p(value, port);
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}
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static inline unsigned char sInB(unsigned short port)
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@ -73,14 +72,6 @@ static inline unsigned short sInW(unsigned short port)
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return inw_p(port);
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}
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#else /* !ROCKET_DEBUG_IO */
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#define sOutB(a, b) outb_p(b, a)
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#define sOutW(a, b) outw_p(b, a)
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#define sOutDW(port, value) outl_p(cpu_to_le32(value), port)
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#define sInB(a) (inb_p(a))
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#define sInW(a) (inw_p(a))
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#endif /* ROCKET_DEBUG_IO */
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/* This is used to move arrays of bytes so byte swapping isn't appropriate. */
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#define sOutStrW(port, addr, count) if (count) outsw(port, addr, count)
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#define sInStrW(port, addr, count) if (count) insw(port, addr, count)
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@ -390,7 +381,7 @@ Call: sClrBreak(ChP)
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#define sClrBreak(ChP) \
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do { \
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(ChP)->TxControl[3] &= ~SETBREAK; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -402,7 +393,7 @@ Call: sClrDTR(ChP)
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#define sClrDTR(ChP) \
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do { \
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(ChP)->TxControl[3] &= ~SET_DTR; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -415,7 +406,7 @@ Call: sClrRTS(ChP)
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do { \
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if ((ChP)->rtsToggle) break; \
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(ChP)->TxControl[3] &= ~SET_RTS; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -489,7 +480,7 @@ Call: sDisCTSFlowCtl(ChP)
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#define sDisCTSFlowCtl(ChP) \
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do { \
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(ChP)->TxControl[2] &= ~CTSFC_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -501,7 +492,7 @@ Call: sDisIXANY(ChP)
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#define sDisIXANY(ChP) \
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do { \
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(ChP)->R[0x0e] = 0x86; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \
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out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
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} while (0)
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/***************************************************************************
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@ -515,7 +506,7 @@ Comments: Function sSetParity() can be used in place of functions sEnParity(),
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#define sDisParity(ChP) \
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do { \
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(ChP)->TxControl[2] &= ~PARITY_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -527,7 +518,7 @@ Call: sDisRTSToggle(ChP)
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#define sDisRTSToggle(ChP) \
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do { \
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(ChP)->TxControl[2] &= ~RTSTOG_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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(ChP)->rtsToggle = 0; \
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} while (0)
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@ -540,7 +531,7 @@ Call: sDisRxFIFO(ChP)
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#define sDisRxFIFO(ChP) \
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do { \
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(ChP)->R[0x32] = 0x0a; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
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out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
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} while (0)
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/***************************************************************************
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@ -567,7 +558,7 @@ Call: sDisTransmit(ChP)
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#define sDisTransmit(ChP) \
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do { \
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(ChP)->TxControl[3] &= ~TX_ENABLE; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -579,7 +570,7 @@ Call: sDisTxSoftFlowCtl(ChP)
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#define sDisTxSoftFlowCtl(ChP) \
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do { \
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(ChP)->R[0x06] = 0x8a; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
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out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
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} while (0)
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/***************************************************************************
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@ -604,7 +595,7 @@ Call: sEnCTSFlowCtl(ChP)
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#define sEnCTSFlowCtl(ChP) \
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do { \
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(ChP)->TxControl[2] |= CTSFC_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -616,7 +607,7 @@ Call: sEnIXANY(ChP)
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#define sEnIXANY(ChP) \
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do { \
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(ChP)->R[0x0e] = 0x21; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \
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out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
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} while (0)
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/***************************************************************************
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@ -633,7 +624,7 @@ Warnings: Before enabling parity odd or even parity should be chosen using
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#define sEnParity(ChP) \
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do { \
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(ChP)->TxControl[2] |= PARITY_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -647,10 +638,10 @@ Comments: This function will disable RTS flow control and clear the RTS
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#define sEnRTSToggle(ChP) \
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do { \
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(ChP)->RxControl[2] &= ~RTSFC_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->RxControl); \
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(ChP)->TxControl[2] |= RTSTOG_EN; \
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(ChP)->TxControl[3] &= ~SET_RTS; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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(ChP)->rtsToggle = 1; \
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} while (0)
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@ -663,7 +654,7 @@ Call: sEnRxFIFO(ChP)
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#define sEnRxFIFO(ChP) \
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do { \
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(ChP)->R[0x32] = 0x08; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
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out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
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} while (0)
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/***************************************************************************
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@ -684,7 +675,7 @@ Warnings: This function must be called after valid microcode has been
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#define sEnRxProcessor(ChP) \
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do { \
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(ChP)->RxControl[2] |= RXPROC_EN; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->RxControl); \
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} while (0)
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/***************************************************************************
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@ -708,7 +699,7 @@ Call: sEnTransmit(ChP)
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#define sEnTransmit(ChP) \
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do { \
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(ChP)->TxControl[3] |= TX_ENABLE; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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/***************************************************************************
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@ -720,7 +711,7 @@ Call: sEnTxSoftFlowCtl(ChP)
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#define sEnTxSoftFlowCtl(ChP) \
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do { \
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(ChP)->R[0x06] = 0xc5; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
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out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
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} while (0)
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/***************************************************************************
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||||
|
@ -927,7 +918,7 @@ Call: sSendBreak(ChP)
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#define sSendBreak(ChP) \
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do { \
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(ChP)->TxControl[3] |= SETBREAK; \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
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out32((ChP)->IndexAddr,(ChP)->TxControl); \
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} while (0)
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||||
/***************************************************************************
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||||
|
@ -941,7 +932,7 @@ Call: sSetBaud(ChP,Divisor)
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do { \
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(ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \
|
||||
(ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \
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sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->BaudDiv[0]); \
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||||
out32((ChP)->IndexAddr,(ChP)->BaudDiv); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -953,7 +944,7 @@ Call: sSetData7(ChP)
|
|||
#define sSetData7(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[2] &= ~DATA8BIT; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -965,7 +956,7 @@ Call: sSetData8(ChP)
|
|||
#define sSetData8(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[2] |= DATA8BIT; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -977,7 +968,7 @@ Call: sSetDTR(ChP)
|
|||
#define sSetDTR(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[3] |= SET_DTR; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -994,7 +985,7 @@ Warnings: This function has no effect unless parity is enabled with function
|
|||
#define sSetEvenParity(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[2] |= EVEN_PAR; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1011,7 +1002,7 @@ Warnings: This function has no effect unless parity is enabled with function
|
|||
#define sSetOddParity(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[2] &= ~EVEN_PAR; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1024,7 +1015,7 @@ Call: sSetRTS(ChP)
|
|||
do { \
|
||||
if ((ChP)->rtsToggle) break; \
|
||||
(ChP)->TxControl[3] |= SET_RTS; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1050,7 +1041,7 @@ Comments: An interrupt will be generated when the trigger level is reached
|
|||
do { \
|
||||
(ChP)->RxControl[2] &= ~TRIG_MASK; \
|
||||
(ChP)->RxControl[2] |= LEVEL; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->RxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1062,7 +1053,7 @@ Call: sSetStop1(ChP)
|
|||
#define sSetStop1(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[2] &= ~STOP2; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1074,7 +1065,7 @@ Call: sSetStop2(ChP)
|
|||
#define sSetStop2(ChP) \
|
||||
do { \
|
||||
(ChP)->TxControl[2] |= STOP2; \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
|
||||
out32((ChP)->IndexAddr,(ChP)->TxControl); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1087,7 +1078,7 @@ Call: sSetTxXOFFChar(ChP,Ch)
|
|||
#define sSetTxXOFFChar(ChP,CH) \
|
||||
do { \
|
||||
(ChP)->R[0x07] = (CH); \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
|
||||
out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1100,7 +1091,7 @@ Call: sSetTxXONChar(ChP,Ch)
|
|||
#define sSetTxXONChar(ChP,CH) \
|
||||
do { \
|
||||
(ChP)->R[0x0b] = (CH); \
|
||||
sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x08]); \
|
||||
out32((ChP)->IndexAddr,&(ChP)->R[0x08]); \
|
||||
} while (0)
|
||||
|
||||
/***************************************************************************
|
||||
|
@ -1113,7 +1104,7 @@ Comments: This function is used to start a Rx processor after it was
|
|||
will restart both the Rx processor and software input flow control.
|
||||
|
||||
*/
|
||||
#define sStartRxProcessor(ChP) sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0])
|
||||
#define sStartRxProcessor(ChP) out32((ChP)->IndexAddr,&(ChP)->R[0])
|
||||
|
||||
/***************************************************************************
|
||||
Function: sWriteTxByte
|
||||
|
|
Loading…
Reference in a new issue