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Merge branches 'pci/hotplug' and 'pci/resource' into next

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* pci/hotplug:
  PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit

* pci/resource:
  PCI: Disable all BAR sizing for devices with non-compliant BARs
  x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs
  PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs
This commit is contained in:
Bjorn Helgaas 2016-05-17 14:35:38 -05:00
commit 45604e68ed
5 changed files with 23 additions and 18 deletions
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7
arch/x86/pci/fixup.c
View file

@ -552,9 +552,16 @@ static void twinhead_reserve_killing_zone(struct pci_dev *dev)
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
/*
* Broadwell EP Home Agent BARs erroneously return non-zero values when read.
*
* See http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
* entry BDF2.
*/
static void pci_bdwep_bar(struct pci_dev *dev) static void pci_bdwep_bar(struct pci_dev *dev)
{ {
dev->non_compliant_bars = 1; dev->non_compliant_bars = 1;
} }
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6f60, pci_bdwep_bar);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_bdwep_bar); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_bdwep_bar);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_bdwep_bar); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_bdwep_bar);

2
drivers/pci/pci.c
View file

@ -2228,7 +2228,7 @@ void pci_pm_init(struct pci_dev *dev)
static unsigned long pci_ea_flags(struct pci_dev *dev, u8 prop) static unsigned long pci_ea_flags(struct pci_dev *dev, u8 prop)
{ {
unsigned long flags = IORESOURCE_PCI_FIXED; unsigned long flags = IORESOURCE_PCI_FIXED | IORESOURCE_PCI_EA_BEI;
switch (prop) { switch (prop) {
case PCI_EA_P_MEM: case PCI_EA_P_MEM:

22
drivers/pci/pcie/portdrv_core.c
View file

@ -254,7 +254,6 @@ static void cleanup_service_irqs(struct pci_dev *dev)
static int get_port_device_capability(struct pci_dev *dev) static int get_port_device_capability(struct pci_dev *dev)
{ {
int services = 0; int services = 0;
u32 reg32;
int cap_mask = 0; int cap_mask = 0;
if (pcie_ports_disabled) if (pcie_ports_disabled)
@ -269,19 +268,14 @@ static int get_port_device_capability(struct pci_dev *dev)
pcie_port_platform_notify(dev, &cap_mask); pcie_port_platform_notify(dev, &cap_mask);
/* Hot-Plug Capable */ /* Hot-Plug Capable */
if ((cap_mask & PCIE_PORT_SERVICE_HP) && if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) {
pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) { services |= PCIE_PORT_SERVICE_HP;
pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32); /*
if (reg32 & PCI_EXP_SLTCAP_HPC) { * Disable hot-plug interrupts in case they have been enabled
services |= PCIE_PORT_SERVICE_HP; * by the BIOS and the hot-plug service driver is not loaded.
/* */
* Disable hot-plug interrupts in case they have been pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
* enabled by the BIOS and the hot-plug service driver PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
* is not loaded.
*/
pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
}
} }
/* AER capable */ /* AER capable */
if ((cap_mask & PCIE_PORT_SERVICE_AER) if ((cap_mask & PCIE_PORT_SERVICE_AER)

6
drivers/pci/probe.c
View file

@ -179,9 +179,6 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
u16 orig_cmd; u16 orig_cmd;
struct pci_bus_region region, inverted_region; struct pci_bus_region region, inverted_region;
if (dev->non_compliant_bars)
return 0;
mask = type ? PCI_ROM_ADDRESS_MASK : ~0; mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
/* No printks while decoding is disabled! */ /* No printks while decoding is disabled! */
@ -322,6 +319,9 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
{ {
unsigned int pos, reg; unsigned int pos, reg;
if (dev->non_compliant_bars)
return;
for (pos = 0; pos < howmany; pos++) { for (pos = 0; pos < howmany; pos++) {
struct resource *res = &dev->resource[pos]; struct resource *res = &dev->resource[pos];
reg = PCI_BASE_ADDRESS_0 + (pos << 2); reg = PCI_BASE_ADDRESS_0 + (pos << 2);

4
include/linux/ioport.h
View file

@ -26,6 +26,9 @@ struct resource {
/* /*
* IO resources have these defined flags. * IO resources have these defined flags.
*
* PCI devices expose these flags to userspace in the "resource" sysfs file,
* so don't move them.
*/ */
#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ #define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
@ -110,6 +113,7 @@ struct resource {
/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ /* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */
#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ #define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */
#define IORESOURCE_PCI_EA_BEI (1<<5) /* BAR Equivalent Indicator */
/* /*
* I/O Resource Descriptors * I/O Resource Descriptors