[PATCH] IB/mthca: fix MTT allocation in mem-free mode
Fix bug in MTT allocation in mem-free mode. I misunderstood the MTT size value returned by the firmware -- it is really the size of a single MTT entry, since mem-free mode does not segment the MTT as the original firmware did. This meant that our MTT addresses ended up being off by a factor of 8. This meant that our MTT allocations might overlap, and so we could overwrite and corrupt earlier memory regions when writing new MTT entries. We fix this by always using our 64-byte MTT segment size. This allows some simplification of the code as well, since there's no reason to put the MTT segment size in a variable -- we can always use our enum value directly. Signed-off-by: Roland Dreier <roland@topspin.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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ddb934e0ee
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6 changed files with 6 additions and 11 deletions
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@ -990,7 +990,6 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
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MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_SG_RQ_OFFSET);
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dev_lim->max_sg = min_t(int, field, dev_lim->max_sg);
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MTHCA_GET(size, outbox, QUERY_DEV_LIM_MTT_ENTRY_SZ_OFFSET);
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dev_lim->mtt_seg_sz = size;
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MTHCA_GET(size, outbox, QUERY_DEV_LIM_MPT_ENTRY_SZ_OFFSET);
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dev_lim->mpt_entry_sz = size;
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MTHCA_GET(field, outbox, QUERY_DEV_LIM_PBL_SZ_OFFSET);
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@ -1018,7 +1017,6 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
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} else {
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MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_AV_OFFSET);
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dev_lim->hca.tavor.max_avs = 1 << (field & 0x3f);
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dev_lim->mtt_seg_sz = MTHCA_MTT_SEG_SIZE;
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dev_lim->mpt_entry_sz = MTHCA_MPT_ENTRY_SIZE;
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}
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@ -162,7 +162,6 @@ struct mthca_dev_lim {
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int cqc_entry_sz;
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int srq_entry_sz;
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int uar_scratch_entry_sz;
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int mtt_seg_sz;
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int mpt_entry_sz;
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union {
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struct {
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@ -121,7 +121,6 @@ struct mthca_limits {
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int reserved_eqs;
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int num_mpts;
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int num_mtt_segs;
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int mtt_seg_size;
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int reserved_mtts;
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int reserved_mrws;
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int reserved_uars;
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@ -390,7 +390,7 @@ static int __devinit mthca_init_icm(struct mthca_dev *mdev,
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}
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mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
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dev_lim->mtt_seg_sz,
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MTHCA_MTT_SEG_SIZE,
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mdev->limits.num_mtt_segs,
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mdev->limits.reserved_mtts, 1);
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if (!mdev->mr_table.mtt_table) {
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@ -263,7 +263,7 @@ int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
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goto err_out_mpt_free;
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}
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for (i = dev->limits.mtt_seg_size / 8, mr->order = 0;
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for (i = MTHCA_MTT_SEG_SIZE / 8, mr->order = 0;
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i < list_len;
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i <<= 1, ++mr->order)
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; /* nothing */
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@ -286,7 +286,7 @@ int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
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mtt_entry = MAILBOX_ALIGN(mailbox);
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mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
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mr->first_seg * dev->limits.mtt_seg_size);
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mr->first_seg * MTHCA_MTT_SEG_SIZE);
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mtt_entry[1] = 0;
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for (i = 0; i < list_len; ++i)
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mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
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@ -330,7 +330,7 @@ int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
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memset(&mpt_entry->lkey, 0,
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sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
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mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base +
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mr->first_seg * dev->limits.mtt_seg_size);
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mr->first_seg * MTHCA_MTT_SEG_SIZE);
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if (0) {
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mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
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@ -95,7 +95,7 @@ u64 mthca_make_profile(struct mthca_dev *dev,
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profile[MTHCA_RES_RDB].size = MTHCA_RDB_ENTRY_SIZE;
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profile[MTHCA_RES_MCG].size = MTHCA_MGM_ENTRY_SIZE;
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profile[MTHCA_RES_MPT].size = dev_lim->mpt_entry_sz;
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profile[MTHCA_RES_MTT].size = dev_lim->mtt_seg_sz;
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profile[MTHCA_RES_MTT].size = MTHCA_MTT_SEG_SIZE;
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profile[MTHCA_RES_UAR].size = dev_lim->uar_scratch_entry_sz;
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profile[MTHCA_RES_UDAV].size = MTHCA_AV_SIZE;
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profile[MTHCA_RES_UARC].size = request->uarc_size;
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@ -229,10 +229,9 @@ u64 mthca_make_profile(struct mthca_dev *dev,
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break;
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case MTHCA_RES_MTT:
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dev->limits.num_mtt_segs = profile[i].num;
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dev->limits.mtt_seg_size = dev_lim->mtt_seg_sz;
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dev->mr_table.mtt_base = profile[i].start;
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init_hca->mtt_base = profile[i].start;
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init_hca->mtt_seg_sz = ffs(dev_lim->mtt_seg_sz) - 7;
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init_hca->mtt_seg_sz = ffs(MTHCA_MTT_SEG_SIZE) - 7;
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break;
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case MTHCA_RES_UAR:
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dev->limits.num_uars = profile[i].num;
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