This is the 4.19.85 stable release
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set sg_tablesize to zero ax88172a: fix information leak on short answers ipmr: Fix skb headroom in ipmr_get_route(). net: gemini: add missed free_netdev net: usb: qmi_wwan: add support for Foxconn T77W968 LTE modules slip: Fix memory leak in slip_open error path ALSA: usb-audio: Fix missing error check at mixer resolution test ALSA: usb-audio: not submit urb for stopped endpoint ALSA: usb-audio: Fix incorrect NULL check in create_yamaha_midi_quirk() ALSA: usb-audio: Fix incorrect size check for processing/extension units Btrfs: fix log context list corruption after rename exchange operation Input: ff-memless - kill timer in destroy() Input: synaptics-rmi4 - fix video buffer size Input: synaptics-rmi4 - disable the relative position IRQ in the F12 driver Input: synaptics-rmi4 - do not consume more data than we have (F11, F12) Input: synaptics-rmi4 - clear IRQ enables for F54 Input: synaptics-rmi4 - destroy F54 poller workqueue when removing IB/hfi1: Ensure full Gen3 speed in a Gen4 system IB/hfi1: Use a common pad buffer for 9B and 16B packets i2c: acpi: Force bus speed to 400KHz if a Silead touchscreen is present ecryptfs_lookup_interpose(): lower_dentry->d_inode is not stable ecryptfs_lookup_interpose(): lower_dentry->d_parent is not stable either net: ethernet: dwmac-sun8i: Use the correct function in exit path iommu/vt-d: Fix QI_DEV_IOTLB_PFSID and QI_DEV_EIOTLB_PFSID macros mm: mempolicy: fix the wrong return value and potential pages leak of mbind mm: memcg: switch to css_tryget() in get_mem_cgroup_from_mm() mm: hugetlb: switch to css_tryget() in hugetlb_cgroup_charge_cgroup() mmc: sdhci-of-at91: fix quirk2 overwrite iio: adc: max9611: explicitly cast gain_selectors tee: optee: take DT status property into account ath10k: fix kernel panic by moving pci flush after napi_disable iio: dac: mcp4922: fix error handling in mcp4922_write_raw clk: sunxi-ng: h6: fix PWM gate/reset offset soundwire: Initialize completion for defer messages soundwire: intel: Fix uninitialized adev deref arm64: dts: allwinner: a64: Orange Pi Win: Fix SD card node arm64: dts: allwinner: a64: Olinuxino: fix DRAM voltage arm64: dts: allwinner: a64: NanoPi-A64: Fix DCDC1 voltage ALSA: pcm: signedness bug in snd_pcm_plug_alloc() soc/tegra: pmc: Fix pad voltage configuration for Tegra186 arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply y2038: make do_gettimeofday() and get_seconds() inline ARM: dts: rcar: Correct SATA device sizes to 2 MiB ARM: dts: at91/trivial: Fix USART1 definition for at91sam9g45 rtc: sysfs: fix NULL check in rtc_add_groups() rtc: rv8803: fix the rv8803 id in the OF table remoteproc/davinci: Use %zx for formating size_t extcon: cht-wc: Return from default case to avoid warnings cfg80211: Avoid regulatory restore when COUNTRY_IE_IGNORE is set ALSA: seq: Do error checks at creating system ports ath10k: skip resetting rx filter for WCN3990 ath9k: fix tx99 with monitor mode interface wil6210: drop Rx multicast packets that are looped-back to STA wil6210: set edma variables only for Talyn-MB devices wil6210: prevent usage of tx ring 0 for eDMA wil6210: fix invalid memory access for rx_buff_mgmt debugfs ath10k: limit available channels via DT ieee80211-freq-limit ice: Update request resource command to latest specification ice: Prevent control queue operations during reset gfs2: Don't set GFS2_RDF_UPTODATE when the lvb is updated ice: Fix and update driver version string ASoC: dapm: Don't fail creating new DAPM control on NULL pinctrl ASoC: dpcm: Properly initialise hw->rate_max ASoC: meson: axg-fifo: report interrupt request failure ASoC: AMD: Change MCLK to 48Mhz pinctrl: ingenic: Probe driver at subsys_initcall MIPS: BCM47XX: Enable USB power on Netgear WNDR3400v3 ARM: dts: exynos: Use i2c-gpio for HDMI-DDC on Arndale ARM: dts: exynos: Fix HDMI-HPD line handling on Arndale ARM: dts: exynos: Fix sound in Snow-rev5 Chromebook liquidio: fix race condition in instruction completion processing arm64: dts: stratix10: i2c clock running out of spec ARM: dts: exynos: Fix regulators configuration on Peach Pi/Pit Chromebooks i40evf: Validate the number of queues a PF sends i40e: use correct length for strncpy i40evf: set IFF_UNICAST_FLT flag for the VF i40e: Check and correct speed values for link on open i40evf: Don't enable vlan stripping when rx offload is turned on i40e: hold the rtnl lock on clearing interrupt scheme i40evf: cancel workqueue sync for adminq when a VF is removed i40e: Prevent deleting MAC address from VF when set by PF IB/rxe: avoid back-to-back retries IB/rxe: fixes for rdma read retry iwlwifi: drop packets with bad status in CD iwlwifi: don't WARN on trying to dump dead firmware iwlwifi: mvm: avoid sending too many BARs media: vicodec: fix out-of-range values when decoding media: i2c: Fix pm_runtime_get_if_in_use() usage in sensor drivers media: ov772x: Disable clk on error path ARM: dts: pxa: fix the rtc controller ARM: dts: pxa: fix power i2c base address rtl8187: Fix warning generated when strncpy() destination length matches the sixe argument mwifiex: do no submit URB in suspended state mwifex: free rx_cmd skb in suspended state brcmfmac: fix wrong strnchr usage mt76: Fix comparisons with invalid hardware key index soc: imx: gpc: fix PDN delay ASoC: rsnd: ssi: Fix issue in dma data address assignment net: hns3: Fix for multicast failure net: hns3: Fix error of checking used vlan id net: hns3: Fix for loopback selftest failed problem net: hns3: Change the dst mac addr of loopback packet net/mlx5: Fix atomic_mode enum values net: phy: mscc: read 'vsc8531,vddmac' as an u32 net: phy: mscc: read 'vsc8531, edge-slowdown' as an u32 ARM: dts: meson8: fix the clock controller register size ARM: dts: meson8b: fix the clock controller register size mtd: rawnand: marvell: use regmap_update_bits() for syscon access mtd: rawnand: fsl_ifc: check result of SRAM initialization mtd: rawnand: fsl_ifc: fixup SRAM init for newer ctrl versions mtd: rawnand: qcom: don't include dma-direct.h IB/mlx5: Change TX affinity assignment in RoCE LAG mode qxl: fix null-pointer crash during suspend mac80211: fix saving a few HE values cfg80211: validate wmm rule when setting f2fs: avoid wrong decrypted data from disk net: lan78xx: Bail out if lan78xx_get_endpoints fails rtnetlink: move type calculation out of loop ASoC: sgtl5000: avoid division by zero if lo_vag is zero ath10k: avoid possible memory access violation ARM: dts: exynos: Disable pull control for S5M8767 PMIC ath10k: wmi: disable softirq's while calling ieee80211_rx i2c: mediatek: Use DMA safe buffers for i2c transactions IB/mlx5: Don't hold spin lock while checking device state IB/ipoib: Ensure that MTU isn't less than minimum permitted RDMA/core: Rate limit MAD error messages RDMA/core: Follow correct unregister order between sysfs and cgroup mips: txx9: fix iounmap related issue udf: Fix crash during mount ASoC: dapm: Avoid uninitialised variable warning ASoC: Intel: hdac_hdmi: Limit sampling rates at dai creation ata: Disable AHCI ALPM feature for Ampere Computing eMAG SATA of: make PowerMac cache node search conditional on CONFIG_PPC_PMAC ARM: dts: omap3-gta04: give spi_lcd node a label so that we can overwrite in other DTS files ARM: dts: omap3-gta04: fixes for tvout / venc ARM: dts: omap3-gta04: tvout: enable as display1 alias ARM: dts: omap3-gta04: fix touchscreen tsc2007 ARM: dts: omap3-gta04: make NAND partitions compatible with recent U-Boot ARM: dts: omap3-gta04: keep vpll2 always on f2fs: submit bio after shutdown failover: Fix error return code in net_failover_create sched/debug: Explicitly cast sched_feat() to bool sched/debug: Use symbolic names for task state constants firmware: arm_scmi: use strlcpy to ensure NULL-terminated strings arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphire ARM: dts: exynos: Disable pull control for PMIC IRQ line on Artik5 board usb: mtu3: disable vbus rise/fall interrupts of ltssm dmaengine: dma-jz4780: Don't depend on MACH_JZ4780 dmaengine: dma-jz4780: Further residue status fix EDAC, sb_edac: Return early on ADDRV bit and address type test rtc: mt6397: fix possible race condition rtc: pl030: fix possible race condition ath9k: add back support for using active monitor interfaces for tx99 dmaengine: at_xdmac: remove a stray bottom half unlock RDMA/hns: Fix an error code in hns_roce_v2_init_eq_table() IB/hfi1: Missing return value in error path for user sdma signal: Always ignore SIGKILL and SIGSTOP sent to the global init signal: Properly deliver SIGILL from uprobes signal: Properly deliver SIGSEGV from x86 uprobes f2fs: fix memory leak of write_io in fill_super() f2fs: fix memory leak of percpu counter in fill_super() f2fs: fix setattr project check upon fssetxattr ioctl scsi: qla2xxx: Use correct qpair for ABTS/CMD scsi: qla2xxx: Fix iIDMA error scsi: qla2xxx: Defer chip reset until target mode is enabled scsi: qla2xxx: Terminate Plogi/PRLI if WWN is 0 scsi: qla2xxx: Fix deadlock between ATIO and HW lock scsi: qla2xxx: Increase abort timeout value scsi: qla2xxx: Check for Register disconnect scsi: qla2xxx: Fix port speed display on chip reset scsi: qla2xxx: Fix dropped srb resource. scsi: qla2xxx: Fix duplicate switch's Nport ID entries scsi: lpfc: Fix GFT_ID and PRLI logic for RSCN scsi: lpfc: Correct invalid EQ doorbell write on if_type=6 scsi: lpfc: Fix errors in log messages. scsi: sym53c8xx: fix NULL pointer dereference panic in sym_int_sir() ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set scsi: pm80xx: Corrected dma_unmap_sg() parameter scsi: pm80xx: Fixed system hang issue during kexec boot kprobes: Don't call BUG_ON() if there is a kprobe in use on free list net: aquantia: fix hw_atl_utils_fw_upload_dwords Drivers: hv: vmbus: Fix synic per-cpu context initialization nvmem: core: return error code instead of NULL from nvmem_device_get media: dt-bindings: adv748x: Fix decimal unit addresses ALSA: hda: Fix implicit definition of pci_iomap() on SH media: fix: media: pci: meye: validate offset to avoid arbitrary access media: dvb: fix compat ioctl translation net: bcmgenet: Fix speed selection for reverse MII arm64: dts: meson: libretech: update board model arm64: dts: meson-axg: use the proper compatible for ethmac ALSA: intel8x0m: Register irq handler after register initializations arm64: dts: renesas: salvator-common: adv748x: Override secondary addresses arm64: dts: renesas: r8a77965: Attach the SYS-DMAC to the IPMMU arm64: dts: renesas: r8a77965: Fix HS-USB compatible arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 pinctrl: at91-pio4: fix has_config check in atmel_pctl_dt_subnode_to_map() llc: avoid blocking in llc_sap_close() ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg value soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get() soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples soc: qcom: wcnss_ctrl: Avoid string overflow soc: qcom: apr: Avoid string overflow drivers: qcom: rpmh-rsc: clear wait_for_compl after use arm64: dts: broadcom: Fix I2C and SPI bus warnings ARM: dts: bcm: Fix SPI bus warnings ARM: dts: aspeed: Fix I2C bus warnings powerpc/vdso: Correct call frame information ARM: dts: socfpga: Fix I2C bus unit-address error ARM: dts: sunxi: Fix I2C bus warnings pinctrl: at91: don't use the same irqchip with multiple gpiochips ARM: dts: sun9i: Fix I2C bus warnings android: binder: no outgoing transaction when thread todo has transaction cxgb4: Fix endianness issue in t4_fwcache() arm64: fix for bad_mode() handler to always result in panic block, bfq: inject other-queue I/O into seeky idle queues on NCQ flash blok, bfq: do not plug I/O if all queues are weight-raised arm64: dts: meson: Fix erroneous SPI bus warnings power: supply: ab8500_fg: silence uninitialized variable warnings power: reset: at91-poweroff: do not procede if at91_shdwc is allocated power: supply: max8998-charger: Fix platform data retrieval component: fix loop condition to call unbind() if bind() fails kernfs: Fix range checks in kernfs_get_target_path ip_gre: fix parsing gre header in ipgre_err scsi: ufshcd: Fix NULL pointer dereference for in ufshcd_init ARM: dts: rockchip: Fix erroneous SPI bus dtc warnings on rk3036 arm64: dts: rockchip: Fix I2C bus unit-address error on rk3399-puma-haikou ACPI / LPSS: Exclude I2C busses shared with PUNIT from pmc_atom_d3_mask netfilter: nf_tables: avoid BUG_ON usage ath9k: Fix a locking bug in ath9k_add_interface() s390/qeth: uninstall IRQ handler on device removal s390/qeth: invoke softirqs after napi_schedule() media: vsp1: Fix vsp1_regs.h license header media: vsp1: Fix YCbCr planar formats pitch calculation media: ov2680: don't register the v4l2 subdevice before checking chip ID PCI/ACPI: Correct error message for ASPM disabling net: socionext: Fix two sleep-in-atomic-context bugs in ave_rxfifo_reset() PCI: mediatek: Fix unchecked return value ARM: dts: xilinx: Fix I2C and SPI bus warnings serial: uartps: Fix suspend functionality serial: samsung: Enable baud clock for UART reset procedure in resume serial: mxs-auart: Fix potential infinite loop tty: serial: qcom_geni_serial: Fix serial when not used as console arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of interconnect to 2 samples/bpf: fix a compilation failure spi/bcm63xx-hsspi: keep pll clk enabled spi: mediatek: Don't modify spi_transfer when transfer. ASoC: rt5682: Fix the boost volume at the begining of playback ipmi_si_pci: fix NULL device in ipmi_si error message ipmi_si: fix potential integer overflow on large shift ipmi:dmi: Ignore IPMI SMBIOS entries with a zero base address ipmi: fix return value of ipmi_set_my_LUN net: hns3: fix return type of ndo_start_xmit function net: cavium: fix return type of ndo_start_xmit function net: ibm: fix return type of ndo_start_xmit function powerpc/iommu: Avoid derefence before pointer check selftests/powerpc: Do not fail with reschedule powerpc/64s/hash: Fix stab_rr off by one initialization powerpc/pseries/memory-hotplug: Only update DT once per memory DLPAR request powerpc/pseries: Disable CPU hotplug across migrations powerpc: Fix duplicate const clang warning in user access code RDMA/i40iw: Fix incorrect iterator type ARM: dts: atmel: Fix I2C and SPI bus warnings OPP: Protect dev_list with opp_table lock of/unittest: Fix I2C bus unit-address error libfdt: Ensure INT_MAX is defined in libfdt_env.h power: supply: twl4030_charger: fix charging current out-of-bounds power: supply: twl4030_charger: disable eoc interrupt on linear charge net: mvpp2: fix the number of queues per cpu for PPv2.2 net: marvell: fix return type of ndo_start_xmit function net: toshiba: fix return type of ndo_start_xmit function net: xilinx: fix return type of ndo_start_xmit function net: broadcom: fix return type of ndo_start_xmit function net: amd: fix return type of ndo_start_xmit function net: sun: fix return type of ndo_start_xmit function net: hns3: Fix for setting speed for phy failed problem net: hns3: Fix cmdq registers initialization issue for vf net: hns3: Clear client pointer when initialize client failed or unintialize finished net: hns3: Fix client initialize state issue when roce client initialize failed net: hns3: Fix parameter type for q_id in hclge_tm_q_to_qs_map_cfg() nfp: provide a better warning when ring allocation fails usb: chipidea: imx: enable OTG overcurrent in case USB subsystem is already started usb: chipidea: Fix otg event handler usb: usbtmc: Fix ioctl USBTMC_IOCTL_ABORT_BULK_OUT s390/zcrypt: enable AP bus scan without a valid default domain s390/vdso: avoid 64-bit vdso mapping for compat tasks s390/vdso: correct CFI annotations of vDSO functions brcmfmac: increase buffer for obtaining firmware capabilities brcmsmac: Use kvmalloc() for ucode allocations mlxsw: spectrum: Init shaper for TCs 8..15 PCI: portdrv: Initialize service drivers directly ARM: dts: am335x-evm: fix number of cpsw ARM: dts: ti: Fix SPI and I2C bus warnings f2fs: avoid infinite loop in f2fs_alloc_nid f2fs: fix to recover inode's uid/gid during POR ARM: dts: ux500: Correct SCU unit address ARM: dts: ux500: Fix LCDA clock line muxing ARM: dts: ste: Fix SPI controller node names spi: pic32: Use proper enum in dmaengine_prep_slave_rg crypto: chacha20 - Fix chacha20_block() keystream alignment (again) cpufeature: avoid warning when compiling with clang crypto: arm/crc32 - avoid warning when compiling with Clang ARM: dts: marvell: Fix SPI and I2C bus warnings x86/mce-inject: Reset injection struct after injection ARM: dts: stm32: enable display on stm32mp157c-ev1 board ARM: dts: clearfog: fix sdhci supply property name ARM: dts: stm32: Fix SPI controller node names bnx2x: Ignore bandwidth attention in single function mode PCI/AER: Take reference on error devices PCI/AER: Don't read upstream ports below fatal errors PCI/ERR: Use slot reset if available samples/bpf: fix compilation failure net: phy: mdio-bcm-unimac: Allow configuring MDIO clock divider net: micrel: fix return type of ndo_start_xmit function net: freescale: fix return type of ndo_start_xmit function x86/CPU: Use correct macros for Cyrix calls x86/CPU: Change query logic so CPUID is enabled before testing EDAC: Correct DIMM capacity unit symbol MIPS: kexec: Relax memory restriction arm64: dts: rockchip: Fix microSD in rk3399 sapphire board mlxsw: Make MLXSW_SP1_FWREV_MINOR a hard requirement media: imx: work around false-positive warning, again media: pci: ivtv: Fix a sleep-in-atomic-context bug in ivtv_yuv_init() media: au0828: Fix incorrect error messages media: davinci: Fix implicit enum conversion warning ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock usb: gadget: uvc: configfs: Drop leaked references to config items usb: gadget: uvc: configfs: Prevent format changes after linking header usb: gadget: uvc: configfs: Sort frame intervals upon writing ARM: dts: exynos: Correct audio subsystem parent clock on Peach Chromebooks i2c: aspeed: fix invalid clock parameters for very large divisors gpiolib: Fix gpio_direction_* for single direction GPIOs ARM: at91: pm: call put_device instead of of_node_put in at91_pm_config_ws phy: brcm-sata: allow PHY_BRCM_SATA driver to be built for DSL SoCs phy: renesas: rcar-gen3-usb2: fix vbus_ctrl for role sysfs phy: phy-twl4030-usb: fix denied runtime access ARM: dts: imx6ull: update vdd_soc voltage for 900MHz operating point usb: gadget: uvc: Factor out video USB request queueing usb: gadget: uvc: Only halt video streaming endpoint in bulk mode coresight: Use ERR_CAST instead of ERR_PTR coresight: Fix handling of sinks coresight: perf: Fix per cpu path management coresight: perf: Disable trace path upon source error coresight: tmc-etr: Handle driver mode specific ETR buffers coresight: etm4x: Configure EL2 exception level when kernel is running in HYP coresight: tmc: Fix byte-address alignment for RRP coresight: dynamic-replicator: Handle multiple connections slimbus: ngd: register ngd driver only once. slimbus: ngd: return proper error code instead of zero silmbus: ngd: register controller after power up. misc: kgdbts: Fix restrict error misc: genwqe: should return proper error value. vmbus: keep pointer to ring buffer page vfio/pci: Fix potential memory leak in vfio_msi_cap_len vfio/pci: Mask buggy SR-IOV VF INTx support iw_cxgb4: Use proper enumerated type in c4iw_bar2_addrs scsi: libsas: always unregister the old device if going to discover new f2fs: fix remount problem of option io_bits phy: lantiq: Fix compile warning arm64: dts: fsl: Fix I2C and SPI bus warnings ARM: dts: imx51-zii-rdu1: Fix the rtc compatible string arm64: tegra: I2C on Tegra194 is not compatible with Tegra114 ARM: dts: tegra30: fix xcvr-setup-use-fuses ARM: dts: tegra20: restore address order ARM: tegra: apalis_t30: fix mmc1 cmd pull-up ARM: tegra: apalis_t30: fix mcp2515 can controller interrupt polarity ARM: tegra: colibri_t30: fix mcp2515 can controller interrupt polarity ARM: dts: paz00: fix wakeup gpio keycode net: smsc: fix return type of ndo_start_xmit function net: faraday: fix return type of ndo_start_xmit function PCI/ERR: Run error recovery callbacks for all affected devices f2fs: update i_size after DIO completion f2fs: fix to recover inode's project id during POR f2fs: mark inode dirty explicitly in recover_inode() RDMA: Fix dependencies for rdma_user_mmap_io EDAC: Raise the maximum number of memory controllers ARM: dts: realview: Fix SPI controller node names firmware: dell_rbu: Make payload memory uncachable Bluetooth: hci_serdev: clear HCI_UART_PROTO_READY to avoid closing proto races Bluetooth: L2CAP: Detect if remote is not able to use the whole MPS Bluetooth: btrsi: fix bt tx timeout issue x86/hyperv: Suppress "PCI: Fatal: No config space access function found" crypto: s5p-sss: Fix race in error handling crypto: s5p-sss: Fix Fix argument list alignment crypto: fix a memory leak in rsa-kcs1pad's encryption mode iwlwifi: dbg: don't crash if the firmware crashes in the middle of a debug dump iwlwifi: fix non_shared_ant for 22000 devices iwlwifi: pcie: read correct prph address for newer devices iwlwifi: api: annotate compressed BA notif array sizes iwlwifi: pcie: gen2: build A-MSDU only for GSO iwlwifi: pcie: fit reclaim msg to MAX_MSG_LEN iwlwifi: mvm: use correct FIFO length iwlwifi: mvm: Allow TKIP for AP mode scsi: NCR5380: Clear all unissued commands on host reset scsi: NCR5380: Have NCR5380_select() return a bool scsi: NCR5380: Withhold disconnect privilege for REQUEST SENSE scsi: NCR5380: Use DRIVER_SENSE to indicate valid sense data scsi: NCR5380: Check for invalid reselection target scsi: NCR5380: Don't clear busy flag when abort fails scsi: NCR5380: Don't call dsprintk() following reselection interrupt scsi: NCR5380: Handle BUS FREE during reselection scsi: NCR5380: Check for bus reset arm64: dts: amd: Fix SPI bus warnings arm64: dts: lg: Fix SPI controller node names ARM: dts: lpc32xx: Fix SPI controller node names rtc: isl1208: avoid possible sysfs race rtc: tx4939: fixup nvmem name and register size rtc: armada38x: fix possible race condition netfilter: masquerade: don't flush all conntracks if only one address deleted on device usb: xhci-mtk: fix ISOC error when interval is zero usb: usbtmc: uninitialized symbol 'actual' in usbtmc_ioctl_clear fuse: use READ_ONCE on congestion_threshold and max_background IB/iser: Fix possible NULL deref at iser_inv_desc() media: ov2680: fix null dereference at power on s390/vdso: correct vdso mapping for compat tasks net: phy: mdio-bcm-unimac: mark PM functions as __maybe_unused memfd: Use radix_tree_deref_slot_protected to avoid the warning. slcan: Fix memory leak in error path Linux 4.19.85 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I0857e66ee2cdd412cd736548a1395bf764a8ab0a
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@ -73,7 +73,7 @@ Example:
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};
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port@10 {
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port@a {
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reg = <10>;
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reg = <10>;
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adv7482_txa: endpoint {
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adv7482_txa: endpoint {
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@ -83,7 +83,7 @@ Example:
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};
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};
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};
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};
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port@11 {
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port@b {
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reg = <11>;
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reg = <11>;
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adv7482_txb: endpoint {
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adv7482_txb: endpoint {
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@ -19,6 +19,9 @@ Optional properties:
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- interrupt-names: must be "mdio_done_error" when there is a share interrupt fed
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- interrupt-names: must be "mdio_done_error" when there is a share interrupt fed
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to this hardware block, or must be "mdio_done" for the first interrupt and
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to this hardware block, or must be "mdio_done" for the first interrupt and
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"mdio_error" for the second when there are separate interrupts
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"mdio_error" for the second when there are separate interrupts
|
||||||
|
- clocks: A reference to the clock supplying the MDIO bus controller
|
||||||
|
- clock-frequency: the MDIO bus clock that must be output by the MDIO bus
|
||||||
|
hardware, if absent, the default hardware values are used
|
||||||
|
|
||||||
Child nodes of this MDIO bus controller node are standard Ethernet PHY device
|
Child nodes of this MDIO bus controller node are standard Ethernet PHY device
|
||||||
nodes as described in Documentation/devicetree/bindings/net/phy.txt
|
nodes as described in Documentation/devicetree/bindings/net/phy.txt
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
# SPDX-License-Identifier: GPL-2.0
|
# SPDX-License-Identifier: GPL-2.0
|
||||||
VERSION = 4
|
VERSION = 4
|
||||||
PATCHLEVEL = 19
|
PATCHLEVEL = 19
|
||||||
SUBLEVEL = 84
|
SUBLEVEL = 85
|
||||||
EXTRAVERSION =
|
EXTRAVERSION =
|
||||||
NAME = "People's Front"
|
NAME = "People's Front"
|
||||||
|
|
||||||
|
|
|
@ -6,6 +6,8 @@
|
||||||
#include <linux/string.h>
|
#include <linux/string.h>
|
||||||
#include <asm/byteorder.h>
|
#include <asm/byteorder.h>
|
||||||
|
|
||||||
|
#define INT_MAX ((int)(~0U>>1))
|
||||||
|
|
||||||
typedef __be16 fdt16_t;
|
typedef __be16 fdt16_t;
|
||||||
typedef __be32 fdt32_t;
|
typedef __be32 fdt32_t;
|
||||||
typedef __be64 fdt64_t;
|
typedef __be64 fdt64_t;
|
||||||
|
|
|
@ -88,7 +88,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c0 {
|
&i2c0 {
|
||||||
tda19988: tda19988 {
|
tda19988: tda19988@70 {
|
||||||
compatible = "nxp,tda998x";
|
compatible = "nxp,tda998x";
|
||||||
reg = <0x70>;
|
reg = <0x70>;
|
||||||
|
|
||||||
|
|
|
@ -731,6 +731,7 @@
|
||||||
pinctrl-0 = <&cpsw_default>;
|
pinctrl-0 = <&cpsw_default>;
|
||||||
pinctrl-1 = <&cpsw_sleep>;
|
pinctrl-1 = <&cpsw_sleep>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
slaves = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&davinci_mdio {
|
&davinci_mdio {
|
||||||
|
@ -738,15 +739,14 @@
|
||||||
pinctrl-0 = <&davinci_mdio_default>;
|
pinctrl-0 = <&davinci_mdio_default>;
|
||||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
|
ethphy0: ethernet-phy@0 {
|
||||||
|
reg = <0>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&cpsw_emac0 {
|
&cpsw_emac0 {
|
||||||
phy_id = <&davinci_mdio>, <0>;
|
phy-handle = <ðphy0>;
|
||||||
phy-mode = "rgmii-txid";
|
|
||||||
};
|
|
||||||
|
|
||||||
&cpsw_emac1 {
|
|
||||||
phy_id = <&davinci_mdio>, <1>;
|
|
||||||
phy-mode = "rgmii-txid";
|
phy-mode = "rgmii-txid";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -161,7 +161,7 @@
|
||||||
invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
|
invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
|
||||||
};
|
};
|
||||||
|
|
||||||
bmp280: pressure@78 {
|
bmp280: pressure@76 {
|
||||||
compatible = "bosch,bmp280";
|
compatible = "bosch,bmp280";
|
||||||
reg = <0x76>;
|
reg = <0x76>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -373,7 +373,7 @@
|
||||||
ti,pindir-d0-out-d1-in;
|
ti,pindir-d0-out-d1-in;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
cfaf240320a032t {
|
display-controller@0 {
|
||||||
compatible = "orisetech,otm3225a";
|
compatible = "orisetech,otm3225a";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
spi-max-frequency = <1000000>;
|
spi-max-frequency = <1000000>;
|
||||||
|
|
|
@ -1101,7 +1101,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: qspi@47900000 {
|
qspi: spi@47900000 {
|
||||||
compatible = "ti,am4372-qspi";
|
compatible = "ti,am4372-qspi";
|
||||||
reg = <0x47900000 0x100>,
|
reg = <0x47900000 0x100>,
|
||||||
<0x30000000 0x4000000>;
|
<0x30000000 0x4000000>;
|
||||||
|
|
|
@ -518,7 +518,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* touch controller */
|
/* touch controller */
|
||||||
ads7846@0 {
|
touchscreen@1 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&ads7846_pins>;
|
pinctrl-0 = <&ads7846_pins>;
|
||||||
|
|
||||||
|
|
|
@ -371,7 +371,7 @@
|
||||||
clock-names = "uartclk", "apb_pclk";
|
clock-names = "uartclk", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp: ssp@1000d000 {
|
ssp: spi@1000d000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x1000d000 0x1000>;
|
reg = <0x1000d000 0x1000>;
|
||||||
clocks = <&sspclk>, <&pclk>;
|
clocks = <&sspclk>, <&pclk>;
|
||||||
|
|
|
@ -380,7 +380,7 @@
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
pb1176_ssp: ssp@1010b000 {
|
pb1176_ssp: spi@1010b000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x1010b000 0x1000>;
|
reg = <0x1010b000 0x1000>;
|
||||||
interrupt-parent = <&intc_dc1176>;
|
interrupt-parent = <&intc_dc1176>;
|
||||||
|
|
|
@ -523,7 +523,7 @@
|
||||||
clock-names = "uartclk", "apb_pclk";
|
clock-names = "uartclk", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp@1000d000 {
|
spi@1000d000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x1000d000 0x1000>;
|
reg = <0x1000d000 0x1000>;
|
||||||
interrupt-parent = <&intc_pb11mp>;
|
interrupt-parent = <&intc_pb11mp>;
|
||||||
|
|
|
@ -362,7 +362,7 @@
|
||||||
clock-names = "uartclk", "apb_pclk";
|
clock-names = "uartclk", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp: ssp@1000d000 {
|
ssp: spi@1000d000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x1000d000 0x1000>;
|
reg = <0x1000d000 0x1000>;
|
||||||
clocks = <&sspclk>, <&pclk>;
|
clocks = <&sspclk>, <&pclk>;
|
||||||
|
|
|
@ -48,7 +48,7 @@
|
||||||
&clearfog_sdhci_cd_pins>;
|
&clearfog_sdhci_cd_pins>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
status = "okay";
|
status = "okay";
|
||||||
vmmc = <®_3p3v>;
|
vmmc-supply = <®_3p3v>;
|
||||||
wp-inverted;
|
wp-inverted;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -350,7 +350,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c: i2c@1e78a000 {
|
i2c: bus@1e78a000 {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
|
|
@ -410,7 +410,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c: i2c@1e78a000 {
|
i2c: bus@1e78a000 {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
|
|
@ -70,9 +70,9 @@
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
eeprom@87 {
|
eeprom@57 {
|
||||||
compatible = "giantec,gt24c32a", "atmel,24c32";
|
compatible = "giantec,gt24c32a", "atmel,24c32";
|
||||||
reg = <87>;
|
reg = <0x57>;
|
||||||
pagesize = <32>;
|
pagesize = <32>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -59,9 +59,9 @@
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
ft5426@56 {
|
ft5426@38 {
|
||||||
compatible = "focaltech,ft5426", "edt,edt-ft5406";
|
compatible = "focaltech,ft5426", "edt,edt-ft5406";
|
||||||
reg = <56>;
|
reg = <0x38>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_lcd_ctp_int>;
|
pinctrl-0 = <&pinctrl_lcd_ctp_int>;
|
||||||
|
|
||||||
|
|
|
@ -128,7 +128,7 @@
|
||||||
i2c2: i2c@f8024000 {
|
i2c2: i2c@f8024000 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
rtc1: rtc@64 {
|
rtc1: rtc@32 {
|
||||||
compatible = "epson,rx8900";
|
compatible = "epson,rx8900";
|
||||||
reg = <0x32>;
|
reg = <0x32>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -127,7 +127,7 @@
|
||||||
|
|
||||||
spi0: spi@fffc8000 {
|
spi0: spi@fffc8000 {
|
||||||
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
|
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
|
||||||
mtd_dataflash@0 {
|
mtd_dataflash@1 {
|
||||||
compatible = "atmel,at45", "atmel,dataflash";
|
compatible = "atmel,at45", "atmel,dataflash";
|
||||||
spi-max-frequency = <50000000>;
|
spi-max-frequency = <50000000>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
|
|
|
@ -160,7 +160,7 @@
|
||||||
spi-max-frequency = <15000000>;
|
spi-max-frequency = <15000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
tsc2046@0 {
|
tsc2046@2 {
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
compatible = "ti,ads7843";
|
compatible = "ti,ads7843";
|
||||||
interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
|
interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
|
||||||
|
|
|
@ -109,7 +109,7 @@
|
||||||
|
|
||||||
spi0: spi@fffc8000 {
|
spi0: spi@fffc8000 {
|
||||||
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
|
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
|
||||||
mtd_dataflash@0 {
|
mtd_dataflash@1 {
|
||||||
compatible = "atmel,at45", "atmel,dataflash";
|
compatible = "atmel,at45", "atmel,dataflash";
|
||||||
spi-max-frequency = <50000000>;
|
spi-max-frequency = <50000000>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
|
|
|
@ -570,7 +570,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1 {
|
usart1 {
|
||||||
pinctrl_usart1: usart1-0 {
|
pinctrl_usart1: usart1-0 {
|
||||||
atmel,pins =
|
atmel,pins =
|
||||||
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
|
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
|
||||||
|
|
|
@ -216,7 +216,7 @@
|
||||||
reg = <0x33000 0x14>;
|
reg = <0x33000 0x14>;
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: qspi@27200 {
|
qspi: spi@27200 {
|
||||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
||||||
reg = <0x027200 0x184>,
|
reg = <0x027200 0x184>,
|
||||||
<0x027000 0x124>,
|
<0x027000 0x124>,
|
||||||
|
|
|
@ -273,7 +273,7 @@
|
||||||
brcm,nand-has-wp;
|
brcm,nand-has-wp;
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: qspi@27200 {
|
qspi: spi@27200 {
|
||||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
|
||||||
reg = <0x027200 0x184>,
|
reg = <0x027200 0x184>,
|
||||||
<0x027000 0x124>,
|
<0x027000 0x124>,
|
||||||
|
|
|
@ -87,7 +87,7 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
clock-frequency = <100000>;
|
clock-frequency = <100000>;
|
||||||
|
|
||||||
si5351: clock-generator {
|
si5351: clock-generator@60 {
|
||||||
compatible = "silabs,si5351a-msop";
|
compatible = "silabs,si5351a-msop";
|
||||||
reg = <0x60>;
|
reg = <0x60>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
|
|
@ -155,7 +155,7 @@
|
||||||
0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */
|
0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */
|
||||||
0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
|
0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
|
||||||
|
|
||||||
spi0: spi-ctrl@10600 {
|
spi0: spi@10600 {
|
||||||
compatible = "marvell,orion-spi";
|
compatible = "marvell,orion-spi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
@ -168,7 +168,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c: i2c-ctrl@11000 {
|
i2c: i2c@11000 {
|
||||||
compatible = "marvell,mv64xxx-i2c";
|
compatible = "marvell,mv64xxx-i2c";
|
||||||
reg = <0x11000 0x20>;
|
reg = <0x11000 0x20>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -218,7 +218,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
spi1: spi-ctrl@14600 {
|
spi1: spi@14600 {
|
||||||
compatible = "marvell,orion-spi";
|
compatible = "marvell,orion-spi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
|
@ -1369,7 +1369,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: qspi@4b300000 {
|
qspi: spi@4b300000 {
|
||||||
compatible = "ti,dra7xxx-qspi";
|
compatible = "ti,dra7xxx-qspi";
|
||||||
reg = <0x4b300000 0x100>,
|
reg = <0x4b300000 0x100>,
|
||||||
<0x5c000000 0x4000000>;
|
<0x5c000000 0x4000000>;
|
||||||
|
|
|
@ -69,6 +69,8 @@
|
||||||
compatible = "samsung,s2mps14-pmic";
|
compatible = "samsung,s2mps14-pmic";
|
||||||
interrupt-parent = <&gpx3>;
|
interrupt-parent = <&gpx3>;
|
||||||
interrupts = <5 IRQ_TYPE_NONE>;
|
interrupts = <5 IRQ_TYPE_NONE>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&s2mps14_irq>;
|
||||||
reg = <0x66>;
|
reg = <0x66>;
|
||||||
|
|
||||||
s2mps14_osc: clocks {
|
s2mps14_osc: clocks {
|
||||||
|
@ -350,6 +352,11 @@
|
||||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>;
|
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>;
|
||||||
samsung,pin-val = <1>;
|
samsung,pin-val = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
s2mps14_irq: s2mps14-irq {
|
||||||
|
samsung,pins = "gpx3-5";
|
||||||
|
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&rtc {
|
&rtc {
|
||||||
|
|
|
@ -149,9 +149,11 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&hdmi {
|
&hdmi {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&hdmi_hpd>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
ddc = <&i2c_2>;
|
ddc = <&i2c_ddc>;
|
||||||
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>;
|
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
|
||||||
vdd_osc-supply = <&ldo10_reg>;
|
vdd_osc-supply = <&ldo10_reg>;
|
||||||
vdd_pll-supply = <&ldo8_reg>;
|
vdd_pll-supply = <&ldo8_reg>;
|
||||||
vdd-supply = <&ldo8_reg>;
|
vdd-supply = <&ldo8_reg>;
|
||||||
|
@ -168,6 +170,8 @@
|
||||||
reg = <0x66>;
|
reg = <0x66>;
|
||||||
interrupt-parent = <&gpx3>;
|
interrupt-parent = <&gpx3>;
|
||||||
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&s5m8767_irq>;
|
||||||
|
|
||||||
vinb1-supply = <&main_dc_reg>;
|
vinb1-supply = <&main_dc_reg>;
|
||||||
vinb2-supply = <&main_dc_reg>;
|
vinb2-supply = <&main_dc_reg>;
|
||||||
|
@ -452,13 +456,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c_2 {
|
|
||||||
status = "okay";
|
|
||||||
/* used by HDMI DDC */
|
|
||||||
samsung,i2c-sda-delay = <100>;
|
|
||||||
samsung,i2c-max-bus-freq = <66000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
&i2c_3 {
|
&i2c_3 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
|
@ -535,6 +532,13 @@
|
||||||
cap-sd-highspeed;
|
cap-sd-highspeed;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&pinctrl_0 {
|
||||||
|
s5m8767_irq: s5m8767-irq {
|
||||||
|
samsung,pins = "gpx3-2";
|
||||||
|
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&rtc {
|
&rtc {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
@ -547,3 +551,22 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
|
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&soc {
|
||||||
|
/*
|
||||||
|
* For unknown reasons HDMI-DDC does not work with Exynos I2C
|
||||||
|
* controllers. Lets use software I2C over GPIO pins as a workaround.
|
||||||
|
*/
|
||||||
|
i2c_ddc: i2c-gpio {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c2_gpio_bus>;
|
||||||
|
status = "okay";
|
||||||
|
compatible = "i2c-gpio";
|
||||||
|
gpios = <&gpa0 6 0 /* sda */
|
||||||
|
&gpa0 7 0 /* scl */
|
||||||
|
>;
|
||||||
|
i2c-gpio,delay-us = <2>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
|
@ -225,6 +225,12 @@
|
||||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
i2c2_gpio_bus: i2c2-gpio-bus {
|
||||||
|
samsung,pins = "gpa0-6", "gpa0-7";
|
||||||
|
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||||
|
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||||
|
};
|
||||||
|
|
||||||
uart2_data: uart2-data {
|
uart2_data: uart2-data {
|
||||||
samsung,pins = "gpa1-0", "gpa1-1";
|
samsung,pins = "gpa1-0", "gpa1-1";
|
||||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||||
|
@ -593,6 +599,11 @@
|
||||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
hdmi_hpd: hdmi-hpd {
|
||||||
|
samsung,pins = "gpx3-7";
|
||||||
|
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&pinctrl_1 {
|
&pinctrl_1 {
|
||||||
|
|
|
@ -20,6 +20,14 @@
|
||||||
|
|
||||||
samsung,model = "Snow-I2S-MAX98090";
|
samsung,model = "Snow-I2S-MAX98090";
|
||||||
samsung,audio-codec = <&max98090>;
|
samsung,audio-codec = <&max98090>;
|
||||||
|
|
||||||
|
cpu {
|
||||||
|
sound-dai = <&i2s0 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
codec {
|
||||||
|
sound-dai = <&max98090 0>, <&hdmi>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -31,6 +39,9 @@
|
||||||
interrupt-parent = <&gpx0>;
|
interrupt-parent = <&gpx0>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&max98090_irq>;
|
pinctrl-0 = <&max98090_irq>;
|
||||||
|
clocks = <&pmu_system_controller 0>;
|
||||||
|
clock-names = "mclk";
|
||||||
|
#sound-dai-cells = <1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -153,7 +153,7 @@
|
||||||
|
|
||||||
&clock_audss {
|
&clock_audss {
|
||||||
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
|
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
|
||||||
assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
|
assigned-clock-parents = <&clock CLK_MAU_EPLL>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&cpu0 {
|
&cpu0 {
|
||||||
|
@ -312,6 +312,7 @@
|
||||||
regulator-name = "vdd_1v35";
|
regulator-name = "vdd_1v35";
|
||||||
regulator-min-microvolt = <1350000>;
|
regulator-min-microvolt = <1350000>;
|
||||||
regulator-max-microvolt = <1350000>;
|
regulator-max-microvolt = <1350000>;
|
||||||
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
@ -333,6 +334,7 @@
|
||||||
regulator-name = "vdd_2v";
|
regulator-name = "vdd_2v";
|
||||||
regulator-min-microvolt = <2000000>;
|
regulator-min-microvolt = <2000000>;
|
||||||
regulator-max-microvolt = <2000000>;
|
regulator-max-microvolt = <2000000>;
|
||||||
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
@ -343,6 +345,7 @@
|
||||||
regulator-name = "vdd_1v8";
|
regulator-name = "vdd_1v8";
|
||||||
regulator-min-microvolt = <1800000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
regulator-max-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
|
|
@ -153,7 +153,7 @@
|
||||||
|
|
||||||
&clock_audss {
|
&clock_audss {
|
||||||
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
|
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
|
||||||
assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
|
assigned-clock-parents = <&clock CLK_MAU_EPLL>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&cpu0 {
|
&cpu0 {
|
||||||
|
@ -312,6 +312,7 @@
|
||||||
regulator-name = "vdd_1v35";
|
regulator-name = "vdd_1v35";
|
||||||
regulator-min-microvolt = <1350000>;
|
regulator-min-microvolt = <1350000>;
|
||||||
regulator-max-microvolt = <1350000>;
|
regulator-max-microvolt = <1350000>;
|
||||||
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
@ -333,6 +334,7 @@
|
||||||
regulator-name = "vdd_2v";
|
regulator-name = "vdd_2v";
|
||||||
regulator-min-microvolt = <2000000>;
|
regulator-min-microvolt = <2000000>;
|
||||||
regulator-max-microvolt = <2000000>;
|
regulator-max-microvolt = <2000000>;
|
||||||
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
@ -343,6 +345,7 @@
|
||||||
regulator-name = "vdd_1v8";
|
regulator-name = "vdd_1v8";
|
||||||
regulator-min-microvolt = <1800000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
regulator-max-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
|
|
|
@ -514,7 +514,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
ds1341: rtc@68 {
|
ds1341: rtc@68 {
|
||||||
compatible = "maxim,ds1341";
|
compatible = "dallas,ds1341";
|
||||||
reg = <0x68>;
|
reg = <0x68>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
>;
|
>;
|
||||||
fsl,soc-operating-points = <
|
fsl,soc-operating-points = <
|
||||||
/* KHz uV */
|
/* KHz uV */
|
||||||
900000 1175000
|
900000 1250000
|
||||||
792000 1175000
|
792000 1175000
|
||||||
528000 1175000
|
528000 1175000
|
||||||
396000 1175000
|
396000 1175000
|
||||||
|
|
|
@ -416,7 +416,7 @@
|
||||||
clock-names = "fck", "mmchsdb_fck";
|
clock-names = "fck", "mmchsdb_fck";
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: qspi@2940000 {
|
qspi: spi@2940000 {
|
||||||
compatible = "ti,k2g-qspi", "cdns,qspi-nor";
|
compatible = "ti,k2g-qspi", "cdns,qspi-nor";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
|
@ -179,7 +179,7 @@
|
||||||
* ssp0 and spi1 are shared pins;
|
* ssp0 and spi1 are shared pins;
|
||||||
* enable one in your board dts, as needed.
|
* enable one in your board dts, as needed.
|
||||||
*/
|
*/
|
||||||
ssp0: ssp@20084000 {
|
ssp0: spi@20084000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x20084000 0x1000>;
|
reg = <0x20084000 0x1000>;
|
||||||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
@ -199,7 +199,7 @@
|
||||||
* ssp1 and spi2 are shared pins;
|
* ssp1 and spi2 are shared pins;
|
||||||
* enable one in your board dts, as needed.
|
* enable one in your board dts, as needed.
|
||||||
*/
|
*/
|
||||||
ssp1: ssp@2008c000 {
|
ssp1: spi@2008c000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x2008c000 0x1000>;
|
reg = <0x2008c000 0x1000>;
|
||||||
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -194,7 +194,7 @@
|
||||||
#clock-cells = <1>;
|
#clock-cells = <1>;
|
||||||
#reset-cells = <1>;
|
#reset-cells = <1>;
|
||||||
compatible = "amlogic,meson8-clkc";
|
compatible = "amlogic,meson8-clkc";
|
||||||
reg = <0x8000 0x4>, <0x4000 0x460>;
|
reg = <0x8000 0x4>, <0x4000 0x400>;
|
||||||
};
|
};
|
||||||
|
|
||||||
reset: reset-controller@4404 {
|
reset: reset-controller@4404 {
|
||||||
|
|
|
@ -163,7 +163,7 @@
|
||||||
#clock-cells = <1>;
|
#clock-cells = <1>;
|
||||||
#reset-cells = <1>;
|
#reset-cells = <1>;
|
||||||
compatible = "amlogic,meson8b-clkc";
|
compatible = "amlogic,meson8b-clkc";
|
||||||
reg = <0x8000 0x4>, <0x4000 0x460>;
|
reg = <0x8000 0x4>, <0x4000 0x400>;
|
||||||
};
|
};
|
||||||
|
|
||||||
reset: reset-controller@4404 {
|
reset: reset-controller@4404 {
|
||||||
|
|
|
@ -114,7 +114,7 @@
|
||||||
dma-names = "tx", "rx";
|
dma-names = "tx", "rx";
|
||||||
};
|
};
|
||||||
|
|
||||||
mcspi1: mcspi@48098000 {
|
mcspi1: spi@48098000 {
|
||||||
compatible = "ti,omap2-mcspi";
|
compatible = "ti,omap2-mcspi";
|
||||||
ti,hwmods = "mcspi1";
|
ti,hwmods = "mcspi1";
|
||||||
reg = <0x48098000 0x100>;
|
reg = <0x48098000 0x100>;
|
||||||
|
@ -125,7 +125,7 @@
|
||||||
"tx2", "rx2", "tx3", "rx3";
|
"tx2", "rx2", "tx3", "rx3";
|
||||||
};
|
};
|
||||||
|
|
||||||
mcspi2: mcspi@4809a000 {
|
mcspi2: spi@4809a000 {
|
||||||
compatible = "ti,omap2-mcspi";
|
compatible = "ti,omap2-mcspi";
|
||||||
ti,hwmods = "mcspi2";
|
ti,hwmods = "mcspi2";
|
||||||
reg = <0x4809a000 0x100>;
|
reg = <0x4809a000 0x100>;
|
||||||
|
|
|
@ -285,7 +285,7 @@
|
||||||
ti,timer-alwon;
|
ti,timer-alwon;
|
||||||
};
|
};
|
||||||
|
|
||||||
mcspi3: mcspi@480b8000 {
|
mcspi3: spi@480b8000 {
|
||||||
compatible = "ti,omap2-mcspi";
|
compatible = "ti,omap2-mcspi";
|
||||||
ti,hwmods = "mcspi3";
|
ti,hwmods = "mcspi3";
|
||||||
reg = <0x480b8000 0x100>;
|
reg = <0x480b8000 0x100>;
|
||||||
|
|
|
@ -28,6 +28,7 @@
|
||||||
|
|
||||||
aliases {
|
aliases {
|
||||||
display0 = &lcd;
|
display0 = &lcd;
|
||||||
|
display1 = &tv0;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* fixed 26MHz oscillator */
|
/* fixed 26MHz oscillator */
|
||||||
|
@ -78,7 +79,7 @@
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi_lcd {
|
spi_lcd: spi_lcd {
|
||||||
compatible = "spi-gpio";
|
compatible = "spi-gpio";
|
||||||
#address-cells = <0x1>;
|
#address-cells = <0x1>;
|
||||||
#size-cells = <0x0>;
|
#size-cells = <0x0>;
|
||||||
|
@ -131,7 +132,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
tv0: connector {
|
tv0: connector {
|
||||||
compatible = "svideo-connector";
|
compatible = "composite-video-connector";
|
||||||
label = "tv";
|
label = "tv";
|
||||||
|
|
||||||
port {
|
port {
|
||||||
|
@ -143,7 +144,7 @@
|
||||||
|
|
||||||
tv_amp: opa362 {
|
tv_amp: opa362 {
|
||||||
compatible = "ti,opa362";
|
compatible = "ti,opa362";
|
||||||
enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; /* GPIO_23 to enable video out amplifier */
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -282,6 +283,13 @@
|
||||||
OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */
|
OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */
|
||||||
>;
|
>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
penirq_pins: pinmux_penirq_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* here we could enable to wakeup the cpu from suspend by a pen touch */
|
||||||
|
OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&omap3_pmx_core2 {
|
&omap3_pmx_core2 {
|
||||||
|
@ -422,10 +430,19 @@
|
||||||
tsc2007@48 {
|
tsc2007@48 {
|
||||||
compatible = "ti,tsc2007";
|
compatible = "ti,tsc2007";
|
||||||
reg = <0x48>;
|
reg = <0x48>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&penirq_pins>;
|
||||||
interrupt-parent = <&gpio6>;
|
interrupt-parent = <&gpio6>;
|
||||||
interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */
|
interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */
|
||||||
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
|
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* GPIO_160 */
|
||||||
ti,x-plate-ohms = <600>;
|
ti,x-plate-ohms = <600>;
|
||||||
|
touchscreen-size-x = <480>;
|
||||||
|
touchscreen-size-y = <640>;
|
||||||
|
touchscreen-max-pressure = <1000>;
|
||||||
|
touchscreen-fuzz-x = <3>;
|
||||||
|
touchscreen-fuzz-y = <8>;
|
||||||
|
touchscreen-fuzz-pressure = <10>;
|
||||||
|
touchscreen-inverted-y;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* RFID EEPROM */
|
/* RFID EEPROM */
|
||||||
|
@ -531,6 +548,12 @@
|
||||||
regulator-max-microvolt = <3150000>;
|
regulator-max-microvolt = <3150000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* Needed to power the DPI pins */
|
||||||
|
|
||||||
|
&vpll2 {
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
&dss {
|
&dss {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = < &dss_dpi_pins >;
|
pinctrl-0 = < &dss_dpi_pins >;
|
||||||
|
@ -551,10 +574,14 @@
|
||||||
|
|
||||||
vdda-supply = <&vdac>;
|
vdda-supply = <&vdac>;
|
||||||
|
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
port {
|
port {
|
||||||
|
reg = <0>;
|
||||||
venc_out: endpoint {
|
venc_out: endpoint {
|
||||||
remote-endpoint = <&opa_in>;
|
remote-endpoint = <&opa_in>;
|
||||||
ti,channels = <2>;
|
ti,channels = <1>;
|
||||||
ti,invert-polarity;
|
ti,invert-polarity;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -598,22 +625,22 @@
|
||||||
|
|
||||||
bootloaders@80000 {
|
bootloaders@80000 {
|
||||||
label = "U-Boot";
|
label = "U-Boot";
|
||||||
reg = <0x80000 0x1e0000>;
|
reg = <0x80000 0x1c0000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
bootloaders_env@260000 {
|
bootloaders_env@240000 {
|
||||||
label = "U-Boot Env";
|
label = "U-Boot Env";
|
||||||
reg = <0x260000 0x20000>;
|
reg = <0x240000 0x40000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
kernel@280000 {
|
kernel@280000 {
|
||||||
label = "Kernel";
|
label = "Kernel";
|
||||||
reg = <0x280000 0x400000>;
|
reg = <0x280000 0x600000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
filesystem@680000 {
|
filesystem@880000 {
|
||||||
label = "File System";
|
label = "File System";
|
||||||
reg = <0x680000 0xf980000>;
|
reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -40,7 +40,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c3 {
|
&i2c3 {
|
||||||
ak8975@0f {
|
ak8975@f {
|
||||||
compatible = "asahi-kasei,ak8975";
|
compatible = "asahi-kasei,ak8975";
|
||||||
reg = <0x0f>;
|
reg = <0x0f>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -156,7 +156,7 @@
|
||||||
&i2c {
|
&i2c {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
rtc {
|
rtc@32 {
|
||||||
compatible = "ricoh,rs5c372a";
|
compatible = "ricoh,rs5c372a";
|
||||||
reg = <0x32>;
|
reg = <0x32>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -80,6 +80,10 @@
|
||||||
#pwm-cells = <1>;
|
#pwm-cells = <1>;
|
||||||
clocks = <&clks CLK_PWM1>;
|
clocks = <&clks CLK_PWM1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
rtc@40900000 {
|
||||||
|
clocks = <&clks CLK_OSC32k768>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
timer@40a00000 {
|
timer@40a00000 {
|
||||||
|
|
|
@ -71,7 +71,7 @@
|
||||||
clocks = <&clks CLK_PWM1>;
|
clocks = <&clks CLK_PWM1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pwri2c: i2c@40f000180 {
|
pwri2c: i2c@40f00180 {
|
||||||
compatible = "mrvl,pxa-i2c";
|
compatible = "mrvl,pxa-i2c";
|
||||||
reg = <0x40f00180 0x24>;
|
reg = <0x40f00180 0x24>;
|
||||||
interrupts = <6>;
|
interrupts = <6>;
|
||||||
|
@ -113,6 +113,10 @@
|
||||||
|
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
rtc@40900000 {
|
||||||
|
clocks = <&clks CLK_OSC32k768>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
clocks {
|
clocks {
|
||||||
|
|
|
@ -313,7 +313,7 @@
|
||||||
|
|
||||||
saw0: regulator@b089000 {
|
saw0: regulator@b089000 {
|
||||||
compatible = "qcom,saw2";
|
compatible = "qcom,saw2";
|
||||||
reg = <0x02089000 0x1000>, <0x0b009000 0x1000>;
|
reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
|
||||||
regulator;
|
regulator;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -344,7 +344,7 @@
|
||||||
|
|
||||||
sata: sata@fc600000 {
|
sata: sata@fc600000 {
|
||||||
compatible = "renesas,sata-r8a7779", "renesas,rcar-sata";
|
compatible = "renesas,sata-r8a7779", "renesas,rcar-sata";
|
||||||
reg = <0xfc600000 0x2000>;
|
reg = <0xfc600000 0x200000>;
|
||||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&mstp1_clks R8A7779_CLK_SATA>;
|
clocks = <&mstp1_clks R8A7779_CLK_SATA>;
|
||||||
power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
|
||||||
|
|
|
@ -1559,7 +1559,7 @@
|
||||||
sata0: sata@ee300000 {
|
sata0: sata@ee300000 {
|
||||||
compatible = "renesas,sata-r8a7790",
|
compatible = "renesas,sata-r8a7790",
|
||||||
"renesas,rcar-gen2-sata";
|
"renesas,rcar-gen2-sata";
|
||||||
reg = <0 0xee300000 0 0x2000>;
|
reg = <0 0xee300000 0 0x200000>;
|
||||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 815>;
|
clocks = <&cpg CPG_MOD 815>;
|
||||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||||
|
@ -1570,7 +1570,7 @@
|
||||||
sata1: sata@ee500000 {
|
sata1: sata@ee500000 {
|
||||||
compatible = "renesas,sata-r8a7790",
|
compatible = "renesas,sata-r8a7790",
|
||||||
"renesas,rcar-gen2-sata";
|
"renesas,rcar-gen2-sata";
|
||||||
reg = <0 0xee500000 0 0x2000>;
|
reg = <0 0xee500000 0 0x200000>;
|
||||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 814>;
|
clocks = <&cpg CPG_MOD 814>;
|
||||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||||
|
|
|
@ -1543,7 +1543,7 @@
|
||||||
sata0: sata@ee300000 {
|
sata0: sata@ee300000 {
|
||||||
compatible = "renesas,sata-r8a7791",
|
compatible = "renesas,sata-r8a7791",
|
||||||
"renesas,rcar-gen2-sata";
|
"renesas,rcar-gen2-sata";
|
||||||
reg = <0 0xee300000 0 0x2000>;
|
reg = <0 0xee300000 0 0x200000>;
|
||||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 815>;
|
clocks = <&cpg CPG_MOD 815>;
|
||||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||||
|
@ -1554,7 +1554,7 @@
|
||||||
sata1: sata@ee500000 {
|
sata1: sata@ee500000 {
|
||||||
compatible = "renesas,sata-r8a7791",
|
compatible = "renesas,sata-r8a7791",
|
||||||
"renesas,rcar-gen2-sata";
|
"renesas,rcar-gen2-sata";
|
||||||
reg = <0 0xee500000 0 0x2000>;
|
reg = <0 0xee500000 0 0x200000>;
|
||||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 814>;
|
clocks = <&cpg CPG_MOD 814>;
|
||||||
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
|
||||||
|
|
|
@ -733,7 +733,7 @@
|
||||||
/* no rts / cts for uart2 */
|
/* no rts / cts for uart2 */
|
||||||
};
|
};
|
||||||
|
|
||||||
spi {
|
spi-pins {
|
||||||
spi_txd:spi-txd {
|
spi_txd:spi-txd {
|
||||||
rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
|
rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -93,6 +93,8 @@
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
regulator-max-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
||||||
gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
|
gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sdmmc_pwr>;
|
||||||
startup-delay-us = <100000>;
|
startup-delay-us = <100000>;
|
||||||
vin-supply = <&vcc_io>;
|
vin-supply = <&vcc_io>;
|
||||||
};
|
};
|
||||||
|
@ -315,6 +317,12 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
sd0 {
|
||||||
|
sdmmc_pwr: sdmmc-pwr {
|
||||||
|
rockchip,pins = <RK_GPIO3 1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
usb {
|
usb {
|
||||||
host_vbus_drv: host-vbus-drv {
|
host_vbus_drv: host-vbus-drv {
|
||||||
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
|
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
|
|
@ -88,7 +88,7 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
clock-frequency = <100000>;
|
clock-frequency = <100000>;
|
||||||
|
|
||||||
adxl345: adxl345@0 {
|
adxl345: adxl345@53 {
|
||||||
compatible = "adi,adxl345";
|
compatible = "adi,adxl345";
|
||||||
reg = <0x53>;
|
reg = <0x53>;
|
||||||
|
|
||||||
|
|
|
@ -197,7 +197,7 @@
|
||||||
<0xa0410100 0x100>;
|
<0xa0410100 0x100>;
|
||||||
};
|
};
|
||||||
|
|
||||||
scu@a04100000 {
|
scu@a0410000 {
|
||||||
compatible = "arm,cortex-a9-scu";
|
compatible = "arm,cortex-a9-scu";
|
||||||
reg = <0xa0410000 0x100>;
|
reg = <0xa0410000 0x100>;
|
||||||
};
|
};
|
||||||
|
@ -878,7 +878,7 @@
|
||||||
power-domains = <&pm_domains DOMAIN_VAPE>;
|
power-domains = <&pm_domains DOMAIN_VAPE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp@80002000 {
|
spi@80002000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x80002000 0x1000>;
|
reg = <0x80002000 0x1000>;
|
||||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
@ -892,7 +892,7 @@
|
||||||
power-domains = <&pm_domains DOMAIN_VAPE>;
|
power-domains = <&pm_domains DOMAIN_VAPE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp@80003000 {
|
spi@80003000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x80003000 0x1000>;
|
reg = <0x80003000 0x1000>;
|
||||||
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -607,16 +607,20 @@
|
||||||
|
|
||||||
mcde {
|
mcde {
|
||||||
lcd_default_mode: lcd_default {
|
lcd_default_mode: lcd_default {
|
||||||
default_mux {
|
default_mux1 {
|
||||||
/* Mux in VSI0 and all the data lines */
|
/* Mux in VSI0 and all the data lines */
|
||||||
function = "lcd";
|
function = "lcd";
|
||||||
groups =
|
groups =
|
||||||
"lcdvsi0_a_1", /* VSI0 for LCD */
|
"lcdvsi0_a_1", /* VSI0 for LCD */
|
||||||
"lcd_d0_d7_a_1", /* Data lines */
|
"lcd_d0_d7_a_1", /* Data lines */
|
||||||
"lcd_d8_d11_a_1", /* TV-out */
|
"lcd_d8_d11_a_1", /* TV-out */
|
||||||
"lcdaclk_b_1", /* Clock line for TV-out */
|
|
||||||
"lcdvsi1_a_1"; /* VSI1 for HDMI */
|
"lcdvsi1_a_1"; /* VSI1 for HDMI */
|
||||||
};
|
};
|
||||||
|
default_mux2 {
|
||||||
|
function = "lcda";
|
||||||
|
groups =
|
||||||
|
"lcdaclk_b_1"; /* Clock line for TV-out */
|
||||||
|
};
|
||||||
default_cfg1 {
|
default_cfg1 {
|
||||||
pins =
|
pins =
|
||||||
"GPIO68_E1", /* VSI0 */
|
"GPIO68_E1", /* VSI0 */
|
||||||
|
|
|
@ -57,7 +57,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp@80002000 {
|
spi@80002000 {
|
||||||
/*
|
/*
|
||||||
* On the first generation boards, this SSP/SPI port was connected
|
* On the first generation boards, this SSP/SPI port was connected
|
||||||
* to the AB8500.
|
* to the AB8500.
|
||||||
|
|
|
@ -376,7 +376,7 @@
|
||||||
pinctrl-1 = <&i2c3_sleep_mode>;
|
pinctrl-1 = <&i2c3_sleep_mode>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp@80002000 {
|
spi@80002000 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&ssp0_snowball_mode>;
|
pinctrl-0 = <&ssp0_snowball_mode>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -442,7 +442,7 @@
|
||||||
dma-names = "rx";
|
dma-names = "rx";
|
||||||
};
|
};
|
||||||
|
|
||||||
spi: ssp@c0006000 {
|
spi: spi@c0006000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0xc0006000 0x1000>;
|
reg = <0xc0006000 0x1000>;
|
||||||
interrupt-parent = <&vica>;
|
interrupt-parent = <&vica>;
|
||||||
|
|
|
@ -6,6 +6,7 @@
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
#include "stm32mp157c-ed1.dts"
|
#include "stm32mp157c-ed1.dts"
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
|
model = "STMicroelectronics STM32MP157C eval daughter on eval mother";
|
||||||
|
@ -19,6 +20,58 @@
|
||||||
serial0 = &uart4;
|
serial0 = &uart4;
|
||||||
ethernet0 = ðernet0;
|
ethernet0 = ðernet0;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
panel_backlight: panel-backlight {
|
||||||
|
compatible = "gpio-backlight";
|
||||||
|
gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
|
||||||
|
default-on;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&cec {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&cec_pins_a>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&dsi {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ports {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
port@0 {
|
||||||
|
reg = <0>;
|
||||||
|
dsi_in: endpoint {
|
||||||
|
remote-endpoint = <<dc_ep0_out>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
port@1 {
|
||||||
|
reg = <1>;
|
||||||
|
dsi_out: endpoint {
|
||||||
|
remote-endpoint = <&dsi_panel_in>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
panel-dsi@0 {
|
||||||
|
compatible = "raydium,rm68200";
|
||||||
|
reg = <0>;
|
||||||
|
reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
|
||||||
|
backlight = <&panel_backlight>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
port {
|
||||||
|
dsi_panel_in: endpoint {
|
||||||
|
remote-endpoint = <&dsi_out>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
ðernet0 {
|
ðernet0 {
|
||||||
|
@ -40,12 +93,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&cec {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&cec_pins_a>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&i2c2 {
|
&i2c2 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&i2c2_pins_a>;
|
pinctrl-0 = <&i2c2_pins_a>;
|
||||||
|
@ -62,6 +109,20 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
<dc {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
port {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
ltdc_ep0_out: endpoint@0 {
|
||||||
|
reg = <0>;
|
||||||
|
remote-endpoint = <&dsi_in>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&m_can1 {
|
&m_can1 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&m_can1_pins_a>;
|
pinctrl-0 = <&m_can1_pins_a>;
|
||||||
|
|
|
@ -947,7 +947,7 @@
|
||||||
dma-requests = <48>;
|
dma-requests = <48>;
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: qspi@58003000 {
|
qspi: spi@58003000 {
|
||||||
compatible = "st,stm32f469-qspi";
|
compatible = "st,stm32f469-qspi";
|
||||||
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
|
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
|
||||||
reg-names = "qspi", "qspi_mm";
|
reg-names = "qspi", "qspi_mm";
|
||||||
|
|
|
@ -92,7 +92,8 @@
|
||||||
*/
|
*/
|
||||||
clock-frequency = <400000>;
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
touchscreen: touchscreen {
|
touchscreen: touchscreen@40 {
|
||||||
|
reg = <0x40>;
|
||||||
interrupt-parent = <&pio>;
|
interrupt-parent = <&pio>;
|
||||||
interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
|
interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
|
|
@ -69,7 +69,8 @@
|
||||||
*/
|
*/
|
||||||
clock-frequency = <400000>;
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
touchscreen: touchscreen@0 {
|
touchscreen: touchscreen@40 {
|
||||||
|
reg = <0x40>;
|
||||||
interrupt-parent = <&pio>;
|
interrupt-parent = <&pio>;
|
||||||
interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
|
interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
|
|
@ -95,7 +95,7 @@
|
||||||
&i2c0 {
|
&i2c0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
axp22x: pmic@68 {
|
axp22x: pmic@34 {
|
||||||
compatible = "x-powers,axp221";
|
compatible = "x-powers,axp221";
|
||||||
reg = <0x34>;
|
reg = <0x34>;
|
||||||
interrupt-parent = <&nmi_intc>;
|
interrupt-parent = <&nmi_intc>;
|
||||||
|
|
|
@ -1196,7 +1196,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
r_rsb: i2c@8003400 {
|
r_rsb: rsb@8003400 {
|
||||||
compatible = "allwinner,sun8i-a23-rsb";
|
compatible = "allwinner,sun8i-a23-rsb";
|
||||||
reg = <0x08003400 0x400>;
|
reg = <0x08003400 0x400>;
|
||||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -524,10 +524,10 @@
|
||||||
gpio-keys {
|
gpio-keys {
|
||||||
compatible = "gpio-keys";
|
compatible = "gpio-keys";
|
||||||
|
|
||||||
power {
|
wakeup {
|
||||||
label = "Power";
|
label = "Wakeup";
|
||||||
gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
|
gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
|
||||||
linux,code = <KEY_POWER>;
|
linux,code = <KEY_WAKEUP>;
|
||||||
wakeup-source;
|
wakeup-source;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -419,19 +419,6 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
gmi@70009000 {
|
|
||||||
compatible = "nvidia,tegra20-gmi";
|
|
||||||
reg = <0x70009000 0x1000>;
|
|
||||||
#address-cells = <2>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0 0 0xd0000000 0xfffffff>;
|
|
||||||
clocks = <&tegra_car TEGRA20_CLK_NOR>;
|
|
||||||
clock-names = "gmi";
|
|
||||||
resets = <&tegra_car 42>;
|
|
||||||
reset-names = "gmi";
|
|
||||||
status = "disabled";
|
|
||||||
};
|
|
||||||
|
|
||||||
nand-controller@70008000 {
|
nand-controller@70008000 {
|
||||||
compatible = "nvidia,tegra20-nand";
|
compatible = "nvidia,tegra20-nand";
|
||||||
reg = <0x70008000 0x100>;
|
reg = <0x70008000 0x100>;
|
||||||
|
@ -447,6 +434,19 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
gmi@70009000 {
|
||||||
|
compatible = "nvidia,tegra20-gmi";
|
||||||
|
reg = <0x70009000 0x1000>;
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0 0 0xd0000000 0xfffffff>;
|
||||||
|
clocks = <&tegra_car TEGRA20_CLK_NOR>;
|
||||||
|
clock-names = "gmi";
|
||||||
|
resets = <&tegra_car 42>;
|
||||||
|
reset-names = "gmi";
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
pwm: pwm@7000a000 {
|
pwm: pwm@7000a000 {
|
||||||
compatible = "nvidia,tegra20-pwm";
|
compatible = "nvidia,tegra20-pwm";
|
||||||
reg = <0x7000a000 0x100>;
|
reg = <0x7000a000 0x100>;
|
||||||
|
|
|
@ -171,14 +171,14 @@
|
||||||
|
|
||||||
/* Apalis MMC1 */
|
/* Apalis MMC1 */
|
||||||
sdmmc3_clk_pa6 {
|
sdmmc3_clk_pa6 {
|
||||||
nvidia,pins = "sdmmc3_clk_pa6",
|
nvidia,pins = "sdmmc3_clk_pa6";
|
||||||
"sdmmc3_cmd_pa7";
|
|
||||||
nvidia,function = "sdmmc3";
|
nvidia,function = "sdmmc3";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
sdmmc3_dat0_pb7 {
|
sdmmc3_dat0_pb7 {
|
||||||
nvidia,pins = "sdmmc3_dat0_pb7",
|
nvidia,pins = "sdmmc3_cmd_pa7",
|
||||||
|
"sdmmc3_dat0_pb7",
|
||||||
"sdmmc3_dat1_pb6",
|
"sdmmc3_dat1_pb6",
|
||||||
"sdmmc3_dat2_pb5",
|
"sdmmc3_dat2_pb5",
|
||||||
"sdmmc3_dat3_pb4",
|
"sdmmc3_dat3_pb4",
|
||||||
|
@ -659,7 +659,7 @@
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
clocks = <&clk16m>;
|
clocks = <&clk16m>;
|
||||||
interrupt-parent = <&gpio>;
|
interrupt-parent = <&gpio>;
|
||||||
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_RISING>;
|
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
|
||||||
spi-max-frequency = <10000000>;
|
spi-max-frequency = <10000000>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -674,7 +674,7 @@
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
clocks = <&clk16m>;
|
clocks = <&clk16m>;
|
||||||
interrupt-parent = <&gpio>;
|
interrupt-parent = <&gpio>;
|
||||||
interrupts = <TEGRA_GPIO(W, 2) IRQ_TYPE_EDGE_RISING>;
|
interrupts = <TEGRA_GPIO(W, 2) IRQ_TYPE_EDGE_FALLING>;
|
||||||
spi-max-frequency = <10000000>;
|
spi-max-frequency = <10000000>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -79,7 +79,8 @@
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
clocks = <&clk16m>;
|
clocks = <&clk16m>;
|
||||||
interrupt-parent = <&gpio>;
|
interrupt-parent = <&gpio>;
|
||||||
interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_EDGE_RISING>;
|
/* CAN_INT */
|
||||||
|
interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_EDGE_FALLING>;
|
||||||
spi-max-frequency = <10000000>;
|
spi-max-frequency = <10000000>;
|
||||||
};
|
};
|
||||||
spidev0: spi@1 {
|
spidev0: spi@1 {
|
||||||
|
|
|
@ -896,7 +896,7 @@
|
||||||
nvidia,elastic-limit = <16>;
|
nvidia,elastic-limit = <16>;
|
||||||
nvidia,term-range-adj = <6>;
|
nvidia,term-range-adj = <6>;
|
||||||
nvidia,xcvr-setup = <51>;
|
nvidia,xcvr-setup = <51>;
|
||||||
nvidia.xcvr-setup-use-fuses;
|
nvidia,xcvr-setup-use-fuses;
|
||||||
nvidia,xcvr-lsfslew = <1>;
|
nvidia,xcvr-lsfslew = <1>;
|
||||||
nvidia,xcvr-lsrslew = <1>;
|
nvidia,xcvr-lsrslew = <1>;
|
||||||
nvidia,xcvr-hsslew = <32>;
|
nvidia,xcvr-hsslew = <32>;
|
||||||
|
@ -933,7 +933,7 @@
|
||||||
nvidia,elastic-limit = <16>;
|
nvidia,elastic-limit = <16>;
|
||||||
nvidia,term-range-adj = <6>;
|
nvidia,term-range-adj = <6>;
|
||||||
nvidia,xcvr-setup = <51>;
|
nvidia,xcvr-setup = <51>;
|
||||||
nvidia.xcvr-setup-use-fuses;
|
nvidia,xcvr-setup-use-fuses;
|
||||||
nvidia,xcvr-lsfslew = <2>;
|
nvidia,xcvr-lsfslew = <2>;
|
||||||
nvidia,xcvr-lsrslew = <2>;
|
nvidia,xcvr-lsrslew = <2>;
|
||||||
nvidia,xcvr-hsslew = <32>;
|
nvidia,xcvr-hsslew = <32>;
|
||||||
|
@ -969,7 +969,7 @@
|
||||||
nvidia,elastic-limit = <16>;
|
nvidia,elastic-limit = <16>;
|
||||||
nvidia,term-range-adj = <6>;
|
nvidia,term-range-adj = <6>;
|
||||||
nvidia,xcvr-setup = <51>;
|
nvidia,xcvr-setup = <51>;
|
||||||
nvidia.xcvr-setup-use-fuses;
|
nvidia,xcvr-setup-use-fuses;
|
||||||
nvidia,xcvr-lsfslew = <2>;
|
nvidia,xcvr-lsfslew = <2>;
|
||||||
nvidia,xcvr-lsrslew = <2>;
|
nvidia,xcvr-lsrslew = <2>;
|
||||||
nvidia,xcvr-hsslew = <32>;
|
nvidia,xcvr-hsslew = <32>;
|
||||||
|
|
|
@ -373,7 +373,7 @@
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp@101f4000 {
|
spi@101f4000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x101f4000 0x1000>;
|
reg = <0x101f4000 0x1000>;
|
||||||
interrupts = <11>;
|
interrupts = <11>;
|
||||||
|
|
|
@ -174,17 +174,17 @@
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
reg = <7>;
|
reg = <7>;
|
||||||
hwmon@52 {
|
hwmon@34 {
|
||||||
compatible = "ti,ucd9248";
|
compatible = "ti,ucd9248";
|
||||||
reg = <52>;
|
reg = <0x34>;
|
||||||
};
|
};
|
||||||
hwmon@53 {
|
hwmon@35 {
|
||||||
compatible = "ti,ucd9248";
|
compatible = "ti,ucd9248";
|
||||||
reg = <53>;
|
reg = <0x35>;
|
||||||
};
|
};
|
||||||
hwmon@54 {
|
hwmon@36 {
|
||||||
compatible = "ti,ucd9248";
|
compatible = "ti,ucd9248";
|
||||||
reg = <54>;
|
reg = <0x36>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -68,7 +68,7 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
num-cs = <4>;
|
num-cs = <4>;
|
||||||
is-decoded-cs = <0>;
|
is-decoded-cs = <0>;
|
||||||
flash@0 {
|
flash@1 {
|
||||||
compatible = "sst25wf080", "jedec,spi-nor";
|
compatible = "sst25wf080", "jedec,spi-nor";
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
spi-max-frequency = <1000000>;
|
spi-max-frequency = <1000000>;
|
||||||
|
|
|
@ -62,7 +62,7 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
num-cs = <4>;
|
num-cs = <4>;
|
||||||
is-decoded-cs = <0>;
|
is-decoded-cs = <0>;
|
||||||
eeprom: eeprom@0 {
|
eeprom: eeprom@2 {
|
||||||
at25,byte-len = <8192>;
|
at25,byte-len = <8192>;
|
||||||
at25,addr-mode = <2>;
|
at25,addr-mode = <2>;
|
||||||
at25,page-size = <32>;
|
at25,page-size = <32>;
|
||||||
|
|
|
@ -236,7 +236,7 @@ static void __exit crc32_pmull_mod_exit(void)
|
||||||
ARRAY_SIZE(crc32_pmull_algs));
|
ARRAY_SIZE(crc32_pmull_algs));
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct cpu_feature crc32_cpu_feature[] = {
|
static const struct cpu_feature __maybe_unused crc32_cpu_feature[] = {
|
||||||
{ cpu_feature(CRC32) }, { cpu_feature(PMULL) }, { }
|
{ cpu_feature(CRC32) }, { cpu_feature(PMULL) }, { }
|
||||||
};
|
};
|
||||||
MODULE_DEVICE_TABLE(cpu, crc32_cpu_feature);
|
MODULE_DEVICE_TABLE(cpu, crc32_cpu_feature);
|
||||||
|
|
|
@ -143,15 +143,15 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set)
|
||||||
|
|
||||||
/* Check if enabled on SHDWC. */
|
/* Check if enabled on SHDWC. */
|
||||||
if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))
|
if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))
|
||||||
goto put_node;
|
goto put_device;
|
||||||
|
|
||||||
mode |= wsi->pmc_fsmr_bit;
|
mode |= wsi->pmc_fsmr_bit;
|
||||||
if (wsi->set_polarity)
|
if (wsi->set_polarity)
|
||||||
polarity |= wsi->pmc_fsmr_bit;
|
polarity |= wsi->pmc_fsmr_bit;
|
||||||
}
|
}
|
||||||
|
|
||||||
put_node:
|
put_device:
|
||||||
of_node_put(np);
|
put_device(&pdev->dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (mode) {
|
if (mode) {
|
||||||
|
|
|
@ -618,6 +618,28 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
|
||||||
IMX6Q_GPR1_GINT);
|
IMX6Q_GPR1_GINT);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void imx6_pm_stby_poweroff(void)
|
||||||
|
{
|
||||||
|
imx6_set_lpm(STOP_POWER_OFF);
|
||||||
|
imx6q_suspend_finish(0);
|
||||||
|
|
||||||
|
mdelay(1000);
|
||||||
|
|
||||||
|
pr_emerg("Unable to poweroff system\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
static int imx6_pm_stby_poweroff_probe(void)
|
||||||
|
{
|
||||||
|
if (pm_power_off) {
|
||||||
|
pr_warn("%s: pm_power_off already claimed %p %pf!\n",
|
||||||
|
__func__, pm_power_off, pm_power_off);
|
||||||
|
return -EBUSY;
|
||||||
|
}
|
||||||
|
|
||||||
|
pm_power_off = imx6_pm_stby_poweroff;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
void __init imx6_pm_ccm_init(const char *ccm_compat)
|
void __init imx6_pm_ccm_init(const char *ccm_compat)
|
||||||
{
|
{
|
||||||
struct device_node *np;
|
struct device_node *np;
|
||||||
|
@ -634,6 +656,9 @@ void __init imx6_pm_ccm_init(const char *ccm_compat)
|
||||||
val = readl_relaxed(ccm_base + CLPCR);
|
val = readl_relaxed(ccm_base + CLPCR);
|
||||||
val &= ~BM_CLPCR_LPM;
|
val &= ~BM_CLPCR_LPM;
|
||||||
writel_relaxed(val, ccm_base + CLPCR);
|
writel_relaxed(val, ccm_base + CLPCR);
|
||||||
|
|
||||||
|
if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))
|
||||||
|
imx6_pm_stby_poweroff_probe();
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init imx6q_pm_init(void)
|
void __init imx6q_pm_init(void)
|
||||||
|
|
|
@ -125,9 +125,9 @@
|
||||||
|
|
||||||
®_dcdc1 {
|
®_dcdc1 {
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
regulator-min-microvolt = <3000000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
regulator-max-microvolt = <3000000>;
|
regulator-max-microvolt = <3300000>;
|
||||||
regulator-name = "vcc-3v";
|
regulator-name = "vcc-3v3";
|
||||||
};
|
};
|
||||||
|
|
||||||
®_dcdc2 {
|
®_dcdc2 {
|
||||||
|
|
|
@ -142,10 +142,14 @@
|
||||||
|
|
||||||
/* DCDC3 is polyphased with DCDC2 */
|
/* DCDC3 is polyphased with DCDC2 */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
|
||||||
|
* 1.35V that the PMIC can drive.
|
||||||
|
*/
|
||||||
®_dcdc5 {
|
®_dcdc5 {
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
regulator-min-microvolt = <1500000>;
|
regulator-min-microvolt = <1360000>;
|
||||||
regulator-max-microvolt = <1500000>;
|
regulator-max-microvolt = <1360000>;
|
||||||
regulator-name = "vcc-ddr3";
|
regulator-name = "vcc-ddr3";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -67,7 +67,9 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&mmc0_pins>;
|
pinctrl-0 = <&mmc0_pins>;
|
||||||
vmmc-supply = <®_dcdc1>;
|
vmmc-supply = <®_dcdc1>;
|
||||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
|
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
|
||||||
|
disable-wp;
|
||||||
|
bus-width = <4>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -124,6 +124,8 @@
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
clock-frequency = <100000>;
|
clock-frequency = <100000>;
|
||||||
|
i2c-sda-falling-time-ns = <890>; /* hcnt */
|
||||||
|
i2c-sdl-falling-time-ns = <890>; /* lcnt */
|
||||||
|
|
||||||
adc@14 {
|
adc@14 {
|
||||||
compatible = "lltc,ltc2497";
|
compatible = "lltc,ltc2497";
|
||||||
|
|
|
@ -107,7 +107,7 @@
|
||||||
clock-names = "uartclk", "apb_pclk";
|
clock-names = "uartclk", "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
spi0: ssp@e1020000 {
|
spi0: spi@e1020000 {
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0 0xe1020000 0 0x1000>;
|
reg = <0 0xe1020000 0 0x1000>;
|
||||||
|
@ -117,7 +117,7 @@
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
|
|
||||||
spi1: ssp@e1030000 {
|
spi1: spi@e1030000 {
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0 0xe1030000 0 0x1000>;
|
reg = <0 0xe1030000 0 0x1000>;
|
||||||
|
|
|
@ -458,7 +458,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
ethmac: ethernet@ff3f0000 {
|
ethmac: ethernet@ff3f0000 {
|
||||||
compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
|
compatible = "amlogic,meson-axg-dwmac", "snps,dwmac";
|
||||||
reg = <0x0 0xff3f0000 0x0 0x10000
|
reg = <0x0 0xff3f0000 0x0 0x10000
|
||||||
0x0 0xff634540 0x0 0x8>;
|
0x0 0xff634540 0x0 0x8>;
|
||||||
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
|
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
|
||||||
|
|
|
@ -390,7 +390,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
spi_pins: spi {
|
spi_pins: spi-pins {
|
||||||
mux {
|
mux {
|
||||||
groups = "spi_miso",
|
groups = "spi_miso",
|
||||||
"spi_mosi",
|
"spi_mosi",
|
||||||
|
|
|
@ -13,7 +13,7 @@
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
|
compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
|
||||||
model = "Libre Technology CC";
|
model = "Libre Computer Board AML-S905X-CC";
|
||||||
|
|
||||||
aliases {
|
aliases {
|
||||||
serial0 = &uart_AO;
|
serial0 = &uart_AO;
|
||||||
|
|
|
@ -337,7 +337,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
spi_pins: spi {
|
spi_pins: spi-pins {
|
||||||
mux {
|
mux {
|
||||||
groups = "spi_miso",
|
groups = "spi_miso",
|
||||||
"spi_mosi",
|
"spi_mosi",
|
||||||
|
|
|
@ -639,7 +639,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp0: ssp@66180000 {
|
ssp0: spi@66180000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x66180000 0x1000>;
|
reg = <0x66180000 0x1000>;
|
||||||
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
@ -650,7 +650,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp1: ssp@66190000 {
|
ssp1: spi@66190000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x66190000 0x1000>;
|
reg = <0x66190000 0x1000>;
|
||||||
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -138,7 +138,7 @@
|
||||||
&i2c1 {
|
&i2c1 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
pcf8574: pcf8574@20 {
|
pcf8574: pcf8574@27 {
|
||||||
compatible = "nxp,pcf8574a";
|
compatible = "nxp,pcf8574a";
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
|
|
|
@ -520,7 +520,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp0: ssp@180000 {
|
ssp0: spi@180000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x00180000 0x1000>;
|
reg = <0x00180000 0x1000>;
|
||||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
@ -532,7 +532,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
ssp1: ssp@190000 {
|
ssp1: spi@190000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x00190000 0x1000>;
|
reg = <0x00190000 0x1000>;
|
||||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -337,7 +337,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
dspi: dspi@2100000 {
|
dspi: spi@2100000 {
|
||||||
compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
|
compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
|
@ -284,7 +284,7 @@
|
||||||
interrupts = <0 43 0x4>;
|
interrupts = <0 43 0x4>;
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: quadspi@1550000 {
|
qspi: spi@1550000 {
|
||||||
compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
|
compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
@ -382,7 +382,7 @@
|
||||||
ranges = <0x0 0x5 0x00000000 0x8000000>;
|
ranges = <0x0 0x5 0x00000000 0x8000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dspi0: dspi@2100000 {
|
dspi0: spi@2100000 {
|
||||||
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
|
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
@ -395,7 +395,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
dspi1: dspi@2110000 {
|
dspi1: spi@2110000 {
|
||||||
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
|
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
|
@ -57,12 +57,12 @@
|
||||||
reg = <0x4c>;
|
reg = <0x4c>;
|
||||||
};
|
};
|
||||||
|
|
||||||
eeprom@56 {
|
eeprom@52 {
|
||||||
compatible = "atmel,24c512";
|
compatible = "atmel,24c512";
|
||||||
reg = <0x52>;
|
reg = <0x52>;
|
||||||
};
|
};
|
||||||
|
|
||||||
eeprom@57 {
|
eeprom@53 {
|
||||||
compatible = "atmel,24c512";
|
compatible = "atmel,24c512";
|
||||||
reg = <0x53>;
|
reg = <0x53>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -202,7 +202,7 @@
|
||||||
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: quadspi@1550000 {
|
qspi: spi@1550000 {
|
||||||
compatible = "fsl,ls1021a-qspi";
|
compatible = "fsl,ls1021a-qspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
@ -361,7 +361,7 @@
|
||||||
#thermal-sensor-cells = <1>;
|
#thermal-sensor-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dspi: dspi@2100000 {
|
dspi: spi@2100000 {
|
||||||
compatible = "fsl,ls1021a-v1.0-dspi";
|
compatible = "fsl,ls1021a-v1.0-dspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
|
@ -469,7 +469,7 @@
|
||||||
mmu-masters = <&fsl_mc 0x300 0>;
|
mmu-masters = <&fsl_mc 0x300 0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dspi: dspi@2100000 {
|
dspi: spi@2100000 {
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
|
compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -595,7 +595,7 @@
|
||||||
3 0 0x5 0x20000000 0x00010000>;
|
3 0 0x5 0x20000000 0x00010000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
qspi: quadspi@20c0000 {
|
qspi: spi@20c0000 {
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
|
compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
|
|
@ -168,14 +168,14 @@
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
status="disabled";
|
status="disabled";
|
||||||
};
|
};
|
||||||
spi0: ssp@fe800000 {
|
spi0: spi@fe800000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x0 0xfe800000 0x1000>;
|
reg = <0x0 0xfe800000 0x1000>;
|
||||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&clk_bus>;
|
clocks = <&clk_bus>;
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
spi1: ssp@fe900000 {
|
spi1: spi@fe900000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x0 0xfe900000 0x1000>;
|
reg = <0x0 0xfe900000 0x1000>;
|
||||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -168,14 +168,14 @@
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
status="disabled";
|
status="disabled";
|
||||||
};
|
};
|
||||||
spi0: ssp@fe800000 {
|
spi0: spi@fe800000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x0 0xfe800000 0x1000>;
|
reg = <0x0 0xfe800000 0x1000>;
|
||||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&clk_bus>;
|
clocks = <&clk_bus>;
|
||||||
clock-names = "apb_pclk";
|
clock-names = "apb_pclk";
|
||||||
};
|
};
|
||||||
spi1: ssp@fe900000 {
|
spi1: spi@fe900000 {
|
||||||
compatible = "arm,pl022", "arm,primecell";
|
compatible = "arm,pl022", "arm,primecell";
|
||||||
reg = <0x0 0xfe900000 0x1000>;
|
reg = <0x0 0xfe900000 0x1000>;
|
||||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
|
|
@ -118,7 +118,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
gen1_i2c: i2c@3160000 {
|
gen1_i2c: i2c@3160000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x03160000 0x10000>;
|
reg = <0x03160000 0x10000>;
|
||||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -143,7 +143,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
cam_i2c: i2c@3180000 {
|
cam_i2c: i2c@3180000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x03180000 0x10000>;
|
reg = <0x03180000 0x10000>;
|
||||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -157,7 +157,7 @@
|
||||||
|
|
||||||
/* shares pads with dpaux1 */
|
/* shares pads with dpaux1 */
|
||||||
dp_aux_ch1_i2c: i2c@3190000 {
|
dp_aux_ch1_i2c: i2c@3190000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x03190000 0x10000>;
|
reg = <0x03190000 0x10000>;
|
||||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -171,7 +171,7 @@
|
||||||
|
|
||||||
/* shares pads with dpaux0 */
|
/* shares pads with dpaux0 */
|
||||||
dp_aux_ch0_i2c: i2c@31b0000 {
|
dp_aux_ch0_i2c: i2c@31b0000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x031b0000 0x10000>;
|
reg = <0x031b0000 0x10000>;
|
||||||
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -184,7 +184,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
gen7_i2c: i2c@31c0000 {
|
gen7_i2c: i2c@31c0000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x031c0000 0x10000>;
|
reg = <0x031c0000 0x10000>;
|
||||||
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -197,7 +197,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
gen9_i2c: i2c@31e0000 {
|
gen9_i2c: i2c@31e0000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x031e0000 0x10000>;
|
reg = <0x031e0000 0x10000>;
|
||||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -264,7 +264,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
gen2_i2c: i2c@c240000 {
|
gen2_i2c: i2c@c240000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x0c240000 0x10000>;
|
reg = <0x0c240000 0x10000>;
|
||||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -277,7 +277,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
gen8_i2c: i2c@c250000 {
|
gen8_i2c: i2c@c250000 {
|
||||||
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c";
|
compatible = "nvidia,tegra194-i2c";
|
||||||
reg = <0x0c250000 0x10000>;
|
reg = <0x0c250000 0x10000>;
|
||||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
|
|
@ -282,6 +282,7 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
bus-width = <8>;
|
bus-width = <8>;
|
||||||
non-removable;
|
non-removable;
|
||||||
|
vqmmc-supply = <&vdd_1v8>;
|
||||||
};
|
};
|
||||||
|
|
||||||
clocks {
|
clocks {
|
||||||
|
|
|
@ -545,7 +545,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
hsusb: usb@e6590000 {
|
hsusb: usb@e6590000 {
|
||||||
compatible = "renesas,usbhs-r8a7796",
|
compatible = "renesas,usbhs-r8a77965",
|
||||||
"renesas,rcar-gen3-usbhs";
|
"renesas,rcar-gen3-usbhs";
|
||||||
reg = <0 0xe6590000 0 0x100>;
|
reg = <0 0xe6590000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
@ -634,6 +634,14 @@
|
||||||
resets = <&cpg 219>;
|
resets = <&cpg 219>;
|
||||||
#dma-cells = <1>;
|
#dma-cells = <1>;
|
||||||
dma-channels = <16>;
|
dma-channels = <16>;
|
||||||
|
iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
|
||||||
|
<&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
|
||||||
|
<&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
|
||||||
|
<&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
|
||||||
|
<&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
|
||||||
|
<&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
|
||||||
|
<&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
|
||||||
|
<&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dmac1: dma-controller@e7300000 {
|
dmac1: dma-controller@e7300000 {
|
||||||
|
@ -668,6 +676,14 @@
|
||||||
resets = <&cpg 218>;
|
resets = <&cpg 218>;
|
||||||
#dma-cells = <1>;
|
#dma-cells = <1>;
|
||||||
dma-channels = <16>;
|
dma-channels = <16>;
|
||||||
|
iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
|
||||||
|
<&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
|
||||||
|
<&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
|
||||||
|
<&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
|
||||||
|
<&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
|
||||||
|
<&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
|
||||||
|
<&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
|
||||||
|
<&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dmac2: dma-controller@e7310000 {
|
dmac2: dma-controller@e7310000 {
|
||||||
|
@ -702,6 +718,14 @@
|
||||||
resets = <&cpg 217>;
|
resets = <&cpg 217>;
|
||||||
#dma-cells = <1>;
|
#dma-cells = <1>;
|
||||||
dma-channels = <16>;
|
dma-channels = <16>;
|
||||||
|
iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
|
||||||
|
<&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
|
||||||
|
<&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
|
||||||
|
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
|
||||||
|
<&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
|
||||||
|
<&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
|
||||||
|
<&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
|
||||||
|
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ipmmu_ds0: mmu@e6740000 {
|
ipmmu_ds0: mmu@e6740000 {
|
||||||
|
@ -1455,9 +1479,9 @@
|
||||||
compatible = "renesas,usb2-phy-r8a77965",
|
compatible = "renesas,usb2-phy-r8a77965",
|
||||||
"renesas,rcar-gen3-usb2-phy";
|
"renesas,rcar-gen3-usb2-phy";
|
||||||
reg = <0 0xee0a0200 0 0x700>;
|
reg = <0 0xee0a0200 0 0x700>;
|
||||||
clocks = <&cpg CPG_MOD 703>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>;
|
resets = <&cpg 702>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue