cxgb: delete non NAPI code from the driver.
Compile-tested only. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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4422b00390
3 changed files with 5 additions and 75 deletions
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@ -2378,14 +2378,6 @@ config CHELSIO_T1_1G
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Enables support for Chelsio's gigabit Ethernet PCI cards. If you
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are using only 10G cards say 'N' here.
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config CHELSIO_T1_NAPI
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bool "Use Rx Polling (NAPI)"
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depends on CHELSIO_T1
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default y
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help
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NAPI is a driver API designed to reduce CPU and interrupt load
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when the driver is receiving lots of packets from the card.
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config CHELSIO_T3
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tristate "Chelsio Communications T3 10Gb Ethernet support"
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depends on PCI && INET
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@ -1153,9 +1153,7 @@ static int __devinit init_one(struct pci_dev *pdev,
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#ifdef CONFIG_NET_POLL_CONTROLLER
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netdev->poll_controller = t1_netpoll;
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#endif
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#ifdef CONFIG_CHELSIO_T1_NAPI
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netif_napi_add(netdev, &adapter->napi, t1_poll, 64);
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#endif
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SET_ETHTOOL_OPS(netdev, &t1_ethtool_ops);
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}
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@ -1396,20 +1396,10 @@ static void sge_rx(struct sge *sge, struct freelQ *fl, unsigned int len)
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if (unlikely(adapter->vlan_grp && p->vlan_valid)) {
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st->vlan_xtract++;
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#ifdef CONFIG_CHELSIO_T1_NAPI
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vlan_hwaccel_receive_skb(skb, adapter->vlan_grp,
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ntohs(p->vlan));
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#else
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vlan_hwaccel_rx(skb, adapter->vlan_grp,
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ntohs(p->vlan));
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#endif
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} else {
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#ifdef CONFIG_CHELSIO_T1_NAPI
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vlan_hwaccel_receive_skb(skb, adapter->vlan_grp,
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ntohs(p->vlan));
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} else
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netif_receive_skb(skb);
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#else
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netif_rx(skb);
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#endif
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}
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}
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/*
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@ -1568,7 +1558,6 @@ static inline int responses_pending(const struct adapter *adapter)
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return (e->GenerationBit == Q->genbit);
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}
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#ifdef CONFIG_CHELSIO_T1_NAPI
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/*
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* A simpler version of process_responses() that handles only pure (i.e.,
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* non data-carrying) responses. Such respones are too light-weight to justify
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@ -1636,9 +1625,6 @@ int t1_poll(struct napi_struct *napi, int budget)
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return work_done;
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}
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/*
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* NAPI version of the main interrupt handler.
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*/
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irqreturn_t t1_interrupt(int irq, void *data)
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{
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struct adapter *adapter = data;
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@ -1656,7 +1642,8 @@ irqreturn_t t1_interrupt(int irq, void *data)
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else {
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/* no data, no NAPI needed */
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writel(sge->respQ.cidx, adapter->regs + A_SG_SLEEPING);
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napi_enable(&adapter->napi); /* undo schedule_prep */
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/* undo schedule_prep */
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napi_enable(&adapter->napi);
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}
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}
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return IRQ_HANDLED;
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@ -1672,53 +1659,6 @@ irqreturn_t t1_interrupt(int irq, void *data)
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return IRQ_RETVAL(handled != 0);
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}
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#else
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/*
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* Main interrupt handler, optimized assuming that we took a 'DATA'
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* interrupt.
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*
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* 1. Clear the interrupt
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* 2. Loop while we find valid descriptors and process them; accumulate
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* information that can be processed after the loop
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* 3. Tell the SGE at which index we stopped processing descriptors
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* 4. Bookkeeping; free TX buffers, ring doorbell if there are any
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* outstanding TX buffers waiting, replenish RX buffers, potentially
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* reenable upper layers if they were turned off due to lack of TX
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* resources which are available again.
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* 5. If we took an interrupt, but no valid respQ descriptors was found we
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* let the slow_intr_handler run and do error handling.
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*/
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irqreturn_t t1_interrupt(int irq, void *cookie)
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{
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int work_done;
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struct adapter *adapter = cookie;
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struct respQ *Q = &adapter->sge->respQ;
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spin_lock(&adapter->async_lock);
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writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
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if (likely(responses_pending(adapter)))
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work_done = process_responses(adapter, -1);
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else
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work_done = t1_slow_intr_handler(adapter);
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/*
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* The unconditional clearing of the PL_CAUSE above may have raced
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* with DMA completion and the corresponding generation of a response
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* to cause us to miss the resulting data interrupt. The next write
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* is also unconditional to recover the missed interrupt and render
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* this race harmless.
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*/
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writel(Q->cidx, adapter->regs + A_SG_SLEEPING);
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if (!work_done)
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adapter->sge->stats.unhandled_irqs++;
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spin_unlock(&adapter->async_lock);
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return IRQ_RETVAL(work_done != 0);
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}
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#endif
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/*
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* Enqueues the sk_buff onto the cmdQ[qid] and has hardware fetch it.
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*
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