tg3: Consolidate ASIC rev detection code
Detecting the ASIC revision of a device is getting to be an increasingly complex process. This patch consolidates all the ASIC rev detection code to a single routine for better maintainability. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 79 additions and 80 deletions
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@ -13912,6 +13912,83 @@ static struct pci_dev * __devinit tg3_find_peer(struct tg3 *tp)
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return peer;
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}
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static void __devinit tg3_detect_asic_rev(struct tg3 *tp, u32 misc_ctrl_reg)
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{
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tp->pci_chip_rev_id = misc_ctrl_reg >> MISC_HOST_CTRL_CHIPREV_SHIFT;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_USE_PROD_ID_REG) {
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u32 reg;
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/* All devices that use the alternate
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* ASIC REV location have a CPMU.
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*/
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tg3_flag_set(tp, CPMU_PRESENT);
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if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720)
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reg = TG3PCI_GEN2_PRODID_ASICREV;
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else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57766 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57782 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57786)
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reg = TG3PCI_GEN15_PRODID_ASICREV;
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else
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reg = TG3PCI_PRODID_ASICREV;
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pci_read_config_dword(tp->pdev, reg, &tp->pci_chip_rev_id);
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}
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/* Wrong chip ID in 5752 A0. This code can be removed later
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* as A0 is not in production.
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*/
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if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
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tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
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tg3_flag_set(tp, 5717_PLUS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766)
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tg3_flag_set(tp, 57765_CLASS);
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if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS))
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tg3_flag_set(tp, 57765_PLUS);
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/* Intentionally exclude ASIC_REV_5906 */
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
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tg3_flag(tp, 57765_PLUS))
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tg3_flag_set(tp, 5755_PLUS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)
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tg3_flag_set(tp, 5780_CLASS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
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tg3_flag(tp, 5755_PLUS) ||
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tg3_flag(tp, 5780_CLASS))
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tg3_flag_set(tp, 5750_PLUS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
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tg3_flag(tp, 5750_PLUS))
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tg3_flag_set(tp, 5705_PLUS);
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}
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static int __devinit tg3_get_invariants(struct tg3 *tp)
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{
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u32 misc_ctrl_reg;
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@ -13943,43 +14020,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
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tp->misc_host_ctrl);
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tp->pci_chip_rev_id = (misc_ctrl_reg >>
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MISC_HOST_CTRL_CHIPREV_SHIFT);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_USE_PROD_ID_REG) {
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u32 prod_id_asic_rev;
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if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720)
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pci_read_config_dword(tp->pdev,
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TG3PCI_GEN2_PRODID_ASICREV,
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&prod_id_asic_rev);
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else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57766 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57782 ||
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tp->pdev->device == TG3PCI_DEVICE_TIGON3_57786)
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pci_read_config_dword(tp->pdev,
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TG3PCI_GEN15_PRODID_ASICREV,
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&prod_id_asic_rev);
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else
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pci_read_config_dword(tp->pdev, TG3PCI_PRODID_ASICREV,
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&prod_id_asic_rev);
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tp->pci_chip_rev_id = prod_id_asic_rev;
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}
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/* Wrong chip ID in 5752 A0. This code can be removed later
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* as A0 is not in production.
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*/
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if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
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tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
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tg3_detect_asic_rev(tp, misc_ctrl_reg);
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/* If we have 5702/03 A1 or A2 on certain ICH chipsets,
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* we need to disable memory and use config. cycles
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@ -14077,9 +14118,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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* Any tg3 device found behind the bridge will also need the 40-bit
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* DMA workaround.
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*/
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
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tg3_flag_set(tp, 5780_CLASS);
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if (tg3_flag(tp, 5780_CLASS)) {
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tg3_flag_set(tp, 40BIT_DMA_BUG);
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tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI);
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} else {
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@ -14105,39 +14144,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)
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tp->pdev_peer = tg3_find_peer(tp);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
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tg3_flag_set(tp, 5717_PLUS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766)
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tg3_flag_set(tp, 57765_CLASS);
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if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS))
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tg3_flag_set(tp, 57765_PLUS);
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/* Intentionally exclude ASIC_REV_5906 */
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
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tg3_flag(tp, 57765_PLUS))
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tg3_flag_set(tp, 5755_PLUS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
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tg3_flag(tp, 5755_PLUS) ||
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tg3_flag(tp, 5780_CLASS))
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tg3_flag_set(tp, 5750_PLUS);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
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tg3_flag(tp, 5750_PLUS))
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tg3_flag_set(tp, 5705_PLUS);
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/* Determine TSO capabilities */
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if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0)
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; /* Do nothing. HW bug. */
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@ -14467,13 +14473,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tg3_ape_lock_init(tp);
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}
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
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tg3_flag(tp, 57765_PLUS))
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tg3_flag_set(tp, CPMU_PRESENT);
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/* Set up tp->grc_local_ctrl before calling
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* tg3_pwrsrc_switch_to_vmain(). GPIO1 driven high
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* will bring 5700's external PHY out of reset.
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