[PATCH] x86_64: NMI watchdog frequency calculation adjustments
Like previously done for i386, get the x86_64 watchdog tick calculation into a state where it can also be used on CPUs with frequencies beyond 4GHz. Signed-off-by: Jan Beulich <jbeulich@novell.com> Acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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1 changed files with 4 additions and 4 deletions
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@ -366,7 +366,7 @@ static void setup_k7_watchdog(void)
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| K7_NMI_EVENT;
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wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
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wrmsr(MSR_K7_PERFCTR0, -(cpu_khz/nmi_hz*1000), -1);
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wrmsrl(MSR_K7_PERFCTR0, -((u64)cpu_khz * 1000 / nmi_hz));
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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evntsel |= K7_EVNTSEL_ENABLE;
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wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
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@ -407,8 +407,8 @@ static int setup_p4_watchdog(void)
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wrmsr(MSR_P4_CRU_ESCR0, P4_NMI_CRU_ESCR0, 0);
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wrmsr(MSR_P4_IQ_CCCR0, P4_NMI_IQ_CCCR0 & ~P4_CCCR_ENABLE, 0);
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Dprintk("setting P4_IQ_COUNTER0 to 0x%08lx\n", -(cpu_khz/nmi_hz*1000));
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wrmsr(MSR_P4_IQ_COUNTER0, -(cpu_khz/nmi_hz*1000), -1);
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Dprintk("setting P4_IQ_COUNTER0 to 0x%08lx\n", -(cpu_khz * 1000UL / nmi_hz));
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wrmsrl(MSR_P4_IQ_COUNTER0, -((u64)cpu_khz * 1000 / nmi_hz));
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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wrmsr(MSR_P4_IQ_CCCR0, nmi_p4_cccr_val, 0);
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return 1;
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@ -506,7 +506,7 @@ void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason)
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wrmsr(MSR_P4_IQ_CCCR0, nmi_p4_cccr_val, 0);
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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}
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wrmsr(nmi_perfctr_msr, -(cpu_khz/nmi_hz*1000), -1);
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wrmsrl(nmi_perfctr_msr, -((u64)cpu_khz * 1000 / nmi_hz));
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}
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}
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