Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ARM: 5774/1: Fix Realview ARM1176PB board reboot

Browse source 
This is the fix for proper reboot of Realview ARM1176PB board
when issuing the reboot command. Setting the eighth bit of
control register SYS_RESETCTL to 1 to force a soft reset.
arch_reset() is modified for realview machines to call machine
specific reset function pointers.

Signed-off-by: Philby John <pjohn@in.mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Philby John 2009-10-28 19:09:12 +01:00 committed by Russell King
parent df71dfd4ca
commit 426fcd2a35
7 changed files with 50 additions and 21 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/mach-realview/core.h
View file

@ -61,5 +61,5 @@ extern void realview_timer_init(unsigned int timer_irq);
extern int realview_flash_register(struct resource *res, u32 num);
extern int realview_eth_register(const char *name, struct resource *res);
extern int realview_usb_register(struct resource *res);
extern void (*realview_reset)(char);
#endif

5
arch/arm/mach-realview/include/mach/board-pb1176.h
View file

@ -73,4 +73,9 @@
#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
/*
* Control register SYS_RESETCTL is set to 1 to force a soft reset
*/
#define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100
#endif /* __ASM_ARCH_BOARD_PB1176_H */

12
arch/arm/mach-realview/include/mach/board-pb11mp.h
View file

@ -81,4 +81,16 @@
#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
/*
* Values for REALVIEW_SYS_RESET_CTRL
*/
#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01
#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02
#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03
#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04
#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05
#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06
#define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0)
#endif /* __ASM_ARCH_BOARD_PB11MP_H */

15
arch/arm/mach-realview/include/mach/platform.h
View file

@ -119,19 +119,6 @@
#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
/*
* Values for REALVIEW_SYS_RESET_CTRL
*/
#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
#define REALVIEW_SYS_CTRL_RESET_POR 0x05
#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
#define REALVIEW_SYS_CTRL_LED (1 << 0)
/* ------------------------------------------------------------------------
* RealView control registers
* ------------------------------------------------------------------------
@ -153,7 +140,7 @@
* SYS_CLD, SYS_BOOTCS
*/
#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
#define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */
/*
* REALVIEW_SYS_FLASH

10
arch/arm/mach-realview/include/mach/system.h
View file

@ -25,6 +25,8 @@
#include <mach/hardware.h>
#include <mach/platform.h>
void (*realview_reset)(char mode);
static inline void arch_idle(void)
{
/*
@ -36,16 +38,12 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode, const char *cmd)
{
void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
unsigned int val;
/*
* To reset, we hit the on-board reset register
* in the system FPGA
*/
val = __raw_readl(hdr_ctrl);
val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
__raw_writel(val, hdr_ctrl);
if (realview_reset)
realview_reset(mode);
}
#endif

11
arch/arm/mach-realview/realview_pb1176.c
View file

@ -290,6 +290,16 @@ static struct sys_timer realview_pb1176_timer = {
.init = realview_pb1176_timer_init,
};
static void realview_pb1176_reset(char mode)
{
void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
REALVIEW_SYS_RESETCTL_OFFSET;
void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
REALVIEW_SYS_LOCK_OFFSET;
__raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl);
__raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl);
}
static void __init realview_pb1176_init(void)
{
int i;
@ -313,6 +323,7 @@ static void __init realview_pb1176_init(void)
#ifdef CONFIG_LEDS
leds_event = realview_leds_event;
#endif
realview_reset = realview_pb1176_reset;
}
MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")

16
arch/arm/mach-realview/realview_pb11mp.c
View file

@ -299,6 +299,21 @@ static struct sys_timer realview_pb11mp_timer = {
.init = realview_pb11mp_timer_init,
};
static void realview_pb11mp_reset(char mode)
{
void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
REALVIEW_SYS_RESETCTL_OFFSET;
unsigned int val;
/*
* To reset, we hit the on-board reset register
* in the system FPGA
*/
val = __raw_readl(hdr_ctrl);
val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR;
__raw_writel(val, hdr_ctrl);
}
static void __init realview_pb11mp_init(void)
{
int i;
@ -324,6 +339,7 @@ static void __init realview_pb11mp_init(void)
#ifdef CONFIG_LEDS
leds_event = realview_leds_event;
#endif
realview_reset = realview_pb11mp_reset;
}
MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")