ARM: OMAP2+: pm33xx-core: Add platform code needed for PM
Most of the PM code needed for am335x and am437x can be moved into a module under drivers but some core code must remain in mach-omap2 at the moment. This includes some internal clockdomain APIs and low-level ARM APIs which are also not exported for use by modules. Implement a few functions that handle these low-level platform operations can be passed to the pm33xx module through the use of platform data. In addition to this, to be able to share data structures between C and the sleep33xx and sleep43xx assembly code, we can automatically generate all of the C struct member offsets and sizes as macros by processing pm-asm-offsets.c into assembly code and then extracting the relevant data as is done for the generated platform asm-offsets.h files. Finally, add amx3_common_pm_init to create a dummy platform_device for pm33xx so that our soon to be introduced pm33xx module can probe on am335x and am437x platforms to enable basic suspend to mem and standby support. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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10 changed files with 295 additions and 0 deletions
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@ -72,6 +72,7 @@ config SOC_AM43XX
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select ARM_ERRATA_754322
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select ARM_ERRATA_775420
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select OMAP_INTERCONNECT
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select ARM_CPU_SUSPEND if PM
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config SOC_DRA7XX
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bool "TI DRA7XX"
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@ -88,6 +88,8 @@ omap-4-5-pm-common += pm44xx.o
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obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common)
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obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-pm-common)
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obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-pm-common)
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obj-$(CONFIG_SOC_AM33XX) += pm33xx-core.o sleep33xx.o
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obj-$(CONFIG_SOC_AM43XX) += pm33xx-core.o sleep43xx.o
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obj-$(CONFIG_PM_DEBUG) += pm-debug.o
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obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o
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@ -95,6 +97,8 @@ obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o
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AFLAGS_sleep24xx.o :=-Wa,-march=armv6
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AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep33xx.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep43xx.o :=-Wa,-march=armv7-a$(plus_sec)
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endif
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@ -232,3 +236,15 @@ obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y)
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obj-y += omap_phy_internal.o
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obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
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arch/arm/mach-omap2/pm-asm-offsets.s: arch/arm/mach-omap2/pm-asm-offsets.c
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$(call if_changed_dep,cc_s_c)
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include/generated/ti-pm-asm-offsets.h: arch/arm/mach-omap2/pm-asm-offsets.s FORCE
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$(call filechk,offsets,__TI_PM_ASM_OFFSETS_H__)
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# For rule to generate ti-emif-asm-offsets.h dependency
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include drivers/memory/Makefile.asm-offsets
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arch/arm/mach-omap2/sleep33xx.o: include/generated/ti-pm-asm-offsets.h include/generated/ti-emif-asm-offsets.h
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arch/arm/mach-omap2/sleep43xx.o: include/generated/ti-pm-asm-offsets.h include/generated/ti-emif-asm-offsets.h
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@ -77,6 +77,13 @@ static inline int omap4_pm_init_early(void)
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}
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#endif
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#if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \
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defined(CONFIG_SOC_AM43XX))
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void amx3_common_pm_init(void);
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#else
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static inline void amx3_common_pm_init(void) { }
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#endif
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extern void omap2_init_common_infrastructure(void);
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extern void omap_init_time(void);
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@ -622,6 +622,7 @@ void __init am33xx_init_early(void)
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void __init am33xx_init_late(void)
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{
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omap_common_late_init();
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amx3_common_pm_init();
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}
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#endif
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@ -646,6 +647,7 @@ void __init am43xx_init_late(void)
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{
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omap_common_late_init();
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omap2_clk_enable_autoidle_all();
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amx3_common_pm_init();
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}
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#endif
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31
arch/arm/mach-omap2/pm-asm-offsets.c
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arch/arm/mach-omap2/pm-asm-offsets.c
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* TI AM33XX and AM43XX PM Assembly Offsets
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*
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* Copyright (C) 2017-2018 Texas Instruments Inc.
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*/
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#include <linux/kbuild.h>
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#include <linux/platform_data/pm33xx.h>
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int main(void)
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{
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DEFINE(AMX3_PM_WFI_FLAGS_OFFSET,
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offsetof(struct am33xx_pm_sram_data, wfi_flags));
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DEFINE(AMX3_PM_L2_AUX_CTRL_VAL_OFFSET,
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offsetof(struct am33xx_pm_sram_data, l2_aux_ctrl_val));
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DEFINE(AMX3_PM_L2_PREFETCH_CTRL_VAL_OFFSET,
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offsetof(struct am33xx_pm_sram_data, l2_prefetch_ctrl_val));
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DEFINE(AMX3_PM_SRAM_DATA_SIZE, sizeof(struct am33xx_pm_sram_data));
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BLANK();
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DEFINE(AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET,
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offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_virt));
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DEFINE(AMX3_PM_RO_SRAM_DATA_PHYS_OFFSET,
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offsetof(struct am33xx_pm_ro_sram_data, amx3_pm_sram_data_phys));
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DEFINE(AMX3_PM_RO_SRAM_DATA_SIZE,
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sizeof(struct am33xx_pm_ro_sram_data));
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return 0;
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}
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@ -81,6 +81,9 @@ extern unsigned int omap3_do_wfi_sz;
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/* ... and its pointer from SRAM after copy */
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extern void (*omap3_do_wfi_sram)(void);
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extern struct am33xx_pm_sram_addr am33xx_pm_sram;
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extern struct am33xx_pm_sram_addr am43xx_pm_sram;
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extern void omap3_save_scratchpad_contents(void);
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#define PM_RTA_ERRATUM_i608 (1 << 0)
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189
arch/arm/mach-omap2/pm33xx-core.c
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arch/arm/mach-omap2/pm33xx-core.c
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@ -0,0 +1,189 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* AM33XX Arch Power Management Routines
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*
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* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
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* Dave Gerlach
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*/
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#include <asm/smp_scu.h>
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#include <asm/suspend.h>
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#include <linux/errno.h>
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#include <linux/platform_data/pm33xx.h>
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#include "cm33xx.h"
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#include "common.h"
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#include "control.h"
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#include "clockdomain.h"
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#include "iomap.h"
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#include "omap_hwmod.h"
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#include "pm.h"
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#include "powerdomain.h"
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#include "prm33xx.h"
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#include "soc.h"
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#include "sram.h"
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static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm;
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static struct clockdomain *gfx_l4ls_clkdm;
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static void __iomem *scu_base;
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static int __init am43xx_map_scu(void)
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{
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scu_base = ioremap(scu_a9_get_base(), SZ_256);
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if (!scu_base)
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return -ENOMEM;
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return 0;
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}
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static int amx3_common_init(void)
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{
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gfx_pwrdm = pwrdm_lookup("gfx_pwrdm");
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per_pwrdm = pwrdm_lookup("per_pwrdm");
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mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
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if ((!gfx_pwrdm) || (!per_pwrdm) || (!mpu_pwrdm))
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return -ENODEV;
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(void)clkdm_for_each(omap_pm_clkdms_setup, NULL);
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/* CEFUSE domain can be turned off post bootup */
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cefuse_pwrdm = pwrdm_lookup("cefuse_pwrdm");
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if (cefuse_pwrdm)
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omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF);
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else
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pr_err("PM: Failed to get cefuse_pwrdm\n");
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return 0;
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}
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static int am33xx_suspend_init(void)
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{
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int ret;
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gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm");
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if (!gfx_l4ls_clkdm) {
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pr_err("PM: Cannot lookup gfx_l4ls_clkdm clockdomains\n");
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return -ENODEV;
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}
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ret = amx3_common_init();
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return ret;
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}
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static int am43xx_suspend_init(void)
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{
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int ret = 0;
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ret = am43xx_map_scu();
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if (ret) {
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pr_err("PM: Could not ioremap SCU\n");
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return ret;
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}
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ret = amx3_common_init();
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return ret;
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}
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static void amx3_pre_suspend_common(void)
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{
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omap_set_pwrdm_state(gfx_pwrdm, PWRDM_POWER_OFF);
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}
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static void amx3_post_suspend_common(void)
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{
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int status;
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/*
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* Because gfx_pwrdm is the only one under MPU control,
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* comment on transition status
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*/
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status = pwrdm_read_pwrst(gfx_pwrdm);
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if (status != PWRDM_POWER_OFF)
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pr_err("PM: GFX domain did not transition: %x\n", status);
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}
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static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long))
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{
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int ret = 0;
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amx3_pre_suspend_common();
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ret = cpu_suspend(0, fn);
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amx3_post_suspend_common();
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/*
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* BUG: GFX_L4LS clock domain needs to be woken up to
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* ensure thet L4LS clock domain does not get stuck in
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* transition. If that happens L3 module does not get
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* disabled, thereby leading to PER power domain
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* transition failing
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*/
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clkdm_wakeup(gfx_l4ls_clkdm);
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clkdm_sleep(gfx_l4ls_clkdm);
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return ret;
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}
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static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long))
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{
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int ret = 0;
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amx3_pre_suspend_common();
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scu_power_mode(scu_base, SCU_PM_POWEROFF);
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ret = cpu_suspend(0, fn);
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scu_power_mode(scu_base, SCU_PM_NORMAL);
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amx3_post_suspend_common();
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return ret;
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}
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static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void)
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{
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if (soc_is_am33xx())
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return &am33xx_pm_sram;
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else if (soc_is_am437x())
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return &am43xx_pm_sram;
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else
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return NULL;
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}
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static struct am33xx_pm_platform_data am33xx_ops = {
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.init = am33xx_suspend_init,
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.soc_suspend = am33xx_suspend,
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.get_sram_addrs = amx3_get_sram_addrs,
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};
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static struct am33xx_pm_platform_data am43xx_ops = {
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.init = am43xx_suspend_init,
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.soc_suspend = am43xx_suspend,
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.get_sram_addrs = amx3_get_sram_addrs,
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};
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static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void)
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{
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if (soc_is_am33xx())
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return &am33xx_ops;
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else if (soc_is_am437x())
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return &am43xx_ops;
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else
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return NULL;
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}
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void __init amx3_common_pm_init(void)
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{
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struct am33xx_pm_platform_data *pdata;
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struct platform_device_info devinfo;
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pdata = am33xx_pm_get_pdata();
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memset(&devinfo, 0, sizeof(devinfo));
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devinfo.name = "pm33xx";
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devinfo.data = pdata;
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devinfo.size_data = sizeof(*pdata);
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devinfo.id = -1;
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platform_device_register_full(&devinfo);
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}
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@ -6,6 +6,8 @@
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* Dave Gerlach, Vaibhav Bedia
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*/
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#include <generated/ti-emif-asm-offsets.h>
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#include <generated/ti-pm-asm-offsets.h>
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#include <linux/linkage.h>
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#include <linux/ti-emif-sram.h>
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#include <asm/assembler.h>
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@ -6,6 +6,8 @@
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* Dave Gerlach, Vaibhav Bedia
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*/
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#include <generated/ti-emif-asm-offsets.h>
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#include <generated/ti-pm-asm-offsets.h>
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#include <linux/linkage.h>
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#include <linux/ti-emif-sram.h>
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42
include/linux/platform_data/pm33xx.h
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include/linux/platform_data/pm33xx.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* TI pm33xx platform data
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*
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* Copyright (C) 2016-2018 Texas Instruments, Inc.
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* Dave Gerlach <d-gerlach@ti.com>
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*/
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#ifndef _LINUX_PLATFORM_DATA_PM33XX_H
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#define _LINUX_PLATFORM_DATA_PM33XX_H
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#include <linux/kbuild.h>
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#include <linux/types.h>
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#ifndef __ASSEMBLER__
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struct am33xx_pm_sram_addr {
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void (*do_wfi)(void);
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unsigned long *do_wfi_sz;
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unsigned long *resume_offset;
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unsigned long *emif_sram_table;
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unsigned long *ro_sram_data;
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};
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struct am33xx_pm_platform_data {
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int (*init)(void);
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int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long));
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struct am33xx_pm_sram_addr *(*get_sram_addrs)(void);
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};
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struct am33xx_pm_sram_data {
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u32 wfi_flags;
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u32 l2_aux_ctrl_val;
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u32 l2_prefetch_ctrl_val;
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} __packed __aligned(8);
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struct am33xx_pm_ro_sram_data {
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u32 amx3_pm_sram_data_virt;
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u32 amx3_pm_sram_data_phys;
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} __packed __aligned(8);
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#endif /* __ASSEMBLER__ */
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#endif /* _LINUX_PLATFORM_DATA_PM33XX_H */
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