Merge branch 'core' of git://amd64.org/linux/rric into perf/core
This commit is contained in:
commit
4167ab90ee
1 changed files with 2 additions and 25 deletions
|
@ -28,7 +28,7 @@ static int counter_width = 32;
|
|||
|
||||
#define MSR_PPRO_EVENTSEL_RESERVED ((0xFFFFFFFFULL<<32)|(1ULL<<21))
|
||||
|
||||
static u64 *reset_value;
|
||||
static u64 reset_value[OP_MAX_COUNTER];
|
||||
|
||||
static void ppro_shutdown(struct op_msrs const * const msrs)
|
||||
{
|
||||
|
@ -40,10 +40,6 @@ static void ppro_shutdown(struct op_msrs const * const msrs)
|
|||
release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
|
||||
release_evntsel_nmi(MSR_P6_EVNTSEL0 + i);
|
||||
}
|
||||
if (reset_value) {
|
||||
kfree(reset_value);
|
||||
reset_value = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static int ppro_fill_in_addresses(struct op_msrs * const msrs)
|
||||
|
@ -79,13 +75,6 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
|
|||
u64 val;
|
||||
int i;
|
||||
|
||||
if (!reset_value) {
|
||||
reset_value = kzalloc(sizeof(reset_value[0]) * num_counters,
|
||||
GFP_ATOMIC);
|
||||
if (!reset_value)
|
||||
return;
|
||||
}
|
||||
|
||||
if (cpu_has_arch_perfmon) {
|
||||
union cpuid10_eax eax;
|
||||
eax.full = cpuid_eax(0xa);
|
||||
|
@ -141,13 +130,6 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
|
|||
u64 val;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* This can happen if perf counters are in use when
|
||||
* we steal the die notifier NMI.
|
||||
*/
|
||||
if (unlikely(!reset_value))
|
||||
goto out;
|
||||
|
||||
for (i = 0; i < num_counters; ++i) {
|
||||
if (!reset_value[i])
|
||||
continue;
|
||||
|
@ -158,7 +140,6 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
|
|||
wrmsrl(msrs->counters[i].addr, -reset_value[i]);
|
||||
}
|
||||
|
||||
out:
|
||||
/* Only P6 based Pentium M need to re-unmask the apic vector but it
|
||||
* doesn't hurt other P6 variant */
|
||||
apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
|
||||
|
@ -179,8 +160,6 @@ static void ppro_start(struct op_msrs const * const msrs)
|
|||
u64 val;
|
||||
int i;
|
||||
|
||||
if (!reset_value)
|
||||
return;
|
||||
for (i = 0; i < num_counters; ++i) {
|
||||
if (reset_value[i]) {
|
||||
rdmsrl(msrs->controls[i].addr, val);
|
||||
|
@ -196,8 +175,6 @@ static void ppro_stop(struct op_msrs const * const msrs)
|
|||
u64 val;
|
||||
int i;
|
||||
|
||||
if (!reset_value)
|
||||
return;
|
||||
for (i = 0; i < num_counters; ++i) {
|
||||
if (!reset_value[i])
|
||||
continue;
|
||||
|
@ -242,7 +219,7 @@ static void arch_perfmon_setup_counters(void)
|
|||
eax.split.bit_width = 40;
|
||||
}
|
||||
|
||||
num_counters = eax.split.num_counters;
|
||||
num_counters = min((int)eax.split.num_counters, OP_MAX_COUNTER);
|
||||
|
||||
op_arch_perfmon_spec.num_counters = num_counters;
|
||||
op_arch_perfmon_spec.num_controls = num_counters;
|
||||
|
|
Loading…
Reference in a new issue