[PATCH] m32r: update switch_to macro for tuning
- Remove unnecessary push/pop's of the switch_to() macro for performance tuning. - Cosmetic updates: change __inline__ to inline, etc. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Cc: NIIBE Yutaka <gniibe@fsij.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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4127272c38
2 changed files with 26 additions and 47 deletions
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@ -132,7 +132,7 @@ VM_MASK = 0x00020000
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#endif
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ENTRY(ret_from_fork)
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ld r0, @sp+
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pop r0
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bl schedule_tail
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GET_THREAD_INFO(r8)
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bra syscall_exit
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@ -310,7 +310,7 @@ ENTRY(ei_handler)
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; GET_ICU_STATUS;
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seth r0, #shigh(M32R_ICU_ISTS_ADDR)
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ld r0, @(low(M32R_ICU_ISTS_ADDR),r0)
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st r0, @-sp
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push r0
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#if defined(CONFIG_SMP)
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/*
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* If IRQ == 0 --> Nothing to do, Not write IMASK
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@ -547,7 +547,7 @@ check_end:
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#endif /* CONFIG_PLAT_M32104UT */
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bl do_IRQ
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#endif /* CONFIG_SMP */
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ld r14, @sp+
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pop r14
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seth r0, #shigh(M32R_ICU_IMASK_ADDR)
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st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
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#else
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@ -6,8 +6,8 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 by Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
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* Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
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* Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
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* Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
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*/
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#include <linux/config.h>
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@ -19,49 +19,28 @@
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* switch_to(prev, next) should switch from task `prev' to `next'
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* `prev' will never be the same as `next'.
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*
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* `next' and `prev' should be struct task_struct, but it isn't always defined
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* `next' and `prev' should be task_t, but it isn't always defined
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*/
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#define switch_to(prev, next, last) do { \
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register unsigned long arg0 __asm__ ("r0") = (unsigned long)prev; \
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register unsigned long arg1 __asm__ ("r1") = (unsigned long)next; \
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register unsigned long *oldsp __asm__ ("r2") = &(prev->thread.sp); \
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register unsigned long *newsp __asm__ ("r3") = &(next->thread.sp); \
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register unsigned long *oldlr __asm__ ("r4") = &(prev->thread.lr); \
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register unsigned long *newlr __asm__ ("r5") = &(next->thread.lr); \
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register struct task_struct *__last __asm__ ("r6"); \
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__asm__ __volatile__ ( \
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"st r8, @-r15 \n\t" \
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"st r9, @-r15 \n\t" \
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"st r10, @-r15 \n\t" \
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"st r11, @-r15 \n\t" \
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"st r12, @-r15 \n\t" \
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"st r13, @-r15 \n\t" \
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"st r14, @-r15 \n\t" \
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"seth r14, #high(1f) \n\t" \
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"or3 r14, r14, #low(1f) \n\t" \
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"st r14, @r4 ; store old LR \n\t" \
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"st r15, @r2 ; store old SP \n\t" \
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"ld r15, @r3 ; load new SP \n\t" \
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"st r0, @-r15 ; store 'prev' onto new stack \n\t" \
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"ld r14, @r5 ; load new LR \n\t" \
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"jmp r14 \n\t" \
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".fillinsn \n " \
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"1: \n\t" \
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"ld r6, @r15+ ; load 'prev' from new stack \n\t" \
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"ld r14, @r15+ \n\t" \
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"ld r13, @r15+ \n\t" \
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"ld r12, @r15+ \n\t" \
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"ld r11, @r15+ \n\t" \
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"ld r10, @r15+ \n\t" \
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"ld r9, @r15+ \n\t" \
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"ld r8, @r15+ \n\t" \
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: "=&r" (__last) \
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: "r" (arg0), "r" (arg1), "r" (oldsp), "r" (newsp), \
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"r" (oldlr), "r" (newlr) \
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: "memory" \
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" seth lr, #high(1f) \n" \
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" or3 lr, lr, #low(1f) \n" \
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" st lr, @%4 ; store old LR \n" \
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" ld lr, @%5 ; load new LR \n" \
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" st sp, @%2 ; store old SP \n" \
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" ld sp, @%3 ; load new SP \n" \
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" push %1 ; store `prev' on new stack \n" \
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" jmp lr \n" \
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" .fillinsn \n" \
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"1: \n" \
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" pop %0 ; restore `__last' from new stack \n" \
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: "=r" (last) \
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: "0" (prev), \
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"r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
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"r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
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: "memory", "lr" \
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); \
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last = __last; \
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} while(0)
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/*
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@ -167,8 +146,8 @@ extern void __xchg_called_with_bad_pointer(void);
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#define DCACHE_CLEAR(reg0, reg1, addr)
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#endif /* CONFIG_CHIP_M32700_TS1 */
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static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr,
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int size)
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static inline unsigned long
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__xchg(unsigned long x, volatile void * ptr, int size)
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{
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unsigned long flags;
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unsigned long tmp = 0;
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@ -220,7 +199,7 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr,
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#define __HAVE_ARCH_CMPXCHG 1
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static __inline__ unsigned long
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static inline unsigned long
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__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
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{
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unsigned long flags;
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@ -254,7 +233,7 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
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if something tries to do an invalid cmpxchg(). */
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extern void __cmpxchg_called_with_bad_pointer(void);
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static __inline__ unsigned long
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static inline unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
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{
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switch (size) {
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