[media] s5p-fimc: Add variant data structure for Exynos4x12
Add variant data structures for Exynos4212 and Exynos4412 SoC. Add 'const' qualifier for the variant description structures. Also remove has_cam_if flags from FIMC3 on Exynos4210 SoC is it has no interconnections the camera ports. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Sylwester Nawrocki
Mauro Carvalho Chehab
parent
35f2924854
commit
405f230c44
5 changed files with 78 additions and 32 deletions
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@ -626,8 +626,8 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
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{
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bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
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struct fimc_dev *fimc = ctx->fimc_dev;
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struct fimc_variant *var = fimc->variant;
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struct fimc_pix_limit *pl = var->pix_limit;
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const struct fimc_variant *var = fimc->variant;
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const struct fimc_pix_limit *pl = var->pix_limit;
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struct fimc_frame *dst = &ctx->d_frame;
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u32 depth, min_w, max_w, min_h, align_h = 3;
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u32 mask = FMT_FLAGS_CAM;
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@ -699,8 +699,8 @@ static void fimc_capture_try_selection(struct fimc_ctx *ctx,
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{
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bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
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struct fimc_dev *fimc = ctx->fimc_dev;
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struct fimc_variant *var = fimc->variant;
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struct fimc_pix_limit *pl = var->pix_limit;
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const struct fimc_variant *var = fimc->variant;
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const struct fimc_pix_limit *pl = var->pix_limit;
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struct fimc_frame *sink = &ctx->s_frame;
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u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
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u32 align_sz = 0, align_h = 4;
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@ -241,7 +241,7 @@ static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)
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int fimc_set_scaler_info(struct fimc_ctx *ctx)
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{
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struct fimc_variant *variant = ctx->fimc_dev->variant;
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const struct fimc_variant *variant = ctx->fimc_dev->variant;
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struct device *dev = &ctx->fimc_dev->pdev->dev;
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struct fimc_scaler *sc = &ctx->scaler;
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struct fimc_frame *s_frame = &ctx->s_frame;
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@ -440,7 +440,7 @@ void fimc_set_yuv_order(struct fimc_ctx *ctx)
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void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f)
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{
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struct fimc_variant *variant = ctx->fimc_dev->variant;
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const struct fimc_variant *variant = ctx->fimc_dev->variant;
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u32 i, depth = 0;
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for (i = 0; i < f->fmt->colplanes; i++)
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@ -524,7 +524,7 @@ static int fimc_set_color_effect(struct fimc_ctx *ctx, enum v4l2_colorfx colorfx
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static int __fimc_s_ctrl(struct fimc_ctx *ctx, struct v4l2_ctrl *ctrl)
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{
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struct fimc_dev *fimc = ctx->fimc_dev;
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struct fimc_variant *variant = fimc->variant;
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const struct fimc_variant *variant = fimc->variant;
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unsigned int flags = FIMC_DST_FMT | FIMC_SRC_FMT;
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int ret = 0;
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@ -591,7 +591,7 @@ static const struct v4l2_ctrl_ops fimc_ctrl_ops = {
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int fimc_ctrls_create(struct fimc_ctx *ctx)
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{
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struct fimc_variant *variant = ctx->fimc_dev->variant;
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const struct fimc_variant *variant = ctx->fimc_dev->variant;
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unsigned int max_alpha = fimc_get_alpha_mask(ctx->d_frame.fmt);
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struct fimc_ctrls *ctrls = &ctx->ctrls;
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struct v4l2_ctrl_handler *handler = &ctrls->handler;
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@ -881,7 +881,7 @@ static int fimc_m2m_resume(struct fimc_dev *fimc)
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static int fimc_probe(struct platform_device *pdev)
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{
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struct fimc_drvdata *drv_data = fimc_get_drvdata(pdev);
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const struct fimc_drvdata *drv_data = fimc_get_drvdata(pdev);
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struct s5p_platform_fimc *pdata;
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struct fimc_dev *fimc;
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struct resource *res;
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@ -1053,7 +1053,7 @@ static int __devexit fimc_remove(struct platform_device *pdev)
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}
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/* Image pixel limits, similar across several FIMC HW revisions. */
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static struct fimc_pix_limit s5p_pix_limit[4] = {
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static const struct fimc_pix_limit s5p_pix_limit[4] = {
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[0] = {
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.scaler_en_w = 3264,
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.scaler_dis_w = 8192,
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@ -1088,7 +1088,7 @@ static struct fimc_pix_limit s5p_pix_limit[4] = {
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},
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};
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static struct fimc_variant fimc0_variant_s5p = {
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static const struct fimc_variant fimc0_variant_s5p = {
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.has_inp_rot = 1,
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.has_out_rot = 1,
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.has_cam_if = 1,
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@ -1100,7 +1100,7 @@ static struct fimc_variant fimc0_variant_s5p = {
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.pix_limit = &s5p_pix_limit[0],
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};
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static struct fimc_variant fimc2_variant_s5p = {
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static const struct fimc_variant fimc2_variant_s5p = {
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.has_cam_if = 1,
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.min_inp_pixsize = 16,
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.min_out_pixsize = 16,
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@ -1110,7 +1110,7 @@ static struct fimc_variant fimc2_variant_s5p = {
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.pix_limit = &s5p_pix_limit[1],
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};
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static struct fimc_variant fimc0_variant_s5pv210 = {
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static const struct fimc_variant fimc0_variant_s5pv210 = {
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.pix_hoff = 1,
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.has_inp_rot = 1,
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.has_out_rot = 1,
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@ -1123,7 +1123,7 @@ static struct fimc_variant fimc0_variant_s5pv210 = {
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.pix_limit = &s5p_pix_limit[1],
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};
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static struct fimc_variant fimc1_variant_s5pv210 = {
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static const struct fimc_variant fimc1_variant_s5pv210 = {
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.pix_hoff = 1,
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.has_inp_rot = 1,
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.has_out_rot = 1,
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@ -1137,7 +1137,7 @@ static struct fimc_variant fimc1_variant_s5pv210 = {
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.pix_limit = &s5p_pix_limit[2],
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};
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static struct fimc_variant fimc2_variant_s5pv210 = {
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static const struct fimc_variant fimc2_variant_s5pv210 = {
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.has_cam_if = 1,
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.pix_hoff = 1,
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.min_inp_pixsize = 16,
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@ -1148,7 +1148,7 @@ static struct fimc_variant fimc2_variant_s5pv210 = {
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.pix_limit = &s5p_pix_limit[2],
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};
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static struct fimc_variant fimc0_variant_exynos4 = {
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static const struct fimc_variant fimc0_variant_exynos4210 = {
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.pix_hoff = 1,
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.has_inp_rot = 1,
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.has_out_rot = 1,
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@ -1164,9 +1164,8 @@ static struct fimc_variant fimc0_variant_exynos4 = {
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.pix_limit = &s5p_pix_limit[1],
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};
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static struct fimc_variant fimc3_variant_exynos4 = {
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static const struct fimc_variant fimc3_variant_exynos4210 = {
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.pix_hoff = 1,
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.has_cam_if = 1,
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.has_cistatus2 = 1,
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.has_mainscaler_ext = 1,
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.has_alpha = 1,
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@ -1178,8 +1177,38 @@ static struct fimc_variant fimc3_variant_exynos4 = {
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.pix_limit = &s5p_pix_limit[3],
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};
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static const struct fimc_variant fimc0_variant_exynos4x12 = {
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.pix_hoff = 1,
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.has_inp_rot = 1,
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.has_out_rot = 1,
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.has_cam_if = 1,
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.has_isp_wb = 1,
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.has_cistatus2 = 1,
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.has_mainscaler_ext = 1,
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.has_alpha = 1,
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.min_inp_pixsize = 16,
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.min_out_pixsize = 16,
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.hor_offs_align = 2,
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.min_vsize_align = 1,
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.out_buf_count = 32,
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.pix_limit = &s5p_pix_limit[1],
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};
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static const struct fimc_variant fimc3_variant_exynos4x12 = {
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.pix_hoff = 1,
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.has_cistatus2 = 1,
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.has_mainscaler_ext = 1,
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.has_alpha = 1,
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.min_inp_pixsize = 16,
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.min_out_pixsize = 16,
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.hor_offs_align = 2,
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.min_vsize_align = 1,
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.out_buf_count = 32,
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.pix_limit = &s5p_pix_limit[3],
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};
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/* S5PC100 */
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static struct fimc_drvdata fimc_drvdata_s5p = {
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static const struct fimc_drvdata fimc_drvdata_s5p = {
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.variant = {
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[0] = &fimc0_variant_s5p,
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[1] = &fimc0_variant_s5p,
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@ -1190,7 +1219,7 @@ static struct fimc_drvdata fimc_drvdata_s5p = {
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};
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/* S5PV210, S5PC110 */
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static struct fimc_drvdata fimc_drvdata_s5pv210 = {
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static const struct fimc_drvdata fimc_drvdata_s5pv210 = {
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.variant = {
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[0] = &fimc0_variant_s5pv210,
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[1] = &fimc1_variant_s5pv210,
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@ -1201,18 +1230,30 @@ static struct fimc_drvdata fimc_drvdata_s5pv210 = {
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};
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/* EXYNOS4210, S5PV310, S5PC210 */
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static struct fimc_drvdata fimc_drvdata_exynos4 = {
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static const struct fimc_drvdata fimc_drvdata_exynos4210 = {
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.variant = {
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[0] = &fimc0_variant_exynos4,
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[1] = &fimc0_variant_exynos4,
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[2] = &fimc0_variant_exynos4,
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[3] = &fimc3_variant_exynos4,
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[0] = &fimc0_variant_exynos4210,
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[1] = &fimc0_variant_exynos4210,
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[2] = &fimc0_variant_exynos4210,
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[3] = &fimc3_variant_exynos4210,
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},
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.num_entities = 4,
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.lclk_frequency = 166000000UL,
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};
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static struct platform_device_id fimc_driver_ids[] = {
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/* EXYNOS4212, EXYNOS4412 */
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static const struct fimc_drvdata fimc_drvdata_exynos4x12 = {
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.variant = {
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[0] = &fimc0_variant_exynos4x12,
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[1] = &fimc0_variant_exynos4x12,
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[2] = &fimc0_variant_exynos4x12,
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[3] = &fimc3_variant_exynos4x12,
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},
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.num_entities = 4,
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.lclk_frequency = 166000000UL,
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};
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static const struct platform_device_id fimc_driver_ids[] = {
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{
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.name = "s5p-fimc",
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.driver_data = (unsigned long)&fimc_drvdata_s5p,
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@ -1221,7 +1262,10 @@ static struct platform_device_id fimc_driver_ids[] = {
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.driver_data = (unsigned long)&fimc_drvdata_s5pv210,
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}, {
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.name = "exynos4-fimc",
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.driver_data = (unsigned long)&fimc_drvdata_exynos4,
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.driver_data = (unsigned long)&fimc_drvdata_exynos4210,
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}, {
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.name = "exynos4x12-fimc",
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.driver_data = (unsigned long)&fimc_drvdata_exynos4x12,
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},
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{},
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};
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@ -372,6 +372,7 @@ struct fimc_pix_limit {
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* @has_mainscaler_ext: 1 if extended mainscaler ratios in CIEXTEN register
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* are present in this IP revision
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* @has_cam_if: set if this instance has a camera input interface
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* @has_isp_wb: set if this instance has ISP writeback input
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* @pix_limit: pixel size constraints for the scaler
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* @min_inp_pixsize: minimum input pixel size
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* @min_out_pixsize: minimum output pixel size
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@ -386,8 +387,9 @@ struct fimc_variant {
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unsigned int has_cistatus2:1;
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unsigned int has_mainscaler_ext:1;
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unsigned int has_cam_if:1;
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unsigned int has_isp_wb:1;
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unsigned int has_alpha:1;
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struct fimc_pix_limit *pix_limit;
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const struct fimc_pix_limit *pix_limit;
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u16 min_inp_pixsize;
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u16 min_out_pixsize;
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u16 hor_offs_align;
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@ -402,7 +404,7 @@ struct fimc_variant {
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* @lclk_frequency: local bus clock frequency
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*/
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struct fimc_drvdata {
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struct fimc_variant *variant[FIMC_MAX_DEVS];
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const struct fimc_variant *variant[FIMC_MAX_DEVS];
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int num_entities;
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unsigned long lclk_frequency;
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};
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@ -435,7 +437,7 @@ struct fimc_dev {
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struct mutex lock;
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struct platform_device *pdev;
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struct s5p_platform_fimc *pdata;
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struct fimc_variant *variant;
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const struct fimc_variant *variant;
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u16 id;
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struct clk *clock[MAX_FIMC_CLOCKS];
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void __iomem *regs;
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@ -300,7 +300,7 @@ static int fimc_m2m_g_fmt_mplane(struct file *file, void *fh,
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static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f)
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{
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struct fimc_dev *fimc = ctx->fimc_dev;
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struct fimc_variant *variant = fimc->variant;
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const struct fimc_variant *variant = fimc->variant;
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struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
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struct fimc_fmt *fmt;
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u32 max_w, mod_x, mod_y;
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@ -312,7 +312,7 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx)
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void fimc_hw_set_mainscaler(struct fimc_ctx *ctx)
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{
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struct fimc_dev *dev = ctx->fimc_dev;
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struct fimc_variant *variant = dev->variant;
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const struct fimc_variant *variant = dev->variant;
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struct fimc_scaler *sc = &ctx->scaler;
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u32 cfg;
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