serial: core: Add big-endian iotype
Since most drivers interpret UPIO_MEM32 to mean "little-endian" and use readl/writel to access the registers, add a parallel UPIO_MEM32BE to request the use of big-endian MMIO accessors (ioread32be/iowrite32be). Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 9 additions and 6 deletions
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@ -2153,6 +2153,7 @@ uart_report_port(struct uart_driver *drv, struct uart_port *port)
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break;
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case UPIO_MEM:
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case UPIO_MEM32:
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case UPIO_MEM32BE:
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case UPIO_AU:
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case UPIO_TSI:
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snprintf(address, sizeof(address),
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@ -2796,6 +2797,7 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
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(port1->hub6 == port2->hub6);
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case UPIO_MEM:
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case UPIO_MEM32:
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case UPIO_MEM32BE:
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case UPIO_AU:
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case UPIO_TSI:
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return (port1->mapbase == port2->mapbase);
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@ -142,12 +142,13 @@ struct uart_port {
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unsigned char iotype; /* io access style */
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unsigned char unused1;
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#define UPIO_PORT (0)
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#define UPIO_HUB6 (1)
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#define UPIO_MEM (2)
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#define UPIO_MEM32 (3)
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#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
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#define UPIO_TSI (5) /* Tsi108/109 type IO */
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#define UPIO_PORT (0) /* 8b I/O port access */
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#define UPIO_HUB6 (1) /* Hub6 ISA card */
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#define UPIO_MEM (2) /* 8b MMIO access */
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#define UPIO_MEM32 (3) /* 32b little endian */
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#define UPIO_MEM32BE (4) /* 32b big endian */
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#define UPIO_AU (5) /* Au1x00 and RT288x type IO */
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#define UPIO_TSI (6) /* Tsi108/109 type IO */
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unsigned int read_status_mask; /* driver specific */
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unsigned int ignore_status_mask; /* driver specific */
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