Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (89 commits)
  bonding: documentation and code cleanup for resend_igmp
  bonding: prevent deadlock on slave store with alb mode (v3)
  net: hold rtnl again in dump callbacks
  Add Fujitsu 1000base-SX PCI ID to tg3
  bnx2x: protect sequence increment with mutex
  sch_sfq: fix peek() implementation
  isdn: netjet - blacklist Digium TDM400P
  via-velocity: don't annotate MAC registers as packed
  xen: netfront: hold RTNL when updating features.
  sctp: fix memory leak of the ASCONF queue when free asoc
  net: make dev_disable_lro use physical device if passed a vlan dev (v2)
  net: move is_vlan_dev into public header file (v2)
  bug.h: Fix build with CONFIG_PRINTK disabled.
  wireless: fix fatal kernel-doc error + warning in mac80211.h
  wireless: fix cfg80211.h new kernel-doc warnings
  iwlagn: dbg_fixed_rate only used when CONFIG_MAC80211_DEBUGFS enabled
  dst: catch uninitialized metrics
  be2net: hash key for rss-config cmd not set
  bridge: initialize fake_rtable metrics
  net: fix __dst_destroy_metrics_generic()
  ...

Fix up trivial conflicts in drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
This commit is contained in:
Linus Torvalds 2011-05-25 17:00:17 -07:00
commit 3f5785ec31
187 changed files with 2047 additions and 1201 deletions

View file

@ -770,8 +770,17 @@ resend_igmp
a failover event. One membership report is issued immediately after
the failover, subsequent packets are sent in each 200ms interval.
The valid range is 0 - 255; the default value is 1. This option
was added for bonding version 3.7.0.
The valid range is 0 - 255; the default value is 1. A value of 0
prevents the IGMP membership report from being issued in response
to the failover event.
This option is useful for bonding modes balance-rr (0), active-backup
(1), balance-tlb (5) and balance-alb (6), in which a failover can
switch the IGMP traffic from one slave to another. Therefore a fresh
IGMP report must be issued to cause the switch to forward the incoming
IGMP traffic over the newly selected slave.
This option was added for bonding version 3.7.0.
3. Configuring Bonding Devices
==============================

View file

@ -171,6 +171,7 @@ static void bcma_host_pci_remove(struct pci_dev *dev)
}
static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },

View file

@ -1072,6 +1072,12 @@ nj_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return -ENODEV;
}
if (pdev->subsystem_vendor == 0xb100 &&
pdev->subsystem_device == 0x0003 ) {
pr_notice("Netjet: Digium TDM400P not handled yet\n");
return -ENODEV;
}
card = kzalloc(sizeof(struct tiger_hw), GFP_ATOMIC);
if (!card) {
pr_info("No kmem for Netjet\n");

View file

@ -1703,7 +1703,8 @@ int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, u16 table_size)
{
struct be_mcc_wrb *wrb;
struct be_cmd_req_rss_config *req;
u32 myhash[10];
u32 myhash[10] = {0x0123, 0x4567, 0x89AB, 0xCDEF, 0x01EF,
0x0123, 0x4567, 0x89AB, 0xCDEF, 0x01EF};
int status;
if (mutex_lock_interruptible(&adapter->mbox_lock))

View file

@ -2675,7 +2675,7 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
* Min size diferent for TPA and non-TPA queues
*/
if (ring_size < (fp->disable_tpa ?
MIN_RX_SIZE_TPA : MIN_RX_SIZE_NONTPA)) {
MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
/* release memory allocated for this queue */
bnx2x_free_fp_mem_at(bp, index);
return -ENOMEM;

View file

@ -2222,12 +2222,13 @@ static void bnx2x_pmf_update(struct bnx2x *bp)
u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param)
{
int mb_idx = BP_FW_MB_IDX(bp);
u32 seq = ++bp->fw_seq;
u32 seq;
u32 rc = 0;
u32 cnt = 1;
u8 delay = CHIP_REV_IS_SLOW(bp) ? 100 : 10;
mutex_lock(&bp->fw_mb_mutex);
seq = ++bp->fw_seq;
SHMEM_WR(bp, func_mb[mb_idx].drv_mb_param, param);
SHMEM_WR(bp, func_mb[mb_idx].drv_mb_header, (command | seq));

View file

@ -163,8 +163,6 @@ static int tlb_initialize(struct bonding *bond)
struct tlb_client_info *new_hashtbl;
int i;
spin_lock_init(&(bond_info->tx_hashtbl_lock));
new_hashtbl = kzalloc(size, GFP_KERNEL);
if (!new_hashtbl) {
pr_err("%s: Error: Failed to allocate TLB hash table\n",
@ -747,8 +745,6 @@ static int rlb_initialize(struct bonding *bond)
int size = RLB_HASH_TABLE_SIZE * sizeof(struct rlb_client_info);
int i;
spin_lock_init(&(bond_info->rx_hashtbl_lock));
new_hashtbl = kmalloc(size, GFP_KERNEL);
if (!new_hashtbl) {
pr_err("%s: Error: Failed to allocate RLB hash table\n",

View file

@ -852,7 +852,7 @@ static void bond_resend_igmp_join_requests(struct bonding *bond)
static void bond_resend_igmp_join_requests_delayed(struct work_struct *work)
{
struct bonding *bond = container_of(work, struct bonding,
mcast_work.work);
mcast_work.work);
bond_resend_igmp_join_requests(bond);
}
@ -1172,10 +1172,12 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)
}
/* resend IGMP joins since active slave has changed or
* all were sent on curr_active_slave */
if (((USES_PRIMARY(bond->params.mode) && new_active) ||
bond->params.mode == BOND_MODE_ROUNDROBIN) &&
netif_running(bond->dev)) {
* all were sent on curr_active_slave.
* resend only if bond is brought up with the affected
* bonding modes and the retransmission is enabled */
if (netif_running(bond->dev) && (bond->params.resend_igmp > 0) &&
((USES_PRIMARY(bond->params.mode) && new_active) ||
bond->params.mode == BOND_MODE_ROUNDROBIN)) {
bond->igmp_retrans = bond->params.resend_igmp;
queue_delayed_work(bond->wq, &bond->mcast_work, 0);
}
@ -1542,12 +1544,6 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
bond_dev->name, slave_dev->name);
}
/* bond must be initialized by bond_open() before enslaving */
if (!(bond_dev->flags & IFF_UP)) {
pr_warning("%s: master_dev is not up in bond_enslave\n",
bond_dev->name);
}
/* already enslaved */
if (slave_dev->flags & IFF_SLAVE) {
pr_debug("Error, Device was already enslaved\n");
@ -4834,9 +4830,19 @@ static int bond_init(struct net_device *bond_dev)
{
struct bonding *bond = netdev_priv(bond_dev);
struct bond_net *bn = net_generic(dev_net(bond_dev), bond_net_id);
struct alb_bond_info *bond_info = &(BOND_ALB_INFO(bond));
pr_debug("Begin bond_init for %s\n", bond_dev->name);
/*
* Initialize locks that may be required during
* en/deslave operations. All of the bond_open work
* (of which this is part) should really be moved to
* a phase prior to dev_open
*/
spin_lock_init(&(bond_info->tx_hashtbl_lock));
spin_lock_init(&(bond_info->rx_hashtbl_lock));
bond->wq = create_singlethread_workqueue(bond_dev->name);
if (!bond->wq)
return -ENOMEM;

View file

@ -227,12 +227,6 @@ static ssize_t bonding_store_slaves(struct device *d,
struct net_device *dev;
struct bonding *bond = to_bond(d);
/* Quick sanity check -- is the bond interface up? */
if (!(bond->dev->flags & IFF_UP)) {
pr_warning("%s: doing slave updates when interface is down.\n",
bond->dev->name);
}
if (!rtnl_trylock())
return restart_syscall();
@ -1539,8 +1533,8 @@ static DEVICE_ATTR(all_slaves_active, S_IRUGO | S_IWUSR,
* Show and set the number of IGMP membership reports to send on link failure
*/
static ssize_t bonding_show_resend_igmp(struct device *d,
struct device_attribute *attr,
char *buf)
struct device_attribute *attr,
char *buf)
{
struct bonding *bond = to_bond(d);
@ -1548,8 +1542,8 @@ static ssize_t bonding_show_resend_igmp(struct device *d,
}
static ssize_t bonding_store_resend_igmp(struct device *d,
struct device_attribute *attr,
const char *buf, size_t count)
struct device_attribute *attr,
const char *buf, size_t count)
{
int new_value, ret = count;
struct bonding *bond = to_bond(d);
@ -1561,7 +1555,7 @@ static ssize_t bonding_store_resend_igmp(struct device *d,
goto out;
}
if (new_value < 0) {
if (new_value < 0 || new_value > 255) {
pr_err("%s: Invalid resend_igmp value %d not in range 0-255; rejected.\n",
bond->dev->name, new_value);
ret = -EINVAL;

View file

@ -2083,7 +2083,7 @@ static void ehea_set_multicast_list(struct net_device *dev)
struct netdev_hw_addr *ha;
int ret;
if (dev->flags & IFF_PROMISC) {
if (port->promisc) {
ehea_promiscuous(dev, 1);
return;
}

View file

@ -67,27 +67,27 @@ static void bfin_sir_stop_tx(struct bfin_sir_port *port)
disable_dma(port->tx_dma_channel);
#endif
while (!(SIR_UART_GET_LSR(port) & THRE)) {
while (!(UART_GET_LSR(port) & THRE)) {
cpu_relax();
continue;
}
SIR_UART_STOP_TX(port);
UART_CLEAR_IER(port, ETBEI);
}
static void bfin_sir_enable_tx(struct bfin_sir_port *port)
{
SIR_UART_ENABLE_TX(port);
UART_SET_IER(port, ETBEI);
}
static void bfin_sir_stop_rx(struct bfin_sir_port *port)
{
SIR_UART_STOP_RX(port);
UART_CLEAR_IER(port, ERBFI);
}
static void bfin_sir_enable_rx(struct bfin_sir_port *port)
{
SIR_UART_ENABLE_RX(port);
UART_SET_IER(port, ERBFI);
}
static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
@ -116,7 +116,7 @@ static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
do {
udelay(utime);
lsr = SIR_UART_GET_LSR(port);
lsr = UART_GET_LSR(port);
} while (!(lsr & TEMT) && count--);
/* The useconds for 1 bits to transmit */
@ -125,27 +125,27 @@ static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
/* Clear UCEN bit to reset the UART state machine
* and control registers
*/
val = SIR_UART_GET_GCTL(port);
val = UART_GET_GCTL(port);
val &= ~UCEN;
SIR_UART_PUT_GCTL(port, val);
UART_PUT_GCTL(port, val);
/* Set DLAB in LCR to Access THR RBR IER */
SIR_UART_SET_DLAB(port);
UART_SET_DLAB(port);
SSYNC();
SIR_UART_PUT_DLL(port, quot & 0xFF);
SIR_UART_PUT_DLH(port, (quot >> 8) & 0xFF);
UART_PUT_DLL(port, quot & 0xFF);
UART_PUT_DLH(port, (quot >> 8) & 0xFF);
SSYNC();
/* Clear DLAB in LCR */
SIR_UART_CLEAR_DLAB(port);
UART_CLEAR_DLAB(port);
SSYNC();
SIR_UART_PUT_LCR(port, lcr);
UART_PUT_LCR(port, lcr);
val = SIR_UART_GET_GCTL(port);
val = UART_GET_GCTL(port);
val |= UCEN;
SIR_UART_PUT_GCTL(port, val);
UART_PUT_GCTL(port, val);
ret = 0;
break;
@ -154,12 +154,12 @@ static int bfin_sir_set_speed(struct bfin_sir_port *port, int speed)
break;
}
val = SIR_UART_GET_GCTL(port);
val = UART_GET_GCTL(port);
/* If not add the 'RPOLC', we can't catch the receive interrupt.
* It's related with the HW layout and the IR transiver.
*/
val |= IREN | RPOLC;
SIR_UART_PUT_GCTL(port, val);
UART_PUT_GCTL(port, val);
return ret;
}
@ -168,7 +168,7 @@ static int bfin_sir_is_receiving(struct net_device *dev)
struct bfin_sir_self *self = netdev_priv(dev);
struct bfin_sir_port *port = self->sir_port;
if (!(SIR_UART_GET_IER(port) & ERBFI))
if (!(UART_GET_IER(port) & ERBFI))
return 0;
return self->rx_buff.state != OUTSIDE_FRAME;
}
@ -182,7 +182,7 @@ static void bfin_sir_tx_chars(struct net_device *dev)
if (self->tx_buff.len != 0) {
chr = *(self->tx_buff.data);
SIR_UART_PUT_CHAR(port, chr);
UART_PUT_CHAR(port, chr);
self->tx_buff.data++;
self->tx_buff.len--;
} else {
@ -206,8 +206,8 @@ static void bfin_sir_rx_chars(struct net_device *dev)
struct bfin_sir_port *port = self->sir_port;
unsigned char ch;
SIR_UART_CLEAR_LSR(port);
ch = SIR_UART_GET_CHAR(port);
UART_CLEAR_LSR(port);
ch = UART_GET_CHAR(port);
async_unwrap_char(dev, &self->stats, &self->rx_buff, ch);
dev->last_rx = jiffies;
}
@ -219,7 +219,7 @@ static irqreturn_t bfin_sir_rx_int(int irq, void *dev_id)
struct bfin_sir_port *port = self->sir_port;
spin_lock(&self->lock);
while ((SIR_UART_GET_LSR(port) & DR))
while ((UART_GET_LSR(port) & DR))
bfin_sir_rx_chars(dev);
spin_unlock(&self->lock);
@ -233,7 +233,7 @@ static irqreturn_t bfin_sir_tx_int(int irq, void *dev_id)
struct bfin_sir_port *port = self->sir_port;
spin_lock(&self->lock);
if (SIR_UART_GET_LSR(port) & THRE)
if (UART_GET_LSR(port) & THRE)
bfin_sir_tx_chars(dev);
spin_unlock(&self->lock);
@ -312,7 +312,7 @@ static void bfin_sir_dma_rx_chars(struct net_device *dev)
struct bfin_sir_port *port = self->sir_port;
int i;
SIR_UART_CLEAR_LSR(port);
UART_CLEAR_LSR(port);
for (i = port->rx_dma_buf.head; i < port->rx_dma_buf.tail; i++)
async_unwrap_char(dev, &self->stats, &self->rx_buff, port->rx_dma_buf.buf[i]);
@ -430,11 +430,10 @@ static void bfin_sir_shutdown(struct bfin_sir_port *port, struct net_device *dev
unsigned short val;
bfin_sir_stop_rx(port);
SIR_UART_DISABLE_INTS(port);
val = SIR_UART_GET_GCTL(port);
val = UART_GET_GCTL(port);
val &= ~(UCEN | IREN | RPOLC);
SIR_UART_PUT_GCTL(port, val);
UART_PUT_GCTL(port, val);
#ifdef CONFIG_SIR_BFIN_DMA
disable_dma(port->tx_dma_channel);
@ -518,12 +517,12 @@ static void bfin_sir_send_work(struct work_struct *work)
* sending data. We also can set the speed, which will
* reset all the UART.
*/
val = SIR_UART_GET_GCTL(port);
val = UART_GET_GCTL(port);
val &= ~(IREN | RPOLC);
SIR_UART_PUT_GCTL(port, val);
UART_PUT_GCTL(port, val);
SSYNC();
val |= IREN | RPOLC;
SIR_UART_PUT_GCTL(port, val);
UART_PUT_GCTL(port, val);
SSYNC();
/* bfin_sir_set_speed(port, self->speed); */

View file

@ -26,7 +26,6 @@
#include <asm/cacheflush.h>
#include <asm/dma.h>
#include <asm/portmux.h>
#include <mach/bfin_serial_5xx.h>
#undef DRIVER_NAME
#ifdef CONFIG_SIR_BFIN_DMA
@ -83,64 +82,10 @@ struct bfin_sir_self {
#define DRIVER_NAME "bfin_sir"
#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
#ifdef CONFIG_BF54x
#define SIR_UART_GET_LSR(port) bfin_read16((port)->membase + OFFSET_LSR)
#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER_SET)
#define SIR_UART_SET_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_SET), v)
#define SIR_UART_CLEAR_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v)
#define SIR_UART_PUT_LSR(port, v) bfin_write16(((port)->membase + OFFSET_LSR), v)
#define SIR_UART_CLEAR_LSR(port) bfin_write16(((port)->membase + OFFSET_LSR), -1)
#define SIR_UART_SET_DLAB(port)
#define SIR_UART_CLEAR_DLAB(port)
#define SIR_UART_ENABLE_INTS(port, v) SIR_UART_SET_IER(port, v)
#define SIR_UART_DISABLE_INTS(port) SIR_UART_CLEAR_IER(port, 0xF)
#define SIR_UART_STOP_TX(port) do { SIR_UART_PUT_LSR(port, TFI); SIR_UART_CLEAR_IER(port, ETBEI); } while (0)
#define SIR_UART_ENABLE_TX(port) do { SIR_UART_SET_IER(port, ETBEI); } while (0)
#define SIR_UART_STOP_RX(port) do { SIR_UART_CLEAR_IER(port, ERBFI); } while (0)
#define SIR_UART_ENABLE_RX(port) do { SIR_UART_SET_IER(port, ERBFI); } while (0)
#else
#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
#define SIR_UART_SET_DLAB(port) do { SIR_UART_PUT_LCR(port, SIR_UART_GET_LCR(port) | DLAB); } while (0)
#define SIR_UART_CLEAR_DLAB(port) do { SIR_UART_PUT_LCR(port, SIR_UART_GET_LCR(port) & ~DLAB); } while (0)
#define SIR_UART_ENABLE_INTS(port, v) SIR_UART_PUT_IER(port, v)
#define SIR_UART_DISABLE_INTS(port) SIR_UART_PUT_IER(port, 0)
#define SIR_UART_STOP_TX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) & ~ETBEI); } while (0)
#define SIR_UART_ENABLE_TX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) | ETBEI); } while (0)
#define SIR_UART_STOP_RX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) & ~ERBFI); } while (0)
#define SIR_UART_ENABLE_RX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) | ERBFI); } while (0)
static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
{
unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
port->lsr |= (lsr & (BI|FE|PE|OE));
return lsr | port->lsr;
}
static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
{
port->lsr = 0;
bfin_read16(port->membase + OFFSET_LSR);
}
#endif
#define port_membase(port) (((struct bfin_sir_port *)(port))->membase)
#define get_lsr_cache(port) (((struct bfin_sir_port *)(port))->lsr)
#define put_lsr_cache(port, v) (((struct bfin_sir_port *)(port))->lsr = (v))
#include <asm/bfin_serial.h>
static const unsigned short per[][4] = {
/* rx pin tx pin NULL uart_number */

View file

@ -292,6 +292,7 @@ static DEFINE_PCI_DEVICE_TABLE(tg3_pci_tbl) = {
{PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1003)},
{PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC9100)},
{PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_TIGON3)},
{PCI_DEVICE(0x10cf, 0x11a2)}, /* Fujitsu 1000base-SX with BCM5703SKHB */
{}
};

View file

@ -54,7 +54,7 @@
#include <linux/usb/usbnet.h>
#include <linux/usb/cdc.h>
#define DRIVER_VERSION "06-May-2011"
#define DRIVER_VERSION "24-May-2011"
/* CDC NCM subclass 3.2.1 */
#define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10
@ -134,8 +134,6 @@ struct cdc_ncm_ctx {
u16 tx_ndp_modulus;
u16 tx_seq;
u16 connected;
u8 data_claimed;
u8 control_claimed;
};
static void cdc_ncm_tx_timeout(unsigned long arg);
@ -460,17 +458,6 @@ static void cdc_ncm_free(struct cdc_ncm_ctx *ctx)
del_timer_sync(&ctx->tx_timer);
if (ctx->data_claimed) {
usb_set_intfdata(ctx->data, NULL);
usb_driver_release_interface(driver_of(ctx->intf), ctx->data);
}
if (ctx->control_claimed) {
usb_set_intfdata(ctx->control, NULL);
usb_driver_release_interface(driver_of(ctx->intf),
ctx->control);
}
if (ctx->tx_rem_skb != NULL) {
dev_kfree_skb_any(ctx->tx_rem_skb);
ctx->tx_rem_skb = NULL;
@ -495,7 +482,7 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf)
ctx = kmalloc(sizeof(*ctx), GFP_KERNEL);
if (ctx == NULL)
goto error;
return -ENODEV;
memset(ctx, 0, sizeof(*ctx));
@ -568,46 +555,36 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf)
/* check if we got everything */
if ((ctx->control == NULL) || (ctx->data == NULL) ||
(ctx->ether_desc == NULL))
(ctx->ether_desc == NULL) || (ctx->control != intf))
goto error;
/* claim interfaces, if any */
if (ctx->data != intf) {
temp = usb_driver_claim_interface(driver, ctx->data, dev);
if (temp)
goto error;
ctx->data_claimed = 1;
}
if (ctx->control != intf) {
temp = usb_driver_claim_interface(driver, ctx->control, dev);
if (temp)
goto error;
ctx->control_claimed = 1;
}
temp = usb_driver_claim_interface(driver, ctx->data, dev);
if (temp)
goto error;
iface_no = ctx->data->cur_altsetting->desc.bInterfaceNumber;
/* reset data interface */
temp = usb_set_interface(dev->udev, iface_no, 0);
if (temp)
goto error;
goto error2;
/* initialize data interface */
if (cdc_ncm_setup(ctx))
goto error;
goto error2;
/* configure data interface */
temp = usb_set_interface(dev->udev, iface_no, 1);
if (temp)
goto error;
goto error2;
cdc_ncm_find_endpoints(ctx, ctx->data);
cdc_ncm_find_endpoints(ctx, ctx->control);
if ((ctx->in_ep == NULL) || (ctx->out_ep == NULL) ||
(ctx->status_ep == NULL))
goto error;
goto error2;
dev->net->ethtool_ops = &cdc_ncm_ethtool_ops;
@ -617,7 +594,7 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf)
temp = usbnet_get_ethernet_addr(dev, ctx->ether_desc->iMACAddress);
if (temp)
goto error;
goto error2;
dev_info(&dev->udev->dev, "MAC-Address: "
"0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
@ -642,38 +619,38 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf)
ctx->tx_speed = ctx->rx_speed = 0;
return 0;
error2:
usb_set_intfdata(ctx->control, NULL);
usb_set_intfdata(ctx->data, NULL);
usb_driver_release_interface(driver, ctx->data);
error:
cdc_ncm_free((struct cdc_ncm_ctx *)dev->data[0]);
dev->data[0] = 0;
dev_info(&dev->udev->dev, "Descriptor failure\n");
dev_info(&dev->udev->dev, "bind() failure\n");
return -ENODEV;
}
static void cdc_ncm_unbind(struct usbnet *dev, struct usb_interface *intf)
{
struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev->data[0];
struct usb_driver *driver;
struct usb_driver *driver = driver_of(intf);
if (ctx == NULL)
return; /* no setup */
driver = driver_of(intf);
usb_set_intfdata(ctx->data, NULL);
usb_set_intfdata(ctx->control, NULL);
usb_set_intfdata(ctx->intf, NULL);
/* release interfaces, if any */
if (ctx->data_claimed) {
/* disconnect master --> disconnect slave */
if (intf == ctx->control && ctx->data) {
usb_set_intfdata(ctx->data, NULL);
usb_driver_release_interface(driver, ctx->data);
ctx->data_claimed = 0;
}
ctx->data = NULL;
if (ctx->control_claimed) {
} else if (intf == ctx->data && ctx->control) {
usb_set_intfdata(ctx->control, NULL);
usb_driver_release_interface(driver, ctx->control);
ctx->control_claimed = 0;
ctx->control = NULL;
}
usb_set_intfdata(ctx->intf, NULL);
cdc_ncm_free(ctx);
}

View file

@ -1096,7 +1096,7 @@ struct mac_regs {
volatile __le16 PatternCRC[8]; /* 0xB0 */
volatile __le32 ByteMask[4][4]; /* 0xC0 */
} __packed;
};
enum hw_mib {

View file

@ -4501,17 +4501,15 @@ static int setup_proc_entry( struct net_device *dev,
struct proc_dir_entry *entry;
/* First setup the device directory */
strcpy(apriv->proc_name,dev->name);
apriv->proc_entry = create_proc_entry(apriv->proc_name,
S_IFDIR|airo_perm,
airo_entry);
apriv->proc_entry = proc_mkdir_mode(apriv->proc_name, airo_perm,
airo_entry);
if (!apriv->proc_entry)
goto fail;
apriv->proc_entry->uid = proc_uid;
apriv->proc_entry->gid = proc_gid;
/* Setup the StatsDelta */
entry = proc_create_data("StatsDelta",
S_IFREG | (S_IRUGO&proc_perm),
entry = proc_create_data("StatsDelta", S_IRUGO & proc_perm,
apriv->proc_entry, &proc_statsdelta_ops, dev);
if (!entry)
goto fail_stats_delta;
@ -4519,8 +4517,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the Stats */
entry = proc_create_data("Stats",
S_IFREG | (S_IRUGO&proc_perm),
entry = proc_create_data("Stats", S_IRUGO & proc_perm,
apriv->proc_entry, &proc_stats_ops, dev);
if (!entry)
goto fail_stats;
@ -4528,8 +4525,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the Status */
entry = proc_create_data("Status",
S_IFREG | (S_IRUGO&proc_perm),
entry = proc_create_data("Status", S_IRUGO & proc_perm,
apriv->proc_entry, &proc_status_ops, dev);
if (!entry)
goto fail_status;
@ -4537,8 +4533,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the Config */
entry = proc_create_data("Config",
S_IFREG | proc_perm,
entry = proc_create_data("Config", proc_perm,
apriv->proc_entry, &proc_config_ops, dev);
if (!entry)
goto fail_config;
@ -4546,8 +4541,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the SSID */
entry = proc_create_data("SSID",
S_IFREG | proc_perm,
entry = proc_create_data("SSID", proc_perm,
apriv->proc_entry, &proc_SSID_ops, dev);
if (!entry)
goto fail_ssid;
@ -4555,8 +4549,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the APList */
entry = proc_create_data("APList",
S_IFREG | proc_perm,
entry = proc_create_data("APList", proc_perm,
apriv->proc_entry, &proc_APList_ops, dev);
if (!entry)
goto fail_aplist;
@ -4564,8 +4557,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the BSSList */
entry = proc_create_data("BSSList",
S_IFREG | proc_perm,
entry = proc_create_data("BSSList", proc_perm,
apriv->proc_entry, &proc_BSSList_ops, dev);
if (!entry)
goto fail_bsslist;
@ -4573,8 +4565,7 @@ static int setup_proc_entry( struct net_device *dev,
entry->gid = proc_gid;
/* Setup the WepKey */
entry = proc_create_data("WepKey",
S_IFREG | proc_perm,
entry = proc_create_data("WepKey", proc_perm,
apriv->proc_entry, &proc_wepkey_ops, dev);
if (!entry)
goto fail_wepkey;
@ -5706,9 +5697,7 @@ static int __init airo_init_module( void )
{
int i;
airo_entry = create_proc_entry("driver/aironet",
S_IFDIR | airo_perm,
NULL);
airo_entry = proc_mkdir_mode("driver/aironet", airo_perm, NULL);
if (airo_entry) {
airo_entry->uid = proc_uid;

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
*

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,3 +1,19 @@
/*
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef AR9003_EEPROM_H
#define AR9003_EEPROM_H

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2010 Atheros Communications, Inc.
* Copyright (c) 2010-2011 Atheros Communications, Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -397,6 +397,9 @@ struct ath_beacon {
struct ath_descdma bdma;
struct ath_txq *cabq;
struct list_head bbuf;
bool tx_processed;
bool tx_last;
};
void ath_beacon_tasklet(unsigned long data);

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -18,6 +18,12 @@
#define FUDGE 2
static void ath9k_reset_beacon_status(struct ath_softc *sc)
{
sc->beacon.tx_processed = false;
sc->beacon.tx_last = false;
}
/*
* This function will modify certain transmit queue properties depending on
* the operating mode of the station (AP or AdHoc). Parameters are AIFS
@ -72,6 +78,8 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
struct ieee80211_supported_band *sband;
u8 rate = 0;
ath9k_reset_beacon_status(sc);
ds = bf->bf_desc;
flags = ATH9K_TXDESC_NOACK;
@ -134,6 +142,8 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
struct ieee80211_tx_info *info;
int cabq_depth;
ath9k_reset_beacon_status(sc);
avp = (void *)vif->drv_priv;
cabq = sc->beacon.cabq;
@ -351,9 +361,7 @@ void ath_beacon_tasklet(unsigned long data)
struct ath_buf *bf = NULL;
struct ieee80211_vif *vif;
int slot;
u32 bfaddr, bc = 0, tsftu;
u64 tsf;
u16 intval;
u32 bfaddr, bc = 0;
/*
* Check if the previous beacon has gone out. If
@ -388,17 +396,27 @@ void ath_beacon_tasklet(unsigned long data)
* on the tsf to safeguard against missing an swba.
*/
intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
tsf = ath9k_hw_gettsf64(ah);
tsf += TU_TO_USEC(ah->config.sw_beacon_response_time);
tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
slot = (tsftu % (intval * ATH_BCBUF)) / intval;
vif = sc->beacon.bslot[slot];
if (ah->opmode == NL80211_IFTYPE_AP) {
u16 intval;
u32 tsftu;
u64 tsf;
intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
tsf = ath9k_hw_gettsf64(ah);
tsf += TU_TO_USEC(ah->config.sw_beacon_response_time);
tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
slot = (tsftu % (intval * ATH_BCBUF)) / intval;
vif = sc->beacon.bslot[slot];
ath_dbg(common, ATH_DBG_BEACON,
"slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
slot, tsf, tsftu / ATH_BCBUF, intval, vif);
} else {
slot = 0;
vif = sc->beacon.bslot[slot];
}
ath_dbg(common, ATH_DBG_BEACON,
"slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
slot, tsf, tsftu / ATH_BCBUF, intval, vif);
bfaddr = 0;
if (vif) {
@ -636,6 +654,8 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
struct ath_common *common = ath9k_hw_common(ah);
u32 tsf, delta, intval, nexttbtt;
ath9k_reset_beacon_status(sc);
tsf = ath9k_hw_gettsf32(ah) + TU_TO_USEC(FUDGE);
intval = TU_TO_USEC(conf->beacon_interval & ATH9K_BEACON_PERIOD);
@ -646,7 +666,7 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
delta = (tsf - sc->beacon.bc_tstamp);
else
delta = (tsf + 1 + (~0U - sc->beacon.bc_tstamp));
nexttbtt = tsf + roundup(delta, intval);
nexttbtt = tsf + intval - (delta % intval);
}
ath_dbg(common, ATH_DBG_BEACON,

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2009 Atheros Communications Inc.
* Copyright (c) 2009-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2009 Atheros Communications Inc.
* Copyright (c) 2009-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2009 Atheros Communications Inc.
* Copyright (c) 2009-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2009 Atheros Communications Inc.
* Copyright (c) 2009-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -435,6 +435,7 @@ static ssize_t read_file_wiphy(struct file *file, char __user *user_buf,
conf->channel_type,
channel_type_str(conf->channel_type));
ath9k_ps_wakeup(sc);
put_unaligned_le32(REG_READ_D(sc->sc_ah, AR_STA_ID0), addr);
put_unaligned_le16(REG_READ_D(sc->sc_ah, AR_STA_ID1) & 0xffff, addr + 4);
len += snprintf(buf + len, sizeof(buf) - len,
@ -444,6 +445,7 @@ static ssize_t read_file_wiphy(struct file *file, char __user *user_buf,
len += snprintf(buf + len, sizeof(buf) - len,
"addrmask: %pM\n", addr);
tmp = ath9k_hw_getrxfilter(sc->sc_ah);
ath9k_ps_restore(sc);
len += snprintf(buf + len, sizeof(buf) - len,
"rfilt: 0x%x", tmp);
if (tmp & ATH9K_RX_FILTER_UCAST)
@ -725,6 +727,7 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
break;
}
ath9k_ps_wakeup(sc);
len += snprintf(buf + len, size - len,
"curbssid: %pM\n"
"OP-Mode: %s(%i)\n"
@ -734,6 +737,7 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
REG_READ(ah, AR_BEACON_PERIOD));
reg = REG_READ(ah, AR_TIMER_MODE);
ath9k_ps_restore(sc);
len += snprintf(buf + len, size - len, "Timer-Mode-Register: 0x%x (",
reg);
if (reg & AR_TBTT_TIMER_EN)
@ -1050,7 +1054,9 @@ static ssize_t read_file_regval(struct file *file, char __user *user_buf,
unsigned int len;
u32 regval;
ath9k_ps_wakeup(sc);
regval = REG_READ_D(ah, sc->debug.regidx);
ath9k_ps_restore(sc);
len = sprintf(buf, "0x%08x\n", regval);
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
}
@ -1072,7 +1078,9 @@ static ssize_t write_file_regval(struct file *file, const char __user *user_buf,
if (strict_strtoul(buf, 0, &regval))
return -EINVAL;
ath9k_ps_wakeup(sc);
REG_WRITE_D(ah, sc->debug.regidx, regval);
ath9k_ps_restore(sc);
return count;
}

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -18,7 +18,7 @@
#define HTC_USB_H
#define MAJOR_VERSION_REQ 1
#define MINOR_VERSION_REQ 2
#define MINOR_VERSION_REQ 3
#define IS_AR7010_DEVICE(_v) (((_v) == AR9280_USB) || ((_v) == AR9287_USB))

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -46,15 +46,8 @@ extern struct ieee80211_ops ath9k_htc_ops;
extern int htc_modparam_nohwcrypt;
enum htc_phymode {
HTC_MODE_AUTO = 0,
HTC_MODE_11A = 1,
HTC_MODE_11B = 2,
HTC_MODE_11G = 3,
HTC_MODE_FH = 4,
HTC_MODE_TURBO_A = 5,
HTC_MODE_TURBO_G = 6,
HTC_MODE_11NA = 7,
HTC_MODE_11NG = 8
HTC_MODE_11NA = 0,
HTC_MODE_11NG = 1
};
enum htc_opmode {
@ -123,18 +116,13 @@ struct ath9k_htc_target_vif {
u8 pad;
} __packed;
#define ATH_HTC_STA_AUTH 0x0001
#define ATH_HTC_STA_QOS 0x0002
#define ATH_HTC_STA_ERP 0x0004
#define ATH_HTC_STA_HT 0x0008
struct ath9k_htc_target_sta {
u8 macaddr[ETH_ALEN];
u8 bssid[ETH_ALEN];
u8 sta_index;
u8 vif_index;
u8 is_vif_sta;
__be16 flags; /* ATH_HTC_STA_* */
__be16 flags;
__be16 htcap;
__be16 maxampdu;
u8 pad;
@ -285,9 +273,9 @@ struct ath9k_htc_rx {
};
#define ATH9K_HTC_TX_CLEANUP_INTERVAL 50 /* ms */
#define ATH9K_HTC_TX_TIMEOUT_INTERVAL 2500 /* ms */
#define ATH9K_HTC_TX_TIMEOUT_INTERVAL 3000 /* ms */
#define ATH9K_HTC_TX_RESERVE 10
#define ATH9K_HTC_TX_TIMEOUT_COUNT 20
#define ATH9K_HTC_TX_TIMEOUT_COUNT 40
#define ATH9K_HTC_TX_THRESHOLD (MAX_TX_BUF_NUM - ATH9K_HTC_TX_RESERVE)
#define ATH9K_HTC_OP_TX_QUEUES_STOP BIT(0)
@ -450,6 +438,7 @@ struct ath9k_htc_priv {
u8 vif_sta_pos[ATH9K_HTC_MAX_VIF];
u8 num_ibss_vif;
u8 num_sta_vif;
u8 num_sta_assoc_vif;
u8 num_ap_vif;
u16 op_flags;

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -258,7 +258,7 @@ static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
*/
if (IS_AR7010_DEVICE(drv_info))
priv->htc->credits = 48;
priv->htc->credits = 45;
else
priv->htc->credits = 33;
@ -769,11 +769,6 @@ static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
hw->channel_change_time = 5000;
hw->max_listen_interval = 10;
if (AR_SREV_9271(priv->ah))
hw->max_tx_aggregation_subframes = MAX_TX_AMPDU_SUBFRAMES_9271;
else
hw->max_tx_aggregation_subframes = MAX_TX_AMPDU_SUBFRAMES_7010;
hw->vif_data_size = sizeof(struct ath9k_htc_vif);
hw->sta_data_size = sizeof(struct ath9k_htc_sta);

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -26,7 +26,7 @@ static enum htc_phymode ath9k_htc_get_curmode(struct ath9k_htc_priv *priv,
{
enum htc_phymode mode;
mode = HTC_MODE_AUTO;
mode = -EINVAL;
switch (ichan->chanmode) {
case CHANNEL_G:
@ -45,6 +45,8 @@ static enum htc_phymode ath9k_htc_get_curmode(struct ath9k_htc_priv *priv,
break;
}
WARN_ON(mode < 0);
return mode;
}
@ -500,9 +502,6 @@ static int ath9k_htc_add_station(struct ath9k_htc_priv *priv,
tsta.maxampdu = cpu_to_be16(maxampdu);
}
if (sta && sta->ht_cap.ht_supported)
tsta.flags = cpu_to_be16(ATH_HTC_STA_HT);
WMI_CMD_BUF(WMI_NODE_CREATE_CMDID, &tsta);
if (ret) {
if (sta)
@ -582,7 +581,7 @@ int ath9k_htc_update_cap_target(struct ath9k_htc_priv *priv,
memset(&tcap, 0, sizeof(struct ath9k_htc_cap_target));
tcap.ampdu_limit = cpu_to_be32(0xffff);
tcap.ampdu_subframes = priv->hw->max_tx_aggregation_subframes;
tcap.ampdu_subframes = 0xff;
tcap.enable_coex = enable_coex;
tcap.tx_chainmask = priv->ah->caps.tx_chainmask;
@ -1165,6 +1164,8 @@ static void ath9k_htc_remove_interface(struct ieee80211_hw *hw,
ath9k_htc_set_opmode(priv);
ath9k_htc_set_bssid_mask(priv, vif);
/*
* Stop ANI only if there are no associated station interfaces.
*/
@ -1435,6 +1436,37 @@ static int ath9k_htc_set_key(struct ieee80211_hw *hw,
return ret;
}
static void ath9k_htc_set_bssid(struct ath9k_htc_priv *priv)
{
struct ath_common *common = ath9k_hw_common(priv->ah);
ath9k_hw_write_associd(priv->ah);
ath_dbg(common, ATH_DBG_CONFIG,
"BSSID: %pM aid: 0x%x\n",
common->curbssid, common->curaid);
}
static void ath9k_htc_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
{
struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
struct ath_common *common = ath9k_hw_common(priv->ah);
struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
if ((vif->type == NL80211_IFTYPE_STATION) && bss_conf->assoc) {
common->curaid = bss_conf->aid;
memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
}
}
static void ath9k_htc_choose_set_bssid(struct ath9k_htc_priv *priv)
{
if (priv->num_sta_assoc_vif == 1) {
ieee80211_iterate_active_interfaces_atomic(priv->hw,
ath9k_htc_bss_iter, priv);
ath9k_htc_set_bssid(priv);
}
}
static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
struct ieee80211_bss_conf *bss_conf,
@ -1443,43 +1475,32 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
struct ath9k_htc_priv *priv = hw->priv;
struct ath_hw *ah = priv->ah;
struct ath_common *common = ath9k_hw_common(ah);
bool set_assoc;
mutex_lock(&priv->mutex);
ath9k_htc_ps_wakeup(priv);
/*
* Set the HW AID/BSSID only for the first station interface
* or in IBSS mode.
*/
set_assoc = !!((priv->ah->opmode == NL80211_IFTYPE_ADHOC) ||
((priv->ah->opmode == NL80211_IFTYPE_STATION) &&
(priv->num_sta_vif == 1)));
if (changed & BSS_CHANGED_ASSOC) {
if (set_assoc) {
ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
bss_conf->assoc);
ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
bss_conf->assoc);
common->curaid = bss_conf->assoc ?
bss_conf->aid : 0;
bss_conf->assoc ?
priv->num_sta_assoc_vif++ : priv->num_sta_assoc_vif--;
if (bss_conf->assoc)
if (priv->ah->opmode == NL80211_IFTYPE_STATION) {
if (bss_conf->assoc && (priv->num_sta_assoc_vif == 1))
ath9k_htc_start_ani(priv);
else
else if (priv->num_sta_assoc_vif == 0)
ath9k_htc_stop_ani(priv);
}
}
if (changed & BSS_CHANGED_BSSID) {
if (set_assoc) {
if (priv->ah->opmode == NL80211_IFTYPE_ADHOC) {
common->curaid = bss_conf->aid;
memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
ath9k_hw_write_associd(ah);
ath_dbg(common, ATH_DBG_CONFIG,
"BSSID: %pM aid: 0x%x\n",
common->curbssid, common->curaid);
ath9k_htc_set_bssid(priv);
} else if (priv->ah->opmode == NL80211_IFTYPE_STATION) {
ath9k_htc_choose_set_bssid(priv);
}
}

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -875,6 +875,7 @@ u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv)
rfilt |= ATH9K_RX_FILTER_CONTROL;
if ((ah->opmode == NL80211_IFTYPE_STATION) &&
(priv->nvifs <= 1) &&
!(priv->rxfilter & FIF_BCN_PRBRESP_PROMISC))
rfilt |= ATH9K_RX_FILTER_MYBEACON;
else
@ -888,6 +889,9 @@ u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv)
if (priv->rxfilter & FIF_PSPOLL)
rfilt |= ATH9K_RX_FILTER_PSPOLL;
if (priv->nvifs > 1)
rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
return rfilt;
#undef RX_FILTER_PRESERVE

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2010 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -2332,6 +2332,45 @@ static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
return false;
}
int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
{
struct ath_softc *sc = hw->priv;
struct ath_hw *ah = sc->sc_ah;
struct ieee80211_vif *vif;
struct ath_vif *avp;
struct ath_buf *bf;
struct ath_tx_status ts;
int status;
vif = sc->beacon.bslot[0];
if (!vif)
return 0;
avp = (void *)vif->drv_priv;
if (!avp->is_bslot_active)
return 0;
if (!sc->beacon.tx_processed) {
tasklet_disable(&sc->bcon_tasklet);
bf = avp->av_bcbuf;
if (!bf || !bf->bf_mpdu)
goto skip;
status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
if (status == -EINPROGRESS)
goto skip;
sc->beacon.tx_processed = true;
sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
skip:
tasklet_enable(&sc->bcon_tasklet);
}
return sc->beacon.tx_last;
}
struct ieee80211_ops ath9k_ops = {
.tx = ath9k_tx,
.start = ath9k_start,
@ -2356,4 +2395,5 @@ struct ieee80211_ops ath9k_ops = {
.set_coverage_class = ath9k_set_coverage_class,
.flush = ath9k_flush,
.tx_frames_pending = ath9k_tx_frames_pending,
.tx_last_beacon = ath9k_tx_last_beacon,
};

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,6 +1,6 @@
/*
* Copyright (c) 2004 Video54 Technologies, Inc.
* Copyright (c) 2004-2009 Atheros Communications, Inc.
* Copyright (c) 2004-2011 Atheros Communications, Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,7 +1,7 @@
/*
* Copyright (c) 2004 Sam Leffler, Errno Consulting
* Copyright (c) 2004 Video54 Technologies, Inc.
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2010 Atheros Communications Inc.
* Copyright (c) 2010-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
* Copyright (c) 2008-2011 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

View file

@ -286,6 +286,10 @@ struct ar9170 {
unsigned int tx_seq_table;
} fw;
/* interface configuration combinations */
struct ieee80211_iface_limit if_comb_limits[1];
struct ieee80211_iface_combination if_combs[1];
/* reset / stuck frames/queue detection */
struct work_struct restart_work;
struct work_struct ping_work;

View file

@ -151,6 +151,7 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
const struct carl9170fw_chk_desc *chk_desc;
const struct carl9170fw_last_desc *last_desc;
const struct carl9170fw_txsq_desc *txsq_desc;
u16 if_comb_types;
last_desc = carl9170_fw_find_desc(ar, LAST_MAGIC,
sizeof(*last_desc), CARL9170FW_LAST_DESC_CUR_VER);
@ -268,6 +269,9 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
if (SUPP(CARL9170FW_WOL))
device_set_wakeup_enable(&ar->udev->dev, true);
if_comb_types = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_P2P_CLIENT);
ar->fw.vif_num = otus_desc->vif_num;
ar->fw.cmd_bufs = otus_desc->cmd_bufs;
ar->fw.address = le32_to_cpu(otus_desc->fw_address);
@ -294,12 +298,25 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)
ar->hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_ADHOC);
if (SUPP(CARL9170FW_WLANTX_CAB)) {
ar->hw->wiphy->interface_modes |=
if_comb_types |=
BIT(NL80211_IFTYPE_AP) |
BIT(NL80211_IFTYPE_P2P_GO);
}
}
ar->if_comb_limits[0].max = ar->fw.vif_num;
ar->if_comb_limits[0].types = if_comb_types;
ar->if_combs[0].num_different_channels = 1;
ar->if_combs[0].max_interfaces = ar->fw.vif_num;
ar->if_combs[0].limits = ar->if_comb_limits;
ar->if_combs[0].n_limits = ARRAY_SIZE(ar->if_comb_limits);
ar->hw->wiphy->iface_combinations = ar->if_combs;
ar->hw->wiphy->n_iface_combinations = ARRAY_SIZE(ar->if_combs);
ar->hw->wiphy->interface_modes |= if_comb_types;
txsq_desc = carl9170_fw_find_desc(ar, TXSQ_MAGIC,
sizeof(*txsq_desc), CARL9170FW_TXSQ_DESC_CUR_VER);

View file

@ -1570,14 +1570,8 @@ void *carl9170_alloc(size_t priv_size)
INIT_LIST_HEAD(&ar->vif_list);
init_completion(&ar->tx_flush);
/*
* Note:
* IBSS/ADHOC and AP mode are only enabled, if the firmware
* supports these modes. The code which will add the
* additional interface_modes is in fw.c.
*/
hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
BIT(NL80211_IFTYPE_P2P_CLIENT);
/* firmware decides which modes we support */
hw->wiphy->interface_modes = 0;
hw->flags |= IEEE80211_HW_RX_INCLUDES_FCS |
IEEE80211_HW_REPORTS_TX_ACK_STATUS |

View file

@ -43,7 +43,7 @@
* set of ~ ( MAC XOR BSSID ) for all bssids we handle.
*
* When you do this you are essentially computing the common bits of all your
* BSSes. Later it is assumed the harware will "and" (&) the BSSID mask with
* BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
* the MAC address to obtain the relevant bits and compare the result with
* (frame's BSSID & mask) to see if they match.
*
@ -71,8 +71,8 @@
* On loop iteration for BSSID-02:
* bssid_mask &= ~(0001 ^ 1001)
* bssid_mask = (1010) & ~(0001 ^ 1001)
* bssid_mask = (1010) & ~(1001)
* bssid_mask = (1010) & (0110)
* bssid_mask = (1010) & ~(1000)
* bssid_mask = (1010) & (0111)
* bssid_mask = 0010
*
* A bssid_mask of 0010 means "only pay attention to the second least
@ -102,11 +102,9 @@
*
* IFRAME-02: 0001 (we should allow)
*
* allow = (0001 & 1010) == 1010
*
* allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
* --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
* --> allow = (0010) == (0010)
* --> allow = (0000) == (0000)
* --> allow = 1
*
* Other examples:

View file

@ -567,6 +567,8 @@ struct b43_dma {
struct b43_dmaring *tx_ring_mcast; /* Multicast */
struct b43_dmaring *rx_ring;
u32 translation; /* Routing bits */
};
struct b43_pio_txqueue;
@ -705,7 +707,7 @@ enum {
/* Data structure for one wireless device (802.11 core) */
struct b43_wldev {
struct ssb_device *dev;
struct ssb_device *sdev;
struct b43_wl *wl;
/* The device initialization status.
@ -879,22 +881,34 @@ static inline enum ieee80211_band b43_current_band(struct b43_wl *wl)
static inline u16 b43_read16(struct b43_wldev *dev, u16 offset)
{
return ssb_read16(dev->dev, offset);
return ssb_read16(dev->sdev, offset);
}
static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value)
{
ssb_write16(dev->dev, offset, value);
ssb_write16(dev->sdev, offset, value);
}
static inline u32 b43_read32(struct b43_wldev *dev, u16 offset)
{
return ssb_read32(dev->dev, offset);
return ssb_read32(dev->sdev, offset);
}
static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
{
ssb_write32(dev->dev, offset, value);
ssb_write32(dev->sdev, offset, value);
}
static inline void b43_block_read(struct b43_wldev *dev, void *buffer,
size_t count, u16 offset, u8 reg_width)
{
ssb_block_read(dev->sdev, buffer, count, offset, reg_width);
}
static inline void b43_block_write(struct b43_wldev *dev, const void *buffer,
size_t count, u16 offset, u8 reg_width)
{
ssb_block_write(dev->sdev, buffer, count, offset, reg_width);
}
static inline bool b43_using_pio_transfers(struct b43_wldev *dev)

View file

@ -80,7 +80,7 @@ static void op32_fill_descriptor(struct b43_dmaring *ring,
addr = (u32) (dmaaddr & ~SSB_DMA_TRANSLATION_MASK);
addrext = (u32) (dmaaddr & SSB_DMA_TRANSLATION_MASK)
>> SSB_DMA_TRANSLATION_SHIFT;
addr |= ssb_dma_translation(ring->dev->dev);
addr |= ring->dev->dma.translation;
ctl = bufsize & B43_DMA32_DCTL_BYTECNT;
if (slot == ring->nr_slots - 1)
ctl |= B43_DMA32_DCTL_DTABLEEND;
@ -174,7 +174,7 @@ static void op64_fill_descriptor(struct b43_dmaring *ring,
addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
>> SSB_DMA_TRANSLATION_SHIFT;
addrhi |= (ssb_dma_translation(ring->dev->dev) << 1);
addrhi |= (ring->dev->dma.translation << 1);
if (slot == ring->nr_slots - 1)
ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
if (start)
@ -333,10 +333,10 @@ static inline
dma_addr_t dmaaddr;
if (tx) {
dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
dmaaddr = dma_map_single(ring->dev->sdev->dma_dev,
buf, len, DMA_TO_DEVICE);
} else {
dmaaddr = dma_map_single(ring->dev->dev->dma_dev,
dmaaddr = dma_map_single(ring->dev->sdev->dma_dev,
buf, len, DMA_FROM_DEVICE);
}
@ -348,10 +348,10 @@ static inline
dma_addr_t addr, size_t len, int tx)
{
if (tx) {
dma_unmap_single(ring->dev->dev->dma_dev,
dma_unmap_single(ring->dev->sdev->dma_dev,
addr, len, DMA_TO_DEVICE);
} else {
dma_unmap_single(ring->dev->dev->dma_dev,
dma_unmap_single(ring->dev->sdev->dma_dev,
addr, len, DMA_FROM_DEVICE);
}
}
@ -361,7 +361,7 @@ static inline
dma_addr_t addr, size_t len)
{
B43_WARN_ON(ring->tx);
dma_sync_single_for_cpu(ring->dev->dev->dma_dev,
dma_sync_single_for_cpu(ring->dev->sdev->dma_dev,
addr, len, DMA_FROM_DEVICE);
}
@ -370,7 +370,7 @@ static inline
dma_addr_t addr, size_t len)
{
B43_WARN_ON(ring->tx);
dma_sync_single_for_device(ring->dev->dev->dma_dev,
dma_sync_single_for_device(ring->dev->sdev->dma_dev,
addr, len, DMA_FROM_DEVICE);
}
@ -401,7 +401,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
*/
if (ring->type == B43_DMA_64BIT)
flags |= GFP_DMA;
ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev,
ring->descbase = dma_alloc_coherent(ring->dev->sdev->dma_dev,
B43_DMA_RINGMEMSIZE,
&(ring->dmabase), flags);
if (!ring->descbase) {
@ -415,7 +415,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
static void free_ringmemory(struct b43_dmaring *ring)
{
dma_free_coherent(ring->dev->dev->dma_dev, B43_DMA_RINGMEMSIZE,
dma_free_coherent(ring->dev->sdev->dma_dev, B43_DMA_RINGMEMSIZE,
ring->descbase, ring->dmabase);
}
@ -523,7 +523,7 @@ static bool b43_dma_mapping_error(struct b43_dmaring *ring,
dma_addr_t addr,
size_t buffersize, bool dma_to_device)
{
if (unlikely(dma_mapping_error(ring->dev->dev->dma_dev, addr)))
if (unlikely(dma_mapping_error(ring->dev->sdev->dma_dev, addr)))
return 1;
switch (ring->type) {
@ -658,7 +658,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
int err = 0;
u32 value;
u32 addrext;
u32 trans = ssb_dma_translation(ring->dev->dev);
u32 trans = ring->dev->dma.translation;
if (ring->tx) {
if (ring->type == B43_DMA_64BIT) {
@ -869,7 +869,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
goto err_kfree_meta;
/* test for ability to dma to txhdr_cache */
dma_test = dma_map_single(dev->dev->dma_dev,
dma_test = dma_map_single(dev->sdev->dma_dev,
ring->txhdr_cache,
b43_txhdr_size(dev),
DMA_TO_DEVICE);
@ -884,7 +884,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
if (!ring->txhdr_cache)
goto err_kfree_meta;
dma_test = dma_map_single(dev->dev->dma_dev,
dma_test = dma_map_single(dev->sdev->dma_dev,
ring->txhdr_cache,
b43_txhdr_size(dev),
DMA_TO_DEVICE);
@ -898,7 +898,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
}
}
dma_unmap_single(dev->dev->dma_dev,
dma_unmap_single(dev->sdev->dma_dev,
dma_test, b43_txhdr_size(dev),
DMA_TO_DEVICE);
}
@ -1013,9 +1013,9 @@ static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask)
/* Try to set the DMA mask. If it fails, try falling back to a
* lower mask, as we can always also support a lower one. */
while (1) {
err = dma_set_mask(dev->dev->dma_dev, mask);
err = dma_set_mask(dev->sdev->dma_dev, mask);
if (!err) {
err = dma_set_coherent_mask(dev->dev->dma_dev, mask);
err = dma_set_coherent_mask(dev->sdev->dma_dev, mask);
if (!err)
break;
}
@ -1055,6 +1055,7 @@ int b43_dma_init(struct b43_wldev *dev)
err = b43_dma_set_mask(dev, dmamask);
if (err)
return err;
dma->translation = ssb_dma_translation(dev->sdev);
err = -ENOMEM;
/* setup TX DMA channels. */
@ -1084,7 +1085,7 @@ int b43_dma_init(struct b43_wldev *dev)
goto err_destroy_mcast;
/* No support for the TX status DMA ring. */
B43_WARN_ON(dev->dev->id.revision < 5);
B43_WARN_ON(dev->sdev->id.revision < 5);
b43dbg(dev->wl, "%u-bit DMA initialized\n",
(unsigned int)type);

View file

@ -138,7 +138,7 @@ static int b43_register_led(struct b43_wldev *dev, struct b43_led *led,
led->led_dev.default_trigger = default_trigger;
led->led_dev.brightness_set = b43_led_brightness_set;
err = led_classdev_register(dev->dev->dev, &led->led_dev);
err = led_classdev_register(dev->sdev->dev, &led->led_dev);
if (err) {
b43warn(dev->wl, "LEDs: Failed to register %s\n", name);
led->wl = NULL;
@ -215,7 +215,7 @@ static void b43_led_get_sprominfo(struct b43_wldev *dev,
enum b43_led_behaviour *behaviour,
bool *activelow)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
u8 sprom[4];
sprom[0] = bus->sprom.gpio0;

View file

@ -98,7 +98,7 @@ static u16 lo_measure_feedthrough(struct b43_wldev *dev,
rfover |= pga;
rfover |= lna;
rfover |= trsw_rx;
if ((dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA)
if ((dev->sdev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA)
&& phy->rev > 6)
rfover |= B43_PHY_RFOVERVAL_EXTLNA;
@ -387,7 +387,7 @@ struct lo_g_saved_values {
static void lo_measure_setup(struct b43_wldev *dev,
struct lo_g_saved_values *sav)
{
struct ssb_sprom *sprom = &dev->dev->bus->sprom;
struct ssb_sprom *sprom = &dev->sdev->bus->sprom;
struct b43_phy *phy = &dev->phy;
struct b43_phy_g *gphy = phy->g;
struct b43_txpower_lo_control *lo = gphy->lo_control;

View file

@ -548,7 +548,7 @@ void b43_tsf_read(struct b43_wldev *dev, u64 *tsf)
{
u32 low, high;
B43_WARN_ON(dev->dev->id.revision < 3);
B43_WARN_ON(dev->sdev->id.revision < 3);
/* The hardware guarantees us an atomic read, if we
* read the low register first. */
@ -586,7 +586,7 @@ static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf)
{
u32 low, high;
B43_WARN_ON(dev->dev->id.revision < 3);
B43_WARN_ON(dev->sdev->id.revision < 3);
low = tsf;
high = (tsf >> 32);
@ -714,7 +714,7 @@ void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on)
b43_ram_write(dev, i * 4, buffer[i]);
b43_write16(dev, 0x0568, 0x0000);
if (dev->dev->id.revision < 11)
if (dev->sdev->id.revision < 11)
b43_write16(dev, 0x07C0, 0x0000);
else
b43_write16(dev, 0x07C0, 0x0100);
@ -1132,7 +1132,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
b43_write32(dev, B43_MMIO_MACCTL, macctl);
/* Commit write */
b43_read32(dev, B43_MMIO_MACCTL);
if (awake && dev->dev->id.revision >= 5) {
if (awake && dev->sdev->id.revision >= 5) {
/* Wait for the microcode to wake up. */
for (i = 0; i < 100; i++) {
ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
@ -1144,29 +1144,35 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
}
}
void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, u32 flags)
{
u32 tmslow;
u32 macctl;
flags |= B43_TMSLOW_PHYCLKEN;
flags |= B43_TMSLOW_PHYRESET;
if (dev->phy.type == B43_PHYTYPE_N)
flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */
ssb_device_enable(dev->dev, flags);
ssb_device_enable(dev->sdev, flags);
msleep(2); /* Wait for the PLL to turn on. */
/* Now take the PHY out of Reset again */
tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
tmslow |= SSB_TMSLOW_FGC;
tmslow &= ~B43_TMSLOW_PHYRESET;
ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */
msleep(1);
tmslow &= ~SSB_TMSLOW_FGC;
ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */
msleep(1);
}
void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
{
u32 macctl;
b43_ssb_wireless_core_reset(dev, flags);
/* Turn Analog ON, but only if we already know the PHY-type.
* This protects against very early setup where we don't know the
@ -1215,7 +1221,7 @@ static void drain_txstatus_queue(struct b43_wldev *dev)
{
u32 dummy;
if (dev->dev->id.revision < 5)
if (dev->sdev->id.revision < 5)
return;
/* Read all entries from the microcode TXstatus FIFO
* and throw them away.
@ -1421,9 +1427,9 @@ u8 b43_ieee80211_antenna_sanitize(struct b43_wldev *dev,
/* Get the mask of available antennas. */
if (dev->phy.gmode)
antenna_mask = dev->dev->bus->sprom.ant_available_bg;
antenna_mask = dev->sdev->bus->sprom.ant_available_bg;
else
antenna_mask = dev->dev->bus->sprom.ant_available_a;
antenna_mask = dev->sdev->bus->sprom.ant_available_a;
if (!(antenna_mask & (1 << (antenna_nr - 1)))) {
/* This antenna is not available. Fall back to default. */
@ -1638,7 +1644,7 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
mutex_lock(&wl->mutex);
dev = wl->current_dev;
if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
/* wl->mutex is enough. */
b43_do_beacon_update_trigger_work(dev);
mmiowb();
@ -1683,7 +1689,7 @@ static void b43_update_templates(struct b43_wl *wl)
static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
{
b43_time_lock(dev);
if (dev->dev->id.revision >= 3) {
if (dev->sdev->id.revision >= 3) {
b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
} else {
@ -2057,7 +2063,7 @@ int b43_do_request_fw(struct b43_request_fw_context *ctx,
B43_WARN_ON(1);
return -ENOSYS;
}
err = request_firmware(&blob, ctx->fwname, ctx->dev->dev->dev);
err = request_firmware(&blob, ctx->fwname, ctx->dev->sdev->dev);
if (err == -ENOENT) {
snprintf(ctx->errors[ctx->req_type],
sizeof(ctx->errors[ctx->req_type]),
@ -2107,13 +2113,12 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
{
struct b43_wldev *dev = ctx->dev;
struct b43_firmware *fw = &ctx->dev->fw;
const u8 rev = ctx->dev->dev->id.revision;
const u8 rev = ctx->dev->sdev->id.revision;
const char *filename;
u32 tmshigh;
int err;
/* Get microcode */
tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
if ((rev >= 5) && (rev <= 10))
filename = "ucode5";
else if ((rev >= 11) && (rev <= 12))
@ -2152,6 +2157,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
switch (dev->phy.type) {
case B43_PHYTYPE_A:
if ((rev >= 5) && (rev <= 10)) {
tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
filename = "a0g1initvals5";
else
@ -2196,6 +2202,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
switch (dev->phy.type) {
case B43_PHYTYPE_A:
if ((rev >= 5) && (rev <= 10)) {
tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
filename = "a0g1bsinitvals5";
else
@ -2441,7 +2448,7 @@ static int b43_upload_microcode(struct b43_wldev *dev)
snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
dev->fw.rev, dev->fw.patch);
wiphy->hw_version = dev->dev->id.coreid;
wiphy->hw_version = dev->sdev->id.coreid;
if (b43_is_old_txhdr_format(dev)) {
/* We're over the deadline, but we keep support for old fw
@ -2557,10 +2564,20 @@ static int b43_upload_initvals(struct b43_wldev *dev)
/* Initialize the GPIOs
* http://bcm-specs.sipsolutions.net/GPIO
*/
static struct ssb_device *b43_ssb_gpio_dev(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->sdev->bus;
#ifdef CONFIG_SSB_DRIVER_PCICORE
return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
#else
return bus->chipco.dev;
#endif
}
static int b43_gpio_init(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_device *gpiodev, *pcidev = NULL;
struct ssb_device *gpiodev;
u32 mask, set;
b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
@ -2571,7 +2588,7 @@ static int b43_gpio_init(struct b43_wldev *dev)
mask = 0x0000001F;
set = 0x0000000F;
if (dev->dev->bus->chip_id == 0x4301) {
if (dev->sdev->bus->chip_id == 0x4301) {
mask |= 0x0060;
set |= 0x0060;
}
@ -2582,25 +2599,21 @@ static int b43_gpio_init(struct b43_wldev *dev)
mask |= 0x0180;
set |= 0x0180;
}
if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
b43_write16(dev, B43_MMIO_GPIO_MASK,
b43_read16(dev, B43_MMIO_GPIO_MASK)
| 0x0200);
mask |= 0x0200;
set |= 0x0200;
}
if (dev->dev->id.revision >= 2)
if (dev->sdev->id.revision >= 2)
mask |= 0x0010; /* FIXME: This is redundant. */
#ifdef CONFIG_SSB_DRIVER_PCICORE
pcidev = bus->pcicore.dev;
#endif
gpiodev = bus->chipco.dev ? : pcidev;
if (!gpiodev)
return 0;
ssb_write32(gpiodev, B43_GPIO_CONTROL,
(ssb_read32(gpiodev, B43_GPIO_CONTROL)
& mask) | set);
gpiodev = b43_ssb_gpio_dev(dev);
if (gpiodev)
ssb_write32(gpiodev, B43_GPIO_CONTROL,
(ssb_read32(gpiodev, B43_GPIO_CONTROL)
& mask) | set);
return 0;
}
@ -2608,16 +2621,11 @@ static int b43_gpio_init(struct b43_wldev *dev)
/* Turn off all GPIO stuff. Call this on module unload, for example. */
static void b43_gpio_cleanup(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_device *gpiodev, *pcidev = NULL;
struct ssb_device *gpiodev;
#ifdef CONFIG_SSB_DRIVER_PCICORE
pcidev = bus->pcicore.dev;
#endif
gpiodev = bus->chipco.dev ? : pcidev;
if (!gpiodev)
return;
ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
gpiodev = b43_ssb_gpio_dev(dev);
if (gpiodev)
ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
}
/* http://bcm-specs.sipsolutions.net/EnableMac */
@ -2689,12 +2697,12 @@ void b43_mac_suspend(struct b43_wldev *dev)
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
{
u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
u32 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
if (on)
tmslow |= B43_TMSLOW_MACPHYCLKEN;
else
tmslow &= ~B43_TMSLOW_MACPHYCLKEN;
ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
}
static void b43_adjust_opmode(struct b43_wldev *dev)
@ -2733,15 +2741,15 @@ static void b43_adjust_opmode(struct b43_wldev *dev)
/* Workaround: On old hardware the HW-MAC-address-filter
* doesn't work properly, so always run promisc in filter
* it in software. */
if (dev->dev->id.revision <= 4)
if (dev->sdev->id.revision <= 4)
ctl |= B43_MACCTL_PROMISC;
b43_write32(dev, B43_MMIO_MACCTL, ctl);
cfp_pretbtt = 2;
if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) {
if (dev->dev->bus->chip_id == 0x4306 &&
dev->dev->bus->chip_rev == 3)
if (dev->sdev->bus->chip_id == 0x4306 &&
dev->sdev->bus->chip_rev == 3)
cfp_pretbtt = 100;
else
cfp_pretbtt = 50;
@ -2899,7 +2907,7 @@ static int b43_chip_init(struct b43_wldev *dev)
b43_write16(dev, 0x005E, value16);
}
b43_write32(dev, 0x0100, 0x01000000);
if (dev->dev->id.revision < 5)
if (dev->sdev->id.revision < 5)
b43_write32(dev, 0x010C, 0x01000000);
b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
@ -2914,7 +2922,7 @@ static int b43_chip_init(struct b43_wldev *dev)
/* Initially set the wireless operation mode. */
b43_adjust_opmode(dev);
if (dev->dev->id.revision < 3) {
if (dev->sdev->id.revision < 3) {
b43_write16(dev, 0x060E, 0x0000);
b43_write16(dev, 0x0610, 0x8000);
b43_write16(dev, 0x0604, 0x0000);
@ -2934,7 +2942,7 @@ static int b43_chip_init(struct b43_wldev *dev)
b43_mac_phy_clock_set(dev, true);
b43_write16(dev, B43_MMIO_POWERUP_DELAY,
dev->dev->bus->chipco.fast_pwrup_delay);
dev->sdev->bus->chipco.fast_pwrup_delay);
err = 0;
b43dbg(dev->wl, "Chip initialized\n");
@ -3097,7 +3105,7 @@ static int b43_validate_chipaccess(struct b43_wldev *dev)
b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0);
b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4);
if ((dev->dev->id.revision >= 3) && (dev->dev->id.revision <= 10)) {
if ((dev->sdev->id.revision >= 3) && (dev->sdev->id.revision <= 10)) {
/* The 32bit register shadows the two 16bit registers
* with update sideeffects. Validate this. */
b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
@ -3450,7 +3458,7 @@ static void b43_op_set_tsf(struct ieee80211_hw *hw, u64 tsf)
static void b43_put_phy_into_reset(struct b43_wldev *dev)
{
struct ssb_device *sdev = dev->dev;
struct ssb_device *sdev = dev->sdev;
u32 tmslow;
tmslow = ssb_read32(sdev, SSB_TMSLOW);
@ -3946,7 +3954,7 @@ static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev)
/* Disable interrupts on the device. */
b43_set_status(dev, B43_STAT_INITIALIZED);
if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
/* wl->mutex is locked. That is enough. */
b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */
@ -3959,11 +3967,11 @@ static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev)
/* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */
orig_dev = dev;
mutex_unlock(&wl->mutex);
if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
b43_sdio_free_irq(dev);
} else {
synchronize_irq(dev->dev->irq);
free_irq(dev->dev->irq, dev);
synchronize_irq(dev->sdev->irq);
free_irq(dev->sdev->irq, dev);
}
mutex_lock(&wl->mutex);
dev = wl->current_dev;
@ -3996,18 +4004,19 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED);
drain_txstatus_queue(dev);
if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler);
if (err) {
b43err(dev->wl, "Cannot request SDIO IRQ\n");
goto out;
}
} else {
err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler,
err = request_threaded_irq(dev->sdev->irq, b43_interrupt_handler,
b43_interrupt_thread_handler,
IRQF_SHARED, KBUILD_MODNAME, dev);
if (err) {
b43err(dev->wl, "Cannot request IRQ-%d\n", dev->dev->irq);
b43err(dev->wl, "Cannot request IRQ-%d\n",
dev->sdev->irq);
goto out;
}
}
@ -4087,10 +4096,10 @@ static int b43_phy_versioning(struct b43_wldev *dev)
analog_type, phy_type, phy_rev);
/* Get RADIO versioning */
if (dev->dev->bus->chip_id == 0x4317) {
if (dev->dev->bus->chip_rev == 0)
if (dev->sdev->bus->chip_id == 0x4317) {
if (dev->sdev->bus->chip_rev == 0)
tmp = 0x3205017F;
else if (dev->dev->bus->chip_rev == 1)
else if (dev->sdev->bus->chip_rev == 1)
tmp = 0x4205017F;
else
tmp = 0x5205017F;
@ -4195,7 +4204,7 @@ static void setup_struct_wldev_for_init(struct b43_wldev *dev)
static void b43_bluetooth_coext_enable(struct b43_wldev *dev)
{
struct ssb_sprom *sprom = &dev->dev->bus->sprom;
struct ssb_sprom *sprom = &dev->sdev->bus->sprom;
u64 hf;
if (!modparam_btcoex)
@ -4222,16 +4231,16 @@ static void b43_bluetooth_coext_disable(struct b43_wldev *dev)
static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
u32 tmp;
if ((bus->chip_id == 0x4311 && bus->chip_rev == 2) ||
(bus->chip_id == 0x4312)) {
tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
tmp = ssb_read32(dev->sdev, SSB_IMCFGLO);
tmp &= ~SSB_IMCFGLO_REQTO;
tmp &= ~SSB_IMCFGLO_SERTO;
tmp |= 0x3;
ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
ssb_write32(dev->sdev, SSB_IMCFGLO, tmp);
ssb_commit_settings(bus);
}
}
@ -4301,14 +4310,14 @@ static void b43_wireless_core_exit(struct b43_wldev *dev)
dev->wl->current_beacon = NULL;
}
ssb_device_disable(dev->dev, 0);
ssb_bus_may_powerdown(dev->dev->bus);
ssb_device_disable(dev->sdev, 0);
ssb_bus_may_powerdown(dev->sdev->bus);
}
/* Initialize a wireless core */
static int b43_wireless_core_init(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct ssb_sprom *sprom = &bus->sprom;
struct b43_phy *phy = &dev->phy;
int err;
@ -4320,7 +4329,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
err = ssb_bus_powerup(bus, 0);
if (err)
goto out;
if (!ssb_device_is_enabled(dev->dev)) {
if (!ssb_device_is_enabled(dev->sdev)) {
tmp = phy->gmode ? B43_TMSLOW_GMODE : 0;
b43_wireless_core_reset(dev, tmp);
}
@ -4330,7 +4339,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
phy->ops->prepare_structs(dev);
/* Enable IRQ routing to this device. */
ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->sdev);
b43_imcfglo_timeouts_workaround(dev);
b43_bluetooth_coext_disable(dev);
@ -4343,7 +4352,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
if (err)
goto err_busdown;
b43_shm_write16(dev, B43_SHM_SHARED,
B43_SHM_SH_WLCOREREV, dev->dev->id.revision);
B43_SHM_SH_WLCOREREV, dev->sdev->id.revision);
hf = b43_hf_read(dev);
if (phy->type == B43_PHYTYPE_G) {
hf |= B43_HF_SYMW;
@ -4390,8 +4399,8 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
/* Maximum Contention Window */
b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF);
if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
(dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) ||
if ((dev->sdev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
(dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) ||
dev->use_pio) {
dev->__using_pio_transfers = 1;
err = b43_pio_init(dev);
@ -4728,7 +4737,7 @@ static void b43_wireless_core_detach(struct b43_wldev *dev)
static int b43_wireless_core_attach(struct b43_wldev *dev)
{
struct b43_wl *wl = dev->wl;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
int err;
bool have_2ghz_phy = 0, have_5ghz_phy = 0;
@ -4747,10 +4756,10 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
goto out;
}
/* Get the PHY type. */
if (dev->dev->id.revision >= 5) {
if (dev->sdev->id.revision >= 5) {
u32 tmshigh;
tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY);
have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY);
} else
@ -4823,7 +4832,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
INIT_WORK(&dev->restart_work, b43_chip_reset);
dev->phy.ops->switch_analog(dev, 0);
ssb_device_disable(dev->dev, 0);
ssb_device_disable(dev->sdev, 0);
ssb_bus_may_powerdown(bus);
out:
@ -4864,7 +4873,7 @@ static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
goto out;
wldev->use_pio = b43_modparam_pio;
wldev->dev = dev;
wldev->sdev = dev;
wldev->wl = wl;
b43_set_status(wldev, B43_STAT_UNINIT);
wldev->bad_frames_preempt = modparam_bad_frames_preempt;
@ -4925,19 +4934,16 @@ static void b43_wireless_exit(struct ssb_device *dev, struct b43_wl *wl)
ieee80211_free_hw(hw);
}
static int b43_wireless_init(struct ssb_device *dev)
static struct b43_wl *b43_wireless_init(struct ssb_device *dev)
{
struct ssb_sprom *sprom = &dev->bus->sprom;
struct ieee80211_hw *hw;
struct b43_wl *wl;
int err = -ENOMEM;
b43_sprom_fixup(dev->bus);
hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
if (!hw) {
b43err(NULL, "Could not allocate ieee80211 device\n");
goto out;
return ERR_PTR(-ENOMEM);
}
wl = hw_to_b43_wl(hw);
@ -4971,12 +4977,9 @@ static int b43_wireless_init(struct ssb_device *dev)
INIT_WORK(&wl->tx_work, b43_tx_work);
skb_queue_head_init(&wl->tx_queue);
ssb_set_devtypedata(dev, wl);
b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n",
dev->bus->chip_id, dev->id.revision);
err = 0;
out:
return err;
return wl;
}
static int b43_ssb_probe(struct ssb_device *dev, const struct ssb_device_id *id)
@ -4989,11 +4992,14 @@ static int b43_ssb_probe(struct ssb_device *dev, const struct ssb_device_id *id)
if (!wl) {
/* Probing the first core. Must setup common struct b43_wl */
first = 1;
err = b43_wireless_init(dev);
if (err)
b43_sprom_fixup(dev->bus);
wl = b43_wireless_init(dev);
if (IS_ERR(wl)) {
err = PTR_ERR(wl);
goto out;
wl = ssb_get_devtypedata(dev);
B43_WARN_ON(!wl);
}
ssb_set_devtypedata(dev, wl);
B43_WARN_ON(ssb_get_devtypedata(dev) != wl);
}
err = b43_one_core_attach(dev, wl);
if (err)

View file

@ -265,7 +265,7 @@ static void hardware_pctl_init_aphy(struct b43_wldev *dev)
void b43_phy_inita(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy *phy = &dev->phy;
/* This lowlevel A-PHY init is also called from G-PHY init.
@ -311,7 +311,7 @@ void b43_phy_inita(struct b43_wldev *dev)
}
if ((phy->type == B43_PHYTYPE_G) &&
(dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)) {
(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)) {
b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF);
}
}
@ -323,17 +323,17 @@ static int b43_aphy_init_tssi2dbm_table(struct b43_wldev *dev)
struct b43_phy_a *aphy = phy->a;
s16 pab0, pab1, pab2;
pab0 = (s16) (dev->dev->bus->sprom.pa1b0);
pab1 = (s16) (dev->dev->bus->sprom.pa1b1);
pab2 = (s16) (dev->dev->bus->sprom.pa1b2);
pab0 = (s16) (dev->sdev->bus->sprom.pa1b0);
pab1 = (s16) (dev->sdev->bus->sprom.pa1b1);
pab2 = (s16) (dev->sdev->bus->sprom.pa1b2);
if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
pab0 != -1 && pab1 != -1 && pab2 != -1) {
/* The pabX values are set in SPROM. Use them. */
if ((s8) dev->dev->bus->sprom.itssi_a != 0 &&
(s8) dev->dev->bus->sprom.itssi_a != -1)
if ((s8) dev->sdev->bus->sprom.itssi_a != 0 &&
(s8) dev->sdev->bus->sprom.itssi_a != -1)
aphy->tgt_idle_tssi =
(s8) (dev->dev->bus->sprom.itssi_a);
(s8) (dev->sdev->bus->sprom.itssi_a);
else
aphy->tgt_idle_tssi = 62;
aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,

View file

@ -168,7 +168,7 @@ void b43_phy_lock(struct b43_wldev *dev)
B43_WARN_ON(dev->phy.phy_locked);
dev->phy.phy_locked = 1;
#endif
B43_WARN_ON(dev->dev->id.revision < 3);
B43_WARN_ON(dev->sdev->id.revision < 3);
if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
@ -180,7 +180,7 @@ void b43_phy_unlock(struct b43_wldev *dev)
B43_WARN_ON(!dev->phy.phy_locked);
dev->phy.phy_locked = 0;
#endif
B43_WARN_ON(dev->dev->id.revision < 3);
B43_WARN_ON(dev->sdev->id.revision < 3);
if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
b43_power_saving_ctl_bits(dev, 0);
@ -368,8 +368,8 @@ void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags)
/* The next check will be needed in two seconds, or later. */
phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2));
if ((dev->dev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
(dev->dev->bus->boardinfo.type == SSB_BOARD_BU4306))
if ((dev->sdev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
(dev->sdev->bus->boardinfo.type == SSB_BOARD_BU4306))
return; /* No software txpower adjustment needed */
result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI));

View file

@ -718,7 +718,7 @@ static void b43_calc_nrssi_threshold(struct b43_wldev *dev)
B43_WARN_ON(phy->type != B43_PHYTYPE_G);
if (!phy->gmode ||
!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
tmp16 = b43_nrssi_hw_read(dev, 0x20);
if (tmp16 >= 0x20)
tmp16 -= 0x40;
@ -1114,7 +1114,7 @@ static u16 radio2050_rfover_val(struct b43_wldev *dev,
{
struct b43_phy *phy = &dev->phy;
struct b43_phy_g *gphy = phy->g;
struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
if (!phy->gmode)
return 0;
@ -1491,7 +1491,7 @@ static u16 b43_radio_init2050(struct b43_wldev *dev)
static void b43_phy_initb5(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy *phy = &dev->phy;
struct b43_phy_g *gphy = phy->g;
u16 offset, value;
@ -1620,7 +1620,7 @@ static void b43_phy_initb6(struct b43_wldev *dev)
b43_radio_write16(dev, 0x5A, 0x88);
b43_radio_write16(dev, 0x5B, 0x6B);
b43_radio_write16(dev, 0x5C, 0x0F);
if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_ALTIQ) {
if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_ALTIQ) {
b43_radio_write16(dev, 0x5D, 0xFA);
b43_radio_write16(dev, 0x5E, 0xD8);
} else {
@ -1787,7 +1787,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
b43_phy_set(dev, B43_PHY_RFOVER, 0x0100);
b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF);
if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) {
if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) {
if (phy->rev >= 7) {
b43_phy_set(dev, B43_PHY_RFOVER, 0x0800);
b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000);
@ -1922,7 +1922,7 @@ static void b43_hardware_pctl_init_gphy(struct b43_wldev *dev)
/* Initialize B/G PHY power control */
static void b43_phy_init_pctl(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy *phy = &dev->phy;
struct b43_phy_g *gphy = phy->g;
struct b43_rfatt old_rfatt;
@ -2053,7 +2053,7 @@ static void b43_phy_initg(struct b43_wldev *dev)
if (phy->rev >= 6) {
b43_phy_maskset(dev, B43_PHY_CCK(0x36), 0x0FFF, (gphy->lo_control->tx_bias << 12));
}
if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8075);
else
b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x807F);
@ -2066,7 +2066,7 @@ static void b43_phy_initg(struct b43_wldev *dev)
b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);
}
if (!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
if (!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
/* The specs state to update the NRSSI LT with
* the value 0x7FFFFFFF here. I think that is some weird
* compiler optimization in the original driver.
@ -2088,8 +2088,8 @@ static void b43_phy_initg(struct b43_wldev *dev)
/* FIXME: The spec says in the following if, the 0 should be replaced
'if OFDM may not be used in the current locale'
but OFDM is legal everywhere */
if ((dev->dev->bus->chip_id == 0x4306
&& dev->dev->bus->chip_package == 2) || 0) {
if ((dev->sdev->bus->chip_id == 0x4306
&& dev->sdev->bus->chip_package == 2) || 0) {
b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF);
b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF);
}
@ -2105,7 +2105,7 @@ void b43_gphy_channel_switch(struct b43_wldev *dev,
b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));
if (channel == 14) {
if (dev->dev->bus->sprom.country_code ==
if (dev->sdev->bus->sprom.country_code ==
SSB_SPROM1CCODE_JAPAN)
b43_hf_write(dev,
b43_hf_read(dev) & ~B43_HF_ACPR);
@ -2136,7 +2136,7 @@ static void default_baseband_attenuation(struct b43_wldev *dev,
static void default_radio_attenuation(struct b43_wldev *dev,
struct b43_rfatt *rf)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy *phy = &dev->phy;
rf->with_padmix = 0;
@ -2384,11 +2384,11 @@ static int b43_gphy_init_tssi2dbm_table(struct b43_wldev *dev)
struct b43_phy_g *gphy = phy->g;
s16 pab0, pab1, pab2;
pab0 = (s16) (dev->dev->bus->sprom.pa0b0);
pab1 = (s16) (dev->dev->bus->sprom.pa0b1);
pab2 = (s16) (dev->dev->bus->sprom.pa0b2);
pab0 = (s16) (dev->sdev->bus->sprom.pa0b0);
pab1 = (s16) (dev->sdev->bus->sprom.pa0b1);
pab2 = (s16) (dev->sdev->bus->sprom.pa0b2);
B43_WARN_ON((dev->dev->bus->chip_id == 0x4301) &&
B43_WARN_ON((dev->sdev->bus->chip_id == 0x4301) &&
(phy->radio_ver != 0x2050)); /* Not supported anymore */
gphy->dyn_tssi_tbl = 0;
@ -2396,10 +2396,10 @@ static int b43_gphy_init_tssi2dbm_table(struct b43_wldev *dev)
if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
pab0 != -1 && pab1 != -1 && pab2 != -1) {
/* The pabX values are set in SPROM. Use them. */
if ((s8) dev->dev->bus->sprom.itssi_bg != 0 &&
(s8) dev->dev->bus->sprom.itssi_bg != -1) {
if ((s8) dev->sdev->bus->sprom.itssi_bg != 0 &&
(s8) dev->sdev->bus->sprom.itssi_bg != -1) {
gphy->tgt_idle_tssi =
(s8) (dev->dev->bus->sprom.itssi_bg);
(s8) (dev->sdev->bus->sprom.itssi_bg);
} else
gphy->tgt_idle_tssi = 62;
gphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,
@ -2840,7 +2840,7 @@ static void b43_gphy_op_adjust_txpower(struct b43_wldev *dev)
B43_TXCTL_TXMIX;
rfatt += 2;
bbatt += 2;
} else if (dev->dev->bus->sprom.
} else if (dev->sdev->bus->sprom.
boardflags_lo &
B43_BFL_PACTRL) {
bbatt += 4 * (rfatt - 2);
@ -2914,14 +2914,14 @@ static enum b43_txpwr_result b43_gphy_op_recalc_txpower(struct b43_wldev *dev,
estimated_pwr = b43_gphy_estimate_power_out(dev, average_tssi);
B43_WARN_ON(phy->type != B43_PHYTYPE_G);
max_pwr = dev->dev->bus->sprom.maxpwr_bg;
if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
max_pwr = dev->sdev->bus->sprom.maxpwr_bg;
if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
max_pwr -= 3; /* minus 0.75 */
if (unlikely(max_pwr >= INT_TO_Q52(30/*dBm*/))) {
b43warn(dev->wl,
"Invalid max-TX-power value in SPROM.\n");
max_pwr = INT_TO_Q52(20); /* fake it */
dev->dev->bus->sprom.maxpwr_bg = max_pwr;
dev->sdev->bus->sprom.maxpwr_bg = max_pwr;
}
/* Get desired power (in Q5.2) */
@ -3014,7 +3014,7 @@ static void b43_gphy_op_pwork_60sec(struct b43_wldev *dev)
{
struct b43_phy *phy = &dev->phy;
if (!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI))
if (!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI))
return;
b43_mac_suspend(dev);

View file

@ -86,7 +86,7 @@ static void b43_lpphy_op_free(struct b43_wldev *dev)
static void lpphy_read_band_sprom(struct b43_wldev *dev)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
u16 cckpo, maxpwr;
u32 ofdmpo;
int i;
@ -214,7 +214,7 @@ static void lpphy_table_init(struct b43_wldev *dev)
static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy_lp *lpphy = dev->phy.lp;
u16 tmp, tmp2;
@ -412,7 +412,7 @@ static void lpphy_restore_dig_flt_state(struct b43_wldev *dev)
static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy_lp *lpphy = dev->phy.lp;
b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
@ -519,7 +519,7 @@ struct b2062_freqdata {
static void lpphy_2062_init(struct b43_wldev *dev)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
u32 crystalfreq, tmp, ref;
unsigned int i;
const struct b2062_freqdata *fd = NULL;
@ -697,7 +697,7 @@ static void lpphy_radio_init(struct b43_wldev *dev)
lpphy_sync_stx(dev);
b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80);
b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0);
if (dev->dev->bus->chip_id == 0x4325) {
if (dev->sdev->bus->chip_id == 0x4325) {
// TODO SSB PMU recalibration
}
}
@ -1289,7 +1289,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
static void lpphy_rev2plus_rc_calib(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF;
int i;
@ -1840,7 +1840,7 @@ static void lpphy_papd_cal(struct b43_wldev *dev, struct lpphy_tx_gains gains,
static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct lpphy_tx_gains gains, oldgains;
int old_txpctl, old_afe_ovr, old_rf, old_bbmult;
@ -1870,7 +1870,7 @@ static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
bool rx, bool pa, struct lpphy_tx_gains *gains)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
const struct lpphy_rx_iq_comp *iqcomp = NULL;
struct lpphy_tx_gains nogains, oldgains;
u16 tmp;
@ -2408,7 +2408,7 @@ static const struct b206x_channel b2063_chantbl[] = {
static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF);
udelay(20);
@ -2432,7 +2432,7 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
unsigned int channel)
{
struct b43_phy_lp *lpphy = dev->phy.lp;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
const struct b206x_channel *chandata = NULL;
u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
@ -2522,7 +2522,7 @@ static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
static int lpphy_b2063_tune(struct b43_wldev *dev,
unsigned int channel)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
static const struct b206x_channel *chandata = NULL;
u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;

View file

@ -299,7 +299,7 @@ static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
{
struct b43_phy_n *nphy = dev->phy.n;
struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
u8 txpi[2], bbmult, i;
u16 tmp, radio_gain, dac_gain;
@ -423,8 +423,8 @@ static void b43_radio_init2055_pre(struct b43_wldev *dev)
static void b43_radio_init2055_post(struct b43_wldev *dev)
{
struct b43_phy_n *nphy = dev->phy.n;
struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
struct ssb_boardinfo *binfo = &(dev->sdev->bus->boardinfo);
int i;
u16 val;
bool workaround = false;
@ -609,12 +609,12 @@ static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
if (dev->phy.type != B43_PHYTYPE_N)
return;
tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
if (force)
tmslow |= SSB_TMSLOW_FGC;
else
tmslow &= ~SSB_TMSLOW_FGC;
ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
}
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
@ -959,7 +959,7 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
ssb_chipco_gpio_control(&dev->dev->bus->chipco, 0xFC00,
ssb_chipco_gpio_control(&dev->sdev->bus->chipco, 0xFC00,
0xFC00);
b43_write32(dev, B43_MMIO_MACCTL,
b43_read32(dev, B43_MMIO_MACCTL) &
@ -983,7 +983,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
{
u16 tmp;
if (dev->dev->id.revision == 16)
if (dev->sdev->id.revision == 16)
b43_mac_suspend(dev);
tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
@ -993,7 +993,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
tmp |= (val & mask);
b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
if (dev->dev->id.revision == 16)
if (dev->sdev->id.revision == 16)
b43_mac_enable(dev);
return tmp;
@ -1168,7 +1168,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
{
struct b43_phy_n *nphy = dev->phy.n;
struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
/* PHY rev 0, 1, 2 */
u8 i, j;
@ -1373,7 +1373,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
static void b43_nphy_workarounds(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy *phy = &dev->phy;
struct b43_phy_n *nphy = phy->n;
@ -3586,7 +3586,7 @@ static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
*/
int b43_phy_initn(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct b43_phy *phy = &dev->phy;
struct b43_phy_n *nphy = phy->n;
u8 tx_pwr_state;
@ -3601,7 +3601,7 @@ int b43_phy_initn(struct b43_wldev *dev)
if ((dev->phy.rev >= 3) &&
(bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
(b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
chipco_set32(&dev->sdev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
}
nphy->deaf_count = 0;
b43_nphy_tables_init(dev);

View file

@ -111,7 +111,7 @@ static u16 index_to_pioqueue_base(struct b43_wldev *dev,
B43_MMIO_PIO11_BASE5,
};
if (dev->dev->id.revision >= 11) {
if (dev->sdev->id.revision >= 11) {
B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
return bases_rev11[index];
}
@ -121,14 +121,14 @@ static u16 index_to_pioqueue_base(struct b43_wldev *dev,
static u16 pio_txqueue_offset(struct b43_wldev *dev)
{
if (dev->dev->id.revision >= 11)
if (dev->sdev->id.revision >= 11)
return 0x18;
return 0;
}
static u16 pio_rxqueue_offset(struct b43_wldev *dev)
{
if (dev->dev->id.revision >= 11)
if (dev->sdev->id.revision >= 11)
return 0x38;
return 8;
}
@ -144,7 +144,7 @@ static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
if (!q)
return NULL;
q->dev = dev;
q->rev = dev->dev->id.revision;
q->rev = dev->sdev->id.revision;
q->mmio_base = index_to_pioqueue_base(dev, index) +
pio_txqueue_offset(dev);
q->index = index;
@ -178,7 +178,7 @@ static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
if (!q)
return NULL;
q->dev = dev;
q->rev = dev->dev->id.revision;
q->rev = dev->sdev->id.revision;
q->mmio_base = index_to_pioqueue_base(dev, index) +
pio_rxqueue_offset(dev);
@ -339,7 +339,7 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
ssb_block_write(dev->dev, data, (data_len & ~1),
b43_block_write(dev, data, (data_len & ~1),
q->mmio_base + B43_PIO_TXDATA,
sizeof(u16));
if (data_len & 1) {
@ -351,7 +351,7 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
tail[0] = data[data_len - 1];
tail[1] = 0;
ssb_block_write(dev->dev, tail, 2,
b43_block_write(dev, tail, 2,
q->mmio_base + B43_PIO_TXDATA,
sizeof(u16));
}
@ -393,7 +393,7 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
ssb_block_write(dev->dev, data, (data_len & ~3),
b43_block_write(dev, data, (data_len & ~3),
q->mmio_base + B43_PIO8_TXDATA,
sizeof(u32));
if (data_len & 3) {
@ -421,7 +421,7 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
break;
}
b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
ssb_block_write(dev->dev, tail, 4,
b43_block_write(dev, tail, 4,
q->mmio_base + B43_PIO8_TXDATA,
sizeof(u32));
}
@ -657,11 +657,11 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
/* Get the preamble (RX header) */
if (q->rev >= 8) {
ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
b43_block_read(dev, rxhdr, sizeof(*rxhdr),
q->mmio_base + B43_PIO8_RXDATA,
sizeof(u32));
} else {
ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
b43_block_read(dev, rxhdr, sizeof(*rxhdr),
q->mmio_base + B43_PIO_RXDATA,
sizeof(u16));
}
@ -697,7 +697,7 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
skb_reserve(skb, 2);
skb_put(skb, len + padding);
if (q->rev >= 8) {
ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
b43_block_read(dev, skb->data + padding, (len & ~3),
q->mmio_base + B43_PIO8_RXDATA,
sizeof(u32));
if (len & 3) {
@ -705,7 +705,7 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
/* Read the last few bytes. */
ssb_block_read(dev->dev, tail, 4,
b43_block_read(dev, tail, 4,
q->mmio_base + B43_PIO8_RXDATA,
sizeof(u32));
switch (len & 3) {
@ -724,7 +724,7 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
}
}
} else {
ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
b43_block_read(dev, skb->data + padding, (len & ~1),
q->mmio_base + B43_PIO_RXDATA,
sizeof(u16));
if (len & 1) {
@ -732,7 +732,7 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
/* Read the last byte. */
ssb_block_read(dev->dev, tail, 2,
b43_block_read(dev, tail, 2,
q->mmio_base + B43_PIO_RXDATA,
sizeof(u16));
skb->data[len + padding - 1] = tail[0];

View file

@ -37,7 +37,7 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
{
struct b43_wl *wl = hw_to_b43_wl(hw);
struct b43_wldev *dev = wl->current_dev;
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
bool enabled;
bool brought_up = false;
@ -47,7 +47,7 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
mutex_unlock(&wl->mutex);
return;
}
ssb_device_enable(dev->dev, 0);
ssb_device_enable(dev->sdev, 0);
brought_up = true;
}
@ -63,7 +63,7 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
}
if (brought_up) {
ssb_device_disable(dev->dev, 0);
ssb_device_disable(dev->sdev, 0);
ssb_bus_may_powerdown(bus);
}

View file

@ -66,7 +66,7 @@ static void b43_sdio_interrupt_dispatcher(struct sdio_func *func)
int b43_sdio_request_irq(struct b43_wldev *dev,
void (*handler)(struct b43_wldev *dev))
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct sdio_func *func = bus->host_sdio;
struct b43_sdio *sdio = sdio_get_drvdata(func);
int err;
@ -82,7 +82,7 @@ int b43_sdio_request_irq(struct b43_wldev *dev,
void b43_sdio_free_irq(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
struct sdio_func *func = bus->host_sdio;
struct b43_sdio *sdio = sdio_get_drvdata(func);

View file

@ -140,7 +140,7 @@ static DEVICE_ATTR(interference, 0644,
int b43_sysfs_register(struct b43_wldev *wldev)
{
struct device *dev = wldev->dev->dev;
struct device *dev = wldev->sdev->dev;
B43_WARN_ON(b43_status(wldev) != B43_STAT_INITIALIZED);
@ -149,7 +149,7 @@ int b43_sysfs_register(struct b43_wldev *wldev)
void b43_sysfs_unregister(struct b43_wldev *wldev)
{
struct device *dev = wldev->dev->dev;
struct device *dev = wldev->sdev->dev;
device_remove_file(dev, &dev_attr_interference);
}

View file

@ -2304,7 +2304,7 @@ void lpphy_rev0_1_table_init(struct b43_wldev *dev)
void lpphy_rev2plus_table_init(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
int i;
B43_WARN_ON(dev->phy.rev < 2);
@ -2416,7 +2416,7 @@ void lpphy_write_gain_table_bulk(struct b43_wldev *dev, int offset, int count,
void lpphy_init_tx_gain_table(struct b43_wldev *dev)
{
struct ssb_bus *bus = dev->dev->bus;
struct ssb_bus *bus = dev->sdev->bus;
switch (dev->phy.rev) {
case 0:

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