[TG3]: Add GPIO3 for 5752
Add bit definitions for the new GPIO3 in 5752. GPIO3 must be driven as output when it is unused. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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2 changed files with 13 additions and 0 deletions
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@ -5353,6 +5353,11 @@ static int tg3_reset_hw(struct tg3 *tp)
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gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 |
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GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
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GRC_LCLCTRL_GPIO_OUTPUT3;
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tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
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/* GPIO1 must be driven high for eeprom write protect */
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@ -8077,6 +8082,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT))
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tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
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GRC_LCLCTRL_GPIO_OUTPUT1);
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/* Unused GPIO3 must be driven as output on 5752 because there
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* are no pull-up resistors on unused GPIO pins.
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*/
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else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
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/* Force the chip into D0. */
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err = tg3_set_power_state(tp, 0);
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@ -1311,6 +1311,9 @@
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#define GRC_LCLCTRL_CLEARINT 0x00000002
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#define GRC_LCLCTRL_SETINT 0x00000004
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#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008
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#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020
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#define GRC_LCLCTRL_GPIO_OE3 0x00000040
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#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080
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#define GRC_LCLCTRL_GPIO_INPUT0 0x00000100
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#define GRC_LCLCTRL_GPIO_INPUT1 0x00000200
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#define GRC_LCLCTRL_GPIO_INPUT2 0x00000400
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