ARM: ux500: regulators: Add mask for configuration
There is already before a register mask in the regulator driver to allow some bits of a register to be initialized. The register value is defined in the board configuration. This patch puts a mask in the board configuration to specify which bits should actually be altered. The purpose with this patch is to avoid future mistakes when updating the allowed bits in the regulator driver. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
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7ce4669c8f
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3c1b8438d4
3 changed files with 53 additions and 59 deletions
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@ -129,19 +129,19 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* VpllRequestCtrl = HP/LP depending on VxRequest
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* VextSupply1RequestCtrl = HP/LP depending on VxRequest
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xfc, 0x00),
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/*
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* VextSupply2RequestCtrl = HP/LP depending on VxRequest
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* VextSupply3RequestCtrl = HP/LP depending on VxRequest
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* Vaux1RequestCtrl = HP/LP depending on VxRequest
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* Vaux2RequestCtrl = HP/LP depending on VxRequest
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00),
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/*
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* Vaux3RequestCtrl = HP/LP depending on VxRequest
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* SwHPReq = Control through SWValid disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
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/*
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* Vsmps1SysClkReq1HPValid = enabled
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* Vsmps2SysClkReq1HPValid = enabled
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@ -152,44 +152,44 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* Vaux2SysClkReq1HPValid = disabled
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* Vaux3SysClkReq1HPValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x17),
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xff, 0x17),
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/*
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* VextSupply1SysClkReq1HPValid = disabled
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* VextSupply2SysClkReq1HPValid = disabled
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* VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
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/*
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* VanaHwHPReq1Valid = disabled
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* Vaux1HwHPreq1Valid = disabled
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* Vaux2HwHPReq1Valid = disabled
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* Vaux3HwHPReqValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00),
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/*
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* VextSupply1HwHPReq1Valid = disabled
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* VextSupply2HwHPReq1Valid = disabled
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* VextSupply3HwHPReq1Valid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00),
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/*
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* VanaHwHPReq2Valid = disabled
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* Vaux1HwHPReq2Valid = disabled
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* Vaux2HwHPReq2Valid = disabled
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* Vaux3HwHPReq2Valid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00),
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/*
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* VextSupply1HwHPReq2Valid = disabled
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* VextSupply2HwHPReq2Valid = disabled
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* VextSupply3HwHPReq2Valid = HWReq2 controlled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
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INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04),
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/*
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* VanaSwHPReqValid = disabled
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* Vaux1SwHPReqValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00),
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/*
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* Vaux2SwHPReqValid = disabled
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* Vaux3SwHPReqValid = disabled
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@ -197,7 +197,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* VextSupply2SwHPReqValid = disabled
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* VextSupply3SwHPReqValid = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00),
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/*
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* SysClkReq2Valid1 = SysClkReq2 controlled
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* SysClkReq3Valid1 = disabled
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@ -207,7 +207,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* SysClkReq7Valid1 = disabled
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* SysClkReq8Valid1 = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a),
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/*
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* SysClkReq2Valid2 = disabled
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* SysClkReq3Valid2 = disabled
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@ -217,7 +217,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* SysClkReq7Valid2 = disabled
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* SysClkReq8Valid2 = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
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INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20),
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/*
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* VTVoutEna = disabled
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* Vintcore12Ena = disabled
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@ -225,57 +225,57 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* Vintcore12LP = inactive (HP)
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* VTVoutLP = inactive (HP)
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
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INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10),
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/*
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* VaudioEna = disabled
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* VdmicEna = disabled
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* Vamic1Ena = disabled
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* Vamic2Ena = disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00),
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/*
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* Vamic1_dzout = high-Z when Vamic1 is disabled
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* Vamic2_dzout = high-Z when Vamic2 is disabled
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
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/*
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* VBBN = force OFF
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* VBBP = force OFF
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* NOTE! PRCMU register
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*/
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INIT_REGULATOR_REGISTER(AB8500_ARMREGU2, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_ARMREGU2, 0x0f, 0x00),
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/*
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* VBBNSel1 = VBBP = VBBPFB
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* VBBPSel1 = 0 V
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* NOTE! PRCMU register
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*/
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INIT_REGULATOR_REGISTER(AB8500_VBBSEL1, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_VBBSEL1, 0x0f, 0x00),
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/*
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* VBBNSel2 = VBBP = VBBPFB
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* VBBPSel2 = 0 V
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* NOTE! PRCMU register
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*/
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INIT_REGULATOR_REGISTER(AB8500_VBBSEL2, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_VBBSEL2, 0x0f, 0x00),
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/*
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* Vsmps1Regu = HW control
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* Vsmps1SelCtrl = Vsmps1 voltage defined by Vsmsp1Sel2
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*/
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INIT_REGULATOR_REGISTER(AB8500_VSMPS1REGU, 0x06),
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INIT_REGULATOR_REGISTER(AB8500_VSMPS1REGU, 0x0f, 0x06),
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/*
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* Vsmps2Regu = HW control
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* Vsmps2SelCtrl = Vsmps2 voltage defined by Vsmsp2Sel2
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*/
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INIT_REGULATOR_REGISTER(AB8500_VSMPS2REGU, 0x06),
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INIT_REGULATOR_REGISTER(AB8500_VSMPS2REGU, 0x0f, 0x06),
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/*
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* VPll = Hw controlled
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* VanaRegu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
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INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
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/*
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* VrefDDREna = disabled
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* VrefDDRSleepMode = inactive (no pulldown)
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*/
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INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00),
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/*
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* VextSupply1Regu = HW control
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* VextSupply2Regu = HW control
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@ -283,37 +283,37 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
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* ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
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*/
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INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
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INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x1a),
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/*
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* Vaux1Regu = force HP
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* Vaux2Regu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
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INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
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/*
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* Vrf1Regu = HW control
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* Vaux3Regu = force off
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*/
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INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x08),
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INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x0f, 0x08),
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/*
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* Vsmps1 = 1.15V
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*/
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INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
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INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x3f, 0x24),
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/*
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* Vaux1Sel = 2.5 V
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*/
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INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
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INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x08),
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/*
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* Vaux2Sel = 2.9 V
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*/
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INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
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INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d),
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/*
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* Vaux3Sel = 2.91 V
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*/
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INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
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INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07),
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/*
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* VextSupply12LP = disabled (no LP)
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00),
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/*
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* Vaux1Disch = short discharge time
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* Vaux2Disch = short discharge time
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@ -322,13 +322,13 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
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* VTVoutDisch = short discharge time
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* VaudioDisch = short discharge time
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00),
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/*
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* VanaDisch = short discharge time
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* VdmicPullDownEna = pulldown disabled when Vdmic is disabled
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* VdmicDisch = short discharge time
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*/
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
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INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00),
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};
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/* AB8500 regulators */
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@ -811,23 +811,20 @@ static struct ab8500_reg_init ab8500_reg_init[] = {
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REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
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};
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static int
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ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value)
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static int ab8500_regulator_init_registers(struct platform_device *pdev,
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int id, int mask, int value)
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{
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int err;
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if (value & ~ab8500_reg_init[id].mask) {
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dev_err(&pdev->dev,
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"Configuration error: value outside mask.\n");
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return -EINVAL;
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}
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BUG_ON(value & ~mask);
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BUG_ON(mask & ~ab8500_reg_init[id].mask);
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/* initialize register */
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err = abx500_mask_and_set_register_interruptible(
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&pdev->dev,
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ab8500_reg_init[id].bank,
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ab8500_reg_init[id].addr,
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ab8500_reg_init[id].mask,
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value);
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mask, value);
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if (err < 0) {
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dev_err(&pdev->dev,
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"Failed to initialize 0x%02x, 0x%02x.\n",
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@ -835,13 +832,11 @@ ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value)
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ab8500_reg_init[id].addr);
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return err;
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}
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dev_vdbg(&pdev->dev,
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"init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
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ab8500_reg_init[id].bank,
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ab8500_reg_init[id].addr,
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ab8500_reg_init[id].mask,
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value);
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" init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
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ab8500_reg_init[id].bank,
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ab8500_reg_init[id].addr,
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mask, value);
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return 0;
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}
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@ -960,19 +955,16 @@ static int ab8500_regulator_probe(struct platform_device *pdev)
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/* initialize registers */
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for (i = 0; i < pdata->num_regulator_reg_init; i++) {
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int id, value;
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int id, mask, value;
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id = pdata->regulator_reg_init[i].id;
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mask = pdata->regulator_reg_init[i].mask;
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value = pdata->regulator_reg_init[i].value;
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/* check for configuration errors */
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if (id >= AB8500_NUM_REGULATOR_REGISTERS) {
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dev_err(&pdev->dev,
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"Configuration error: id outside range.\n");
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return -EINVAL;
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}
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BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
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err = ab8500_regulator_init_registers(pdev, id, value);
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err = ab8500_regulator_init_registers(pdev, id, mask, value);
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if (err < 0)
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return err;
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}
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@ -48,13 +48,15 @@ enum ab9540_regulator_id {
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/* AB8500 and AB9540 register initialization */
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struct ab8500_regulator_reg_init {
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int id;
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u8 mask;
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u8 value;
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};
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#define INIT_REGULATOR_REGISTER(_id, _value) \
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{ \
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.id = _id, \
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.value = _value, \
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#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
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{ \
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.id = _id, \
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.mask = _mask, \
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.value = _value, \
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}
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/* AB8500 registers */
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