ARM: OMAP2xxx: hwmod data: start to fix the IVA1, IVA2 and DSP
N800 logs this message on boot: [ 0.182281] omap_hwmod: iva: cannot be enabled for reset (3) Fix by creating basic IVA1 and DSP hwmods for OMAP2420, and a basic IVA2 hwmod for OMAP2430. There is still more information to be added, but this should resolve the immediate issue. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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2 changed files with 53 additions and 4 deletions
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@ -43,10 +43,41 @@
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* IP blocks
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*/
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/* IVA2 (IVA2) */
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/* IVA1 (IVA1) */
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static struct omap_hwmod_class iva1_hwmod_class = {
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.name = "iva1",
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};
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static struct omap_hwmod_rst_info omap2420_iva_resets[] = {
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{ .name = "iva", .rst_shift = 8 },
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};
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static struct omap_hwmod omap2420_iva_hwmod = {
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.name = "iva",
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.class = &iva_hwmod_class,
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.class = &iva1_hwmod_class,
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.clkdm_name = "iva1_clkdm",
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.rst_lines = omap2420_iva_resets,
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.rst_lines_cnt = ARRAY_SIZE(omap2420_iva_resets),
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.main_clk = "iva1_ifck",
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};
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/* DSP */
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static struct omap_hwmod_class dsp_hwmod_class = {
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.name = "dsp",
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};
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static struct omap_hwmod_rst_info omap2420_dsp_resets[] = {
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{ .name = "logic", .rst_shift = 0 },
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{ .name = "mmu", .rst_shift = 1 },
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};
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static struct omap_hwmod omap2420_dsp_hwmod = {
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.name = "dsp",
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.class = &dsp_hwmod_class,
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.clkdm_name = "dsp_clkdm",
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.rst_lines = omap2420_dsp_resets,
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.rst_lines_cnt = ARRAY_SIZE(omap2420_dsp_resets),
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.main_clk = "dsp_fck",
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};
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/* I2C common */
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@ -234,7 +265,15 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
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static struct omap_hwmod_ocp_if omap2420_l3__iva = {
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.master = &omap2xxx_l3_main_hwmod,
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.slave = &omap2420_iva_hwmod,
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.clk = "iva1_ifck",
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.clk = "core_l3_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* DSP <- L3 interface */
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static struct omap_hwmod_ocp_if omap2420_l3__dsp = {
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.master = &omap2xxx_l3_main_hwmod,
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.slave = &omap2420_dsp_hwmod,
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.clk = "dsp_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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@ -402,6 +441,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
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&omap2420_l4_core__i2c1,
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&omap2420_l4_core__i2c2,
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&omap2420_l3__iva,
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&omap2420_l3__dsp,
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&omap2420_l4_wkup__timer1,
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&omap2xxx_l4_core__timer2,
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&omap2xxx_l4_core__timer3,
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@ -45,9 +45,18 @@
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*/
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/* IVA2 (IVA2) */
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static struct omap_hwmod_rst_info omap2430_iva_resets[] = {
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{ .name = "logic", .rst_shift = 0 },
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{ .name = "mmu", .rst_shift = 1 },
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};
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static struct omap_hwmod omap2430_iva_hwmod = {
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.name = "iva",
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.class = &iva_hwmod_class,
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.clkdm_name = "dsp_clkdm",
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.rst_lines = omap2430_iva_resets,
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.rst_lines_cnt = ARRAY_SIZE(omap2430_iva_resets),
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.main_clk = "dsp_fck",
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};
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/* I2C common */
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@ -599,7 +608,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
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static struct omap_hwmod_ocp_if omap2430_l3__iva = {
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.master = &omap2xxx_l3_main_hwmod,
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.slave = &omap2430_iva_hwmod,
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.clk = "dsp_fck",
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.clk = "core_l3_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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