Techwizz/kernel-fxtec-pro1x
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Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc

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* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
  ARM: mach-footbridge: add missing header file <video/vga.h>
  ARM: mach-orion5x: add missing header file <linux/vga.h>
  arm: fix compile failure in orion5x/dns323-setup.c
  at91: at91sam9261.c: fix typo in t2_clk alias for atmel_tcb.0
  ARM: S5P: fix bug in spdif_clk_get_rate
  ARM: EXYNOS4: Add restart hook for proper reboot
  ARM: EXYNOS4: Increase reset delay for USB HOST PHY
  ARM: S5P: add required chained_irq_enter/exit to gpio-int code
  ARM: EXYNOS4: add required chained_irq_enter/exit to eint code
  ARM: SAMSUNG: Add chained enrty/exit call to timer interrupt handler
  ARM: S3C64XX: Fix build break in PM debug
  ARM: S5PV210: Fix build warning
  ARM: EXYNOS4: Fix the IRQ definitions for MIPI CSIS device
  ARM: EXYNOS4: remove duplicated inclusion
  ARM: EXYNOS4: Fix wrong devname to support clkdev
  ARM: EXYNOS4: Use the correct regulator names on universal_c210
  ARM: SAMSUNG: Fix Section mismatch in samsung_bl_set()
  ARM: S5P64X0: Replace irq_gc_ack() with irq_gc_ack_set_bit()
This commit is contained in:
Linus Torvalds 2011-08-29 16:33:32 -07:00
commit 3ae627b5a6
18 changed files with 45 additions and 14 deletions
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2
arch/arm/mach-at91/at91sam9261.c
View file

@ -157,7 +157,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),

2
arch/arm/mach-exynos4/clock.c
View file

@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = {
.ctrlbit = (1 << 21),
}, {
.name = "ac97",
.id = -1,
.devname = "samsung-ac97",
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit = (1 << 27),
}, {

11
arch/arm/mach-exynos4/cpu.c
View file

@ -24,12 +24,13 @@
#include <plat/exynos4.h>
#include <plat/adc-core.h>
#include <plat/sdhci.h>
#include <plat/devs.h>
#include <plat/fb-core.h>
#include <plat/fimc-core.h>
#include <plat/iic-core.h>
#include <plat/reset.h>
#include <mach/regs-irq.h>
#include <mach/regs-pmu.h>
extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
unsigned int irq_start);
@ -128,6 +129,11 @@ static void exynos4_idle(void)
local_irq_enable();
}
static void exynos4_sw_reset(void)
{
__raw_writel(0x1, S5P_SWRESET);
}
/*
* exynos4_map_io
*
@ -241,5 +247,8 @@ int __init exynos4_init(void)
/* set idle function */
pm_idle = exynos4_idle;
/* set sw_reset function */
s5p_reset_hook = exynos4_sw_reset;
return sysdev_register(&exynos4_sysdev);
}

5
arch/arm/mach-exynos4/include/mach/irqs.h
View file

@ -80,9 +80,8 @@
#define IRQ_HSMMC3 IRQ_SPI(76)
#define IRQ_DWMCI IRQ_SPI(77)
#define IRQ_MIPICSI0 IRQ_SPI(78)
#define IRQ_MIPICSI1 IRQ_SPI(80)
#define IRQ_MIPI_CSIS0 IRQ_SPI(78)
#define IRQ_MIPI_CSIS1 IRQ_SPI(80)
#define IRQ_ONENAND_AUDI IRQ_SPI(82)
#define IRQ_ROTATOR IRQ_SPI(83)

2
arch/arm/mach-exynos4/include/mach/regs-pmu.h
View file

@ -29,6 +29,8 @@
#define S5P_USE_STANDBY_WFE1 (1 << 25)
#define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24))
#define S5P_SWRESET S5P_PMUREG(0x0400)
#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)

7
arch/arm/mach-exynos4/irq-eint.c
View file

@ -23,6 +23,8 @@
#include <mach/regs-gpio.h>
#include <asm/mach/irq.h>
static DEFINE_SPINLOCK(eint_lock);
static unsigned int eint0_15_data[16];
@ -184,8 +186,11 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
exynos4_irq_demux_eint(IRQ_EINT(16));
exynos4_irq_demux_eint(IRQ_EINT(24));
chained_irq_exit(chip, desc);
}
static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
@ -193,6 +198,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
u32 *irq_data = irq_get_handler_data(irq);
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
chip->irq_mask(&desc->irq_data);
if (chip->irq_ack)
@ -201,6 +207,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(*irq_data);
chip->irq_unmask(&desc->irq_data);
chained_irq_exit(chip, desc);
}
int __init exynos4_init_irq_eint(void)

4
arch/arm/mach-exynos4/mach-universal_c210.c
View file

@ -79,7 +79,7 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
};
static struct regulator_consumer_supply max8952_consumer =
REGULATOR_SUPPLY("vddarm", NULL);
REGULATOR_SUPPLY("vdd_arm", NULL);
static struct max8952_platform_data universal_max8952_pdata __initdata = {
.gpio_vid0 = EXYNOS4_GPX0(3),
@ -105,7 +105,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
};
static struct regulator_consumer_supply lp3974_buck1_consumer =
REGULATOR_SUPPLY("vddint", NULL);
REGULATOR_SUPPLY("vdd_int", NULL);
static struct regulator_consumer_supply lp3974_buck2_consumer =
REGULATOR_SUPPLY("vddg3d", NULL);

2
arch/arm/mach-exynos4/setup-usb-phy.c
View file

@ -82,7 +82,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
writel(rstcon, EXYNOS4_RSTCON);
udelay(50);
udelay(80);
clk_disable(otg_clk);
clk_put(otg_clk);

1
arch/arm/mach-footbridge/dc21285.c
View file

@ -18,6 +18,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <video/vga.h>
#include <asm/irq.h>
#include <asm/system.h>

2
arch/arm/mach-orion5x/dns323-setup.c
View file

@ -77,7 +77,7 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
/*
* Check for devices with hard-wired IRQs.
*/
irq = orion5x_pci_map_irq(const dev, slot, pin);
irq = orion5x_pci_map_irq(dev, slot, pin);
if (irq != -1)
return irq;

1
arch/arm/mach-orion5x/pci.c
View file

@ -14,6 +14,7 @@
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/mbus.h>
#include <video/vga.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <plat/pcie.h>

1
arch/arm/mach-s3c64xx/pm.c
View file

@ -16,6 +16,7 @@
#include <linux/suspend.h>
#include <linux/serial_core.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <mach/map.h>
#include <mach/irqs.h>

2
arch/arm/mach-s5p64x0/irq-eint.c
View file

@ -129,7 +129,7 @@ static int s5p64x0_alloc_gc(void)
}
ct = gc->chip_types;
ct->chip.irq_ack = irq_gc_ack;
ct->chip.irq_ack = irq_gc_ack_set_bit;
ct->chip.irq_mask = irq_gc_mask_set_bit;
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;

2
arch/arm/mach-s5pv210/pm.c
View file

@ -88,7 +88,7 @@ static struct sleep_save s5pv210_core_save[] = {
SAVE_ITEM(S3C2410_TCNTO(0)),
};
void s5pv210_cpu_suspend(unsigned long arg)
static int s5pv210_cpu_suspend(unsigned long arg)
{
unsigned long tmp;

2
arch/arm/plat-s5p/clock.c
View file

@ -192,7 +192,7 @@ unsigned long s5p_spdif_get_rate(struct clk *clk)
if (IS_ERR(pclk))
return -EINVAL;
rate = pclk->ops->get_rate(clk);
rate = pclk->ops->get_rate(pclk);
clk_put(pclk);
return rate;

6
arch/arm/plat-s5p/irq-gpioint.c
View file

@ -23,6 +23,8 @@
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
#include <asm/mach/irq.h>
#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u)
#define CON_OFFSET 0x700
@ -81,6 +83,9 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
int group, pend_offset, mask_offset;
unsigned int pend, mask;
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
for (group = 0; group < bank->nr_groups; group++) {
struct s3c_gpio_chip *chip = bank->chips[group];
if (!chip)
@ -102,6 +107,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
pend &= ~BIT(offset);
}
}
chained_irq_exit(chip, desc);
}
static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)

2
arch/arm/plat-samsung/include/plat/backlight.h
View file

@ -20,7 +20,7 @@ struct samsung_bl_gpio_info {
int func;
};
extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
struct platform_pwm_backlight_data *bl_data);
#endif /* __ASM_PLAT_BACKLIGHT_H */

5
arch/arm/plat-samsung/irq-vic-timer.c
View file

@ -22,9 +22,14 @@
#include <plat/irq-vic-timer.h>
#include <plat/regs-timer.h>
#include <asm/mach/irq.h>
static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
generic_handle_irq((int)desc->irq_data.handler_data);
chained_irq_exit(chip, desc);
}
/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */