clk: samsung: exynos4: Disable ARMCLK down feature on Exynos4210 SoC
Commit42773b28e7
("clk: samsung: exynos4: Enable ARMCLK down feature") enabled ARMCLK down feature on all Exynos4 SoCs. Unfortunately on Exynos4210 SoC ARMCLK down feature causes a lockup when ondemand cpufreq governor is used. Fix it by limiting ARMCLK down feature to Exynos4x12 SoCs. This patch was tested on: - Exynos4210 SoC based Trats board - Exynos4210 SoC based Origen board - Exynos4412 SoC based Trats2 board - Exynos4412 SoC based Odroid-U3 board Cc: Daniel Drake <drake@endlessm.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Kukjin Kim <kgene@kernel.org> Fixes:42773b28e7
("clk: samsung: exynos4: Enable ARMCLK down feature") Cc: <stable@vger.kernel.org> # v3.17+ Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
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1 changed files with 5 additions and 6 deletions
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@ -1354,7 +1354,7 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls] __initdata = {
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VPLL_LOCK, VPLL_CON0, NULL),
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};
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static void __init exynos4_core_down_clock(enum exynos4_soc soc)
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static void __init exynos4x12_core_down_clock(void)
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{
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unsigned int tmp;
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@ -1373,11 +1373,9 @@ static void __init exynos4_core_down_clock(enum exynos4_soc soc)
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__raw_writel(tmp, reg_base + PWR_CTRL1);
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/*
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* Disable the clock up feature on Exynos4x12, in case it was
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* enabled by bootloader.
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* Disable the clock up feature in case it was enabled by bootloader.
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*/
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if (exynos4_soc == EXYNOS4X12)
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__raw_writel(0x0, reg_base + E4X12_PWR_CTRL2);
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__raw_writel(0x0, reg_base + E4X12_PWR_CTRL2);
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}
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/* register exynos4 clocks */
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@ -1474,7 +1472,8 @@ static void __init exynos4_clk_init(struct device_node *np,
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samsung_clk_register_alias(ctx, exynos4_aliases,
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ARRAY_SIZE(exynos4_aliases));
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exynos4_core_down_clock(soc);
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if (soc == EXYNOS4X12)
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exynos4x12_core_down_clock();
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exynos4_clk_sleep_init();
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samsung_clk_of_add_provider(np, ctx);
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