drm/i915: don't change VDD AUX status in panel power functions
Mode set sequence outlines when the AUX VDD bit should be set and cleared, and it's separate from the panel power sequence. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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1 changed files with 2 additions and 2 deletions
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@ -783,7 +783,7 @@ static bool ironlake_edp_panel_on (struct drm_device *dev)
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DRM_ERROR("panel on wait timed out: 0x%08x\n",
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DRM_ERROR("panel on wait timed out: 0x%08x\n",
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I915_READ(PCH_PP_STATUS));
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I915_READ(PCH_PP_STATUS));
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pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
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pp &= ~(PANEL_UNLOCK_REGS);
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pp |= PANEL_POWER_RESET; /* restore panel reset bit */
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pp |= PANEL_POWER_RESET; /* restore panel reset bit */
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I915_WRITE(PCH_PP_CONTROL, pp);
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I915_WRITE(PCH_PP_CONTROL, pp);
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POSTING_READ(PCH_PP_CONTROL);
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POSTING_READ(PCH_PP_CONTROL);
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@ -811,7 +811,7 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
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I915_READ(PCH_PP_STATUS));
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I915_READ(PCH_PP_STATUS));
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/* Make sure VDD is enabled so DP AUX will work */
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/* Make sure VDD is enabled so DP AUX will work */
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pp |= EDP_FORCE_VDD | PANEL_POWER_RESET; /* restore panel reset bit */
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pp |= PANEL_POWER_RESET; /* restore panel reset bit */
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I915_WRITE(PCH_PP_CONTROL, pp);
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I915_WRITE(PCH_PP_CONTROL, pp);
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POSTING_READ(PCH_PP_CONTROL);
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POSTING_READ(PCH_PP_CONTROL);
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}
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}
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