ASoC: arizona: Support higher clock rates
Some devices support higher clock rates, allow users to select these. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -380,6 +380,18 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
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case 49152000:
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val |= 3 << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 67737600:
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case 73728000:
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val |= 4 << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 90316800:
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case 98304000:
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val |= 5 << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 135475200:
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case 147456000:
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val |= 6 << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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default:
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return -EINVAL;
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}
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