Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/kvm: Fix build failure with HV KVM and CBE powerpc/ps3: Fix lv1_gpu_attribute hcall powerpc/ps3: Fix PS3 repository build warnings powerpc/ps3: irq: Remove IRQF_DISABLED powerpc/irq: Remove IRQF_DISABLED powerpc/numa: NUMA topology support for PowerNV powerpc: Add System RAM to /proc/iomem powerpc: Add KVM as module to defconfigs powerpc/kvm: Fix build with older toolchains powerpc, tqm5200: update tqm5200_defconfig to fit for charon board. powerpc/5200: add support for charon board
This commit is contained in:
commit
3455229fd6
28 changed files with 346 additions and 65 deletions
236
arch/powerpc/boot/dts/charon.dts
Normal file
236
arch/powerpc/boot/dts/charon.dts
Normal file
|
@ -0,0 +1,236 @@
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|||
/*
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* charon board Device Tree Source
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*
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* Copyright (C) 2007 Semihalf
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* Marian Balakowicz <m8@semihalf.com>
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*
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* Copyright (C) 2010 DENX Software Engineering GmbH
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* Heiko Schocher <hs@denx.de>
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*
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||||
* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "anon,charon";
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compatible = "anon,charon";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&mpc5200_pic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,5200@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <0x4000>; // L1, 16K
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i-cache-size = <0x4000>; // L1, 16K
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x08000000>; // 128MB
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};
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soc5200@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc5200-immr";
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ranges = <0 0xf0000000 0x0000c000>;
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reg = <0xf0000000 0x00000100>;
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bus-frequency = <0>; // from bootloader
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system-frequency = <0>; // from bootloader
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cdm@200 {
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compatible = "fsl,mpc5200-cdm";
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reg = <0x200 0x38>;
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};
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mpc5200_pic: interrupt-controller@500 {
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// 5200 interrupts are encoded into two levels;
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interrupt-controller;
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#interrupt-cells = <3>;
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compatible = "fsl,mpc5200-pic";
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reg = <0x500 0x80>;
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};
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timer@600 { // General Purpose Timer
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compatible = "fsl,mpc5200-gpt";
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reg = <0x600 0x10>;
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interrupts = <1 9 0>;
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fsl,has-wdt;
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};
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can@900 {
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compatible = "fsl,mpc5200-mscan";
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interrupts = <2 17 0>;
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reg = <0x900 0x80>;
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};
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can@980 {
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compatible = "fsl,mpc5200-mscan";
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interrupts = <2 18 0>;
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reg = <0x980 0x80>;
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};
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gpio_simple: gpio@b00 {
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compatible = "fsl,mpc5200-gpio";
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reg = <0xb00 0x40>;
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interrupts = <1 7 0>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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usb@1000 {
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compatible = "fsl,mpc5200-ohci","ohci-be";
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reg = <0x1000 0xff>;
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interrupts = <2 6 0>;
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};
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dma-controller@1200 {
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device_type = "dma-controller";
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compatible = "fsl,mpc5200-bestcomm";
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reg = <0x1200 0x80>;
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interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
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3 4 0 3 5 0 3 6 0 3 7 0
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3 8 0 3 9 0 3 10 0 3 11 0
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3 12 0 3 13 0 3 14 0 3 15 0>;
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};
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xlb@1f00 {
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compatible = "fsl,mpc5200-xlb";
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reg = <0x1f00 0x100>;
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};
|
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|
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serial@2000 { // PSC1
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compatible = "fsl,mpc5200-psc-uart";
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reg = <0x2000 0x100>;
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interrupts = <2 1 0>;
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};
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serial@2400 { // PSC3
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compatible = "fsl,mpc5200-psc-uart";
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reg = <0x2400 0x100>;
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interrupts = <2 3 0>;
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};
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ethernet@3000 {
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compatible = "fsl,mpc5200-fec";
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reg = <0x3000 0x400>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <2 5 0>;
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fixed-link = <1 1 100 0 0>;
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};
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mdio@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200-mdio";
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reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
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interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
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};
|
||||
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ata@3a00 {
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compatible = "fsl,mpc5200-ata";
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reg = <0x3a00 0x100>;
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interrupts = <2 7 0>;
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};
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i2c@3d00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200-i2c","fsl-i2c";
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reg = <0x3d00 0x40>;
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interrupts = <2 15 0>;
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};
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i2c@3d40 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200-i2c","fsl-i2c";
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reg = <0x3d40 0x40>;
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interrupts = <2 16 0>;
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|
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dtt@28 {
|
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compatible = "national,lm80";
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reg = <0x28>;
|
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};
|
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|
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rtc@68 {
|
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compatible = "dallas,ds1374";
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reg = <0x68>;
|
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};
|
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};
|
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|
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sram@8000 {
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compatible = "fsl,mpc5200-sram";
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reg = <0x8000 0x4000>;
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};
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};
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localbus {
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compatible = "fsl,mpc5200-lpb","simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = < 0 0 0xfc000000 0x02000000
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1 0 0xe0000000 0x04000000 // CS1 range, SM501
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3 0 0xe8000000 0x00080000>;
|
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|
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flash@0,0 {
|
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compatible = "cfi-flash";
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reg = <0 0 0x02000000>;
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bank-width = <4>;
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device-width = <2>;
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#size-cells = <1>;
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#address-cells = <1>;
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};
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display@1,0 {
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compatible = "smi,sm501";
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reg = <1 0x00000000 0x00800000
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1 0x03e00000 0x00200000>;
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mode = "640x480-32@60";
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interrupts = <1 1 3>;
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little-endian;
|
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};
|
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mram0@3,0 {
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compatible = "mtd-ram";
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reg = <3 0x00000 0x80000>;
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bank-width = <1>;
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};
|
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};
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||||
pci@f0000d00 {
|
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#interrupt-cells = <1>;
|
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#size-cells = <2>;
|
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#address-cells = <3>;
|
||||
device_type = "pci";
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compatible = "fsl,mpc5200-pci";
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reg = <0xf0000d00 0x100>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
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0xc000 0 0 2 &mpc5200_pic 0 0 3
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0xc000 0 0 3 &mpc5200_pic 0 0 3
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0xc000 0 0 4 &mpc5200_pic 0 0 3>;
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clock-frequency = <0>; // From boot loader
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interrupts = <2 8 0 2 9 0 2 10 0>;
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bus-range = <0 0>;
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ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
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0x02000000 0 0x90000000 0x90000000 0 0x10000000
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0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
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};
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};
|
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@ -1,9 +1,10 @@
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|||
CONFIG_EXPERIMENTAL=y
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CONFIG_SYSVIPC=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_BLK_DEV_INITRD=y
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# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
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CONFIG_EXPERT=y
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CONFIG_EMBEDDED=y
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# CONFIG_SYSCTL_SYSCALL is not set
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# CONFIG_KALLSYMS is not set
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# CONFIG_EPOLL is not set
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|
@ -17,7 +18,6 @@ CONFIG_PPC_MPC5200_SIMPLE=y
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CONFIG_PPC_MPC5200_BUGFIX=y
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_BESTCOMM=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_PM=y
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# CONFIG_PCI is not set
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CONFIG_NET=y
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|
@ -38,17 +38,18 @@ CONFIG_MTD=y
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CONFIG_MTD_CONCAT=y
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CONFIG_MTD_PARTITIONS=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_OF_PARTS=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_CFI=y
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CONFIG_MTD_CFI_AMDSTD=y
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CONFIG_MTD_ROM=y
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CONFIG_MTD_PHYSMAP_OF=y
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CONFIG_MTD_PLATRAM=y
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CONFIG_PROC_DEVICETREE=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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CONFIG_BLK_DEV_RAM_SIZE=32768
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# CONFIG_MISC_DEVICES is not set
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CONFIG_BLK_DEV_SD=y
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CONFIG_CHR_DEV_SG=y
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CONFIG_ATA=y
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|
@ -56,13 +57,11 @@ CONFIG_PATA_MPC52xx=y
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CONFIG_PATA_PLATFORM=y
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CONFIG_NETDEVICES=y
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CONFIG_LXT_PHY=y
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CONFIG_FIXED_PHY=y
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CONFIG_NET_ETHERNET=y
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CONFIG_FEC_MPC52xx=y
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# CONFIG_NETDEV_1000 is not set
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# CONFIG_NETDEV_10000 is not set
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# CONFIG_INPUT is not set
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# CONFIG_SERIO is not set
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# CONFIG_VT is not set
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CONFIG_SERIAL_MPC52xx=y
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CONFIG_SERIAL_MPC52xx_CONSOLE=y
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CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
|
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|
@ -70,7 +69,13 @@ CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
|
|||
CONFIG_I2C=y
|
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_MPC=y
|
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CONFIG_SENSORS_LM80=y
|
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CONFIG_WATCHDOG=y
|
||||
CONFIG_MFD_SM501=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_FOREIGN_ENDIAN=y
|
||||
CONFIG_FB_SM501=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
# CONFIG_USB_DEVICE_CLASS is not set
|
||||
|
@ -80,10 +85,10 @@ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
|
|||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_DS1307=y
|
||||
CONFIG_RTC_DRV_DS1374=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
|
@ -102,7 +107,6 @@ CONFIG_DEBUG_KERNEL=y
|
|||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_PCBC=y
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
|
|
|
@ -485,3 +485,7 @@ CONFIG_CRYPTO_TWOFISH=m
|
|||
CONFIG_CRYPTO_LZO=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_VIRTUALIZATION=y
|
||||
CONFIG_KVM_BOOK3S_64=m
|
||||
CONFIG_KVM_BOOK3S_64_HV=y
|
||||
CONFIG_VHOST_NET=m
|
||||
|
|
|
@ -362,3 +362,7 @@ CONFIG_CRYPTO_TWOFISH=m
|
|||
CONFIG_CRYPTO_LZO=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_VIRTUALIZATION=y
|
||||
CONFIG_KVM_BOOK3S_64=m
|
||||
CONFIG_KVM_BOOK3S_64_HV=y
|
||||
CONFIG_VHOST_NET=m
|
||||
|
|
|
@ -108,10 +108,10 @@ static int fd_request_irq(void)
|
|||
{
|
||||
if (can_use_virtual_dma)
|
||||
return request_irq(FLOPPY_IRQ, floppy_hardint,
|
||||
IRQF_DISABLED, "floppy", NULL);
|
||||
0, "floppy", NULL);
|
||||
else
|
||||
return request_irq(FLOPPY_IRQ, floppy_interrupt,
|
||||
IRQF_DISABLED, "floppy", NULL);
|
||||
0, "floppy", NULL);
|
||||
}
|
||||
|
||||
static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
|
||||
|
|
|
@ -316,7 +316,7 @@ LV1_CALL(gpu_context_free, 1, 0, 218 )
|
|||
LV1_CALL(gpu_context_iomap, 5, 0, 221 )
|
||||
LV1_CALL(gpu_context_attribute, 6, 0, 225 )
|
||||
LV1_CALL(gpu_context_intr, 1, 1, 227 )
|
||||
LV1_CALL(gpu_attribute, 5, 0, 228 )
|
||||
LV1_CALL(gpu_attribute, 3, 0, 228 )
|
||||
LV1_CALL(get_rtc, 0, 2, 232 )
|
||||
LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 )
|
||||
LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 )
|
||||
|
|
|
@ -15,8 +15,8 @@
|
|||
#define DEFAULT_PRIORITY 5
|
||||
|
||||
/*
|
||||
* Mark IPIs as higher priority so we can take them inside interrupts that
|
||||
* arent marked IRQF_DISABLED
|
||||
* Mark IPIs as higher priority so we can take them inside interrupts
|
||||
* FIXME: still true now?
|
||||
*/
|
||||
#define IPI_PRIORITY 4
|
||||
|
||||
|
|
|
@ -267,7 +267,7 @@ vsx_unavailable_pSeries_1:
|
|||
|
||||
#ifdef CONFIG_CBE_RAS
|
||||
STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
|
||||
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
|
||||
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
|
||||
#endif /* CONFIG_CBE_RAS */
|
||||
|
||||
STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
|
||||
|
@ -275,7 +275,7 @@ vsx_unavailable_pSeries_1:
|
|||
|
||||
#ifdef CONFIG_CBE_RAS
|
||||
STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
|
||||
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
|
||||
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
|
||||
#endif /* CONFIG_CBE_RAS */
|
||||
|
||||
STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
|
||||
|
@ -283,7 +283,7 @@ vsx_unavailable_pSeries_1:
|
|||
|
||||
#ifdef CONFIG_CBE_RAS
|
||||
STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
|
||||
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
|
||||
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
|
||||
#endif /* CONFIG_CBE_RAS */
|
||||
|
||||
. = 0x3000
|
||||
|
|
|
@ -187,7 +187,7 @@ int smp_request_message_ipi(int virq, int msg)
|
|||
return 1;
|
||||
}
|
||||
#endif
|
||||
err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU,
|
||||
err = request_irq(virq, smp_ipi_action[msg], IRQF_PERCPU,
|
||||
smp_ipi_name[msg], 0);
|
||||
WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
|
||||
virq, smp_ipi_name[msg], err);
|
||||
|
|
|
@ -1263,7 +1263,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
|
|||
addi r6,r5,VCORE_NAPPING_THREADS
|
||||
31: lwarx r4,0,r6
|
||||
or r4,r4,r0
|
||||
popcntw r7,r4
|
||||
PPC_POPCNTW(r7,r4)
|
||||
cmpw r7,r8
|
||||
bge 2f
|
||||
stwcx. r4,0,r6
|
||||
|
|
|
@ -34,6 +34,7 @@
|
|||
#include <linux/suspend.h>
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/hugetlb.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/prom.h>
|
||||
|
@ -555,3 +556,32 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
|
|||
book3e_hugetlb_preload(vma->vm_mm, address, *ptep);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* System memory should not be in /proc/iomem but various tools expect it
|
||||
* (eg kdump).
|
||||
*/
|
||||
static int add_system_ram_resources(void)
|
||||
{
|
||||
struct memblock_region *reg;
|
||||
|
||||
for_each_memblock(memory, reg) {
|
||||
struct resource *res;
|
||||
unsigned long base = reg->base;
|
||||
unsigned long size = reg->size;
|
||||
|
||||
res = kzalloc(sizeof(struct resource), GFP_KERNEL);
|
||||
WARN_ON(!res);
|
||||
|
||||
if (res) {
|
||||
res->name = "System RAM";
|
||||
res->start = base;
|
||||
res->end = base + size - 1;
|
||||
res->flags = IORESOURCE_MEM;
|
||||
WARN_ON(request_resource(&iomem_resource, res) < 0);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
subsys_initcall(add_system_ram_resources);
|
||||
|
|
|
@ -315,7 +315,10 @@ static int __init find_min_common_depth(void)
|
|||
struct device_node *root;
|
||||
const char *vec5;
|
||||
|
||||
root = of_find_node_by_path("/rtas");
|
||||
if (firmware_has_feature(FW_FEATURE_OPAL))
|
||||
root = of_find_node_by_path("/ibm,opal");
|
||||
else
|
||||
root = of_find_node_by_path("/rtas");
|
||||
if (!root)
|
||||
root = of_find_node_by_path("/");
|
||||
|
||||
|
@ -344,12 +347,19 @@ static int __init find_min_common_depth(void)
|
|||
|
||||
#define VEC5_AFFINITY_BYTE 5
|
||||
#define VEC5_AFFINITY 0x80
|
||||
chosen = of_find_node_by_path("/chosen");
|
||||
if (chosen) {
|
||||
vec5 = of_get_property(chosen, "ibm,architecture-vec-5", NULL);
|
||||
if (vec5 && (vec5[VEC5_AFFINITY_BYTE] & VEC5_AFFINITY)) {
|
||||
dbg("Using form 1 affinity\n");
|
||||
form1_affinity = 1;
|
||||
|
||||
if (firmware_has_feature(FW_FEATURE_OPAL))
|
||||
form1_affinity = 1;
|
||||
else {
|
||||
chosen = of_find_node_by_path("/chosen");
|
||||
if (chosen) {
|
||||
vec5 = of_get_property(chosen,
|
||||
"ibm,architecture-vec-5", NULL);
|
||||
if (vec5 && (vec5[VEC5_AFFINITY_BYTE] &
|
||||
VEC5_AFFINITY)) {
|
||||
dbg("Using form 1 affinity\n");
|
||||
form1_affinity = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -50,6 +50,7 @@ static void __init mpc5200_simple_setup_arch(void)
|
|||
|
||||
/* list of the supported boards */
|
||||
static const char *board[] __initdata = {
|
||||
"anon,charon",
|
||||
"intercontrol,digsy-mtc",
|
||||
"manroland,mucmc52",
|
||||
"manroland,uc101",
|
||||
|
|
|
@ -230,7 +230,7 @@ static int __init beat_register_event(void)
|
|||
}
|
||||
ev->virq = virq;
|
||||
|
||||
rc = request_irq(virq, ev->handler, IRQF_DISABLED,
|
||||
rc = request_irq(virq, ev->handler, 0,
|
||||
ev->typecode, NULL);
|
||||
if (rc != 0) {
|
||||
printk(KERN_ERR "Beat: failed to request virtual IRQ"
|
||||
|
|
|
@ -514,7 +514,7 @@ static __init int celleb_setup_pciex(struct device_node *node,
|
|||
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
|
||||
oirq.size);
|
||||
if (request_irq(virq, pciex_handle_internal_irq,
|
||||
IRQF_DISABLED, "pciex", (void *)phb)) {
|
||||
0, "pciex", (void *)phb)) {
|
||||
pr_err("PCIEXC:Failed to request irq\n");
|
||||
goto error;
|
||||
}
|
||||
|
|
|
@ -412,8 +412,7 @@ static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
|
|||
IIC_IRQ_IOEX_ATI | (iommu->nid << IIC_IRQ_NODE_SHIFT));
|
||||
BUG_ON(virq == NO_IRQ);
|
||||
|
||||
ret = request_irq(virq, ioc_interrupt, IRQF_DISABLED,
|
||||
iommu->name, iommu);
|
||||
ret = request_irq(virq, ioc_interrupt, 0, iommu->name, iommu);
|
||||
BUG_ON(ret);
|
||||
|
||||
/* set the IOC segment table origin register (and turn on the iommu) */
|
||||
|
|
|
@ -392,7 +392,7 @@ static int __init cbe_init_pm_irq(void)
|
|||
}
|
||||
|
||||
rc = request_irq(irq, cbe_pm_irq,
|
||||
IRQF_DISABLED, "cbe-pmu-0", NULL);
|
||||
0, "cbe-pmu-0", NULL);
|
||||
if (rc) {
|
||||
printk("ERROR: Request for irq on node %d failed\n",
|
||||
node);
|
||||
|
|
|
@ -442,8 +442,7 @@ static int spu_request_irqs(struct spu *spu)
|
|||
snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
|
||||
spu->number);
|
||||
ret = request_irq(spu->irqs[0], spu_irq_class_0,
|
||||
IRQF_DISABLED,
|
||||
spu->irq_c0, spu);
|
||||
0, spu->irq_c0, spu);
|
||||
if (ret)
|
||||
goto bail0;
|
||||
}
|
||||
|
@ -451,8 +450,7 @@ static int spu_request_irqs(struct spu *spu)
|
|||
snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
|
||||
spu->number);
|
||||
ret = request_irq(spu->irqs[1], spu_irq_class_1,
|
||||
IRQF_DISABLED,
|
||||
spu->irq_c1, spu);
|
||||
0, spu->irq_c1, spu);
|
||||
if (ret)
|
||||
goto bail1;
|
||||
}
|
||||
|
@ -460,8 +458,7 @@ static int spu_request_irqs(struct spu *spu)
|
|||
snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
|
||||
spu->number);
|
||||
ret = request_irq(spu->irqs[2], spu_irq_class_2,
|
||||
IRQF_DISABLED,
|
||||
spu->irq_c2, spu);
|
||||
0, spu->irq_c2, spu);
|
||||
if (ret)
|
||||
goto bail2;
|
||||
}
|
||||
|
|
|
@ -272,7 +272,6 @@ static struct irqaction xmon_action = {
|
|||
|
||||
static struct irqaction gatwick_cascade_action = {
|
||||
.handler = gatwick_action,
|
||||
.flags = IRQF_DISABLED,
|
||||
.name = "cascade",
|
||||
};
|
||||
|
||||
|
|
|
@ -200,7 +200,7 @@ static int psurge_secondary_ipi_init(void)
|
|||
|
||||
if (psurge_secondary_virq)
|
||||
rc = request_irq(psurge_secondary_virq, psurge_ipi_intr,
|
||||
IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
|
||||
IRQF_PERCPU, "IPI", NULL);
|
||||
|
||||
if (rc)
|
||||
pr_err("Failed to setup secondary cpu IPI\n");
|
||||
|
@ -408,7 +408,7 @@ static int __init smp_psurge_kick_cpu(int nr)
|
|||
|
||||
static struct irqaction psurge_irqaction = {
|
||||
.handler = psurge_ipi_intr,
|
||||
.flags = IRQF_DISABLED|IRQF_PERCPU,
|
||||
.flags = IRQF_PERCPU,
|
||||
.name = "primary IPI",
|
||||
};
|
||||
|
||||
|
|
|
@ -825,7 +825,7 @@ static int ps3_probe_thread(void *data)
|
|||
|
||||
spin_lock_init(&dev.lock);
|
||||
|
||||
res = request_irq(irq, ps3_notification_interrupt, IRQF_DISABLED,
|
||||
res = request_irq(irq, ps3_notification_interrupt, 0,
|
||||
"ps3_notification", &dev);
|
||||
if (res) {
|
||||
pr_err("%s:%u: request_irq failed %d\n", __func__, __LINE__,
|
||||
|
|
|
@ -184,7 +184,7 @@ int ps3_repository_read_bus_type(unsigned int bus_index,
|
|||
enum ps3_bus_type *bus_type)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -199,7 +199,7 @@ int ps3_repository_read_bus_num_dev(unsigned int bus_index,
|
|||
unsigned int *num_dev)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -239,7 +239,7 @@ int ps3_repository_read_dev_type(unsigned int bus_index,
|
|||
unsigned int dev_index, enum ps3_dev_type *dev_type)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -256,8 +256,8 @@ int ps3_repository_read_dev_intr(unsigned int bus_index,
|
|||
enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v2;
|
||||
u64 v1 = 0;
|
||||
u64 v2 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -275,7 +275,7 @@ int ps3_repository_read_dev_reg_type(unsigned int bus_index,
|
|||
enum ps3_reg_type *reg_type)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -615,7 +615,7 @@ int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index,
|
|||
unsigned int dev_index, unsigned int *num_regions)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -631,7 +631,7 @@ int ps3_repository_read_stor_dev_region_id(unsigned int bus_index,
|
|||
unsigned int *region_id)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("bus", bus_index),
|
||||
|
@ -786,7 +786,7 @@ int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size, u64 *region_total)
|
|||
int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_CURRENT,
|
||||
make_first_field("bi", 0),
|
||||
|
@ -805,7 +805,7 @@ int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
|
|||
int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_CURRENT,
|
||||
make_first_field("bi", 0),
|
||||
|
@ -827,8 +827,8 @@ int ps3_repository_read_spu_resource_id(unsigned int res_index,
|
|||
enum ps3_spu_resource_type *resource_type, unsigned int *resource_id)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v2;
|
||||
u64 v1 = 0;
|
||||
u64 v2 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_CURRENT,
|
||||
make_first_field("bi", 0),
|
||||
|
@ -854,7 +854,7 @@ static int ps3_repository_read_boot_dat_address(u64 *address)
|
|||
int ps3_repository_read_boot_dat_size(unsigned int *size)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_CURRENT,
|
||||
make_first_field("bi", 0),
|
||||
|
@ -869,7 +869,7 @@ int ps3_repository_read_boot_dat_size(unsigned int *size)
|
|||
int ps3_repository_read_vuart_av_port(unsigned int *port)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_CURRENT,
|
||||
make_first_field("bi", 0),
|
||||
|
@ -884,7 +884,7 @@ int ps3_repository_read_vuart_av_port(unsigned int *port)
|
|||
int ps3_repository_read_vuart_sysmgr_port(unsigned int *port)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_CURRENT,
|
||||
make_first_field("bi", 0),
|
||||
|
@ -919,7 +919,7 @@ int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size)
|
|||
int ps3_repository_read_num_be(unsigned int *num_be)
|
||||
{
|
||||
int result;
|
||||
u64 v1;
|
||||
u64 v1 = 0;
|
||||
|
||||
result = read_node(PS3_LPAR_ID_PME,
|
||||
make_first_field("ben", 0),
|
||||
|
|
|
@ -800,8 +800,6 @@ static void mpic_end_ipi(struct irq_data *d)
|
|||
* IPIs are marked IRQ_PER_CPU. This has the side effect of
|
||||
* preventing the IRQ_PENDING/IRQ_INPROGRESS logic from
|
||||
* applying to them. We EOI them late to avoid re-entering.
|
||||
* We mark IPI's with IRQF_DISABLED as they must run with
|
||||
* irqs disabled.
|
||||
*/
|
||||
mpic_eoi(mpic);
|
||||
}
|
||||
|
|
|
@ -115,7 +115,7 @@ static int __init ppc4xx_l2c_probe(void)
|
|||
}
|
||||
|
||||
/* Install error handler */
|
||||
if (request_irq(irq, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0) {
|
||||
if (request_irq(irq, l2c_error_handler, 0, "L2C", 0) < 0) {
|
||||
printk(KERN_ERR "Cannot install L2C error handler"
|
||||
", cache is not enabled\n");
|
||||
of_node_put(np);
|
||||
|
|
|
@ -134,11 +134,10 @@ static void xics_request_ipi(void)
|
|||
BUG_ON(ipi == NO_IRQ);
|
||||
|
||||
/*
|
||||
* IPIs are marked IRQF_DISABLED as they must run with irqs
|
||||
* disabled, and PERCPU. The handler was set in map.
|
||||
* IPIs are marked IRQF_PERCPU. The handler was set in map.
|
||||
*/
|
||||
BUG_ON(request_irq(ipi, icp_ops->ipi_action,
|
||||
IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL));
|
||||
IRQF_PERCPU, "IPI", NULL));
|
||||
}
|
||||
|
||||
int __init xics_smp_probe(void)
|
||||
|
|
|
@ -952,7 +952,7 @@ static int ps3_vuart_bus_interrupt_get(void)
|
|||
}
|
||||
|
||||
result = request_irq(vuart_bus_priv.virq, ps3_vuart_irq_handler,
|
||||
IRQF_DISABLED, "vuart", &vuart_bus_priv);
|
||||
0, "vuart", &vuart_bus_priv);
|
||||
|
||||
if (result) {
|
||||
pr_debug("%s:%d: request_irq failed (%d)\n",
|
||||
|
|
|
@ -167,7 +167,7 @@ int ps3stor_setup(struct ps3_storage_device *dev, irq_handler_t handler)
|
|||
goto fail_close_device;
|
||||
}
|
||||
|
||||
error = request_irq(dev->irq, handler, IRQF_DISABLED,
|
||||
error = request_irq(dev->irq, handler, 0,
|
||||
dev->sbd.core.driver->name, dev);
|
||||
if (error) {
|
||||
dev_err(&dev->sbd.core, "%s:%u: request_irq failed %d\n",
|
||||
|
|
|
@ -876,7 +876,7 @@ static void __devinit snd_ps3_audio_set_base_addr(uint64_t ioaddr_start)
|
|||
(0x0fUL << 12) |
|
||||
(PS3_AUDIO_IOID);
|
||||
|
||||
ret = lv1_gpu_attribute(0x100, 0x007, val, 0, 0);
|
||||
ret = lv1_gpu_attribute(0x100, 0x007, val);
|
||||
if (ret)
|
||||
pr_info("%s: gpu_attribute failed %d\n", __func__,
|
||||
ret);
|
||||
|
|
Loading…
Reference in a new issue