From 343d3537917bd74648fa2a360b42f64ad5ec551d Mon Sep 17 00:00:00 2001 From: Kevin Wells Date: Fri, 26 Feb 2010 15:53:39 -0800 Subject: [PATCH] ARM: LPC32XX: Debug and IRQ macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Debug (printascii) and IRQ handler macros for the LPC32XX arch Signed-off-by: Kevin Wells Signed-off-by: Uwe Kleine-König --- .../mach-lpc32xx/include/mach/debug-macro.S | 31 ++++++++++++ .../mach-lpc32xx/include/mach/entry-macro.S | 47 +++++++++++++++++++ 2 files changed, 78 insertions(+) create mode 100644 arch/arm/mach-lpc32xx/include/mach/debug-macro.S create mode 100644 arch/arm/mach-lpc32xx/include/mach/entry-macro.S diff --git a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S new file mode 100644 index 000000000000..621744d6b152 --- /dev/null +++ b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S @@ -0,0 +1,31 @@ +/* + * arch/arm/mach-lpc32xx/include/mach/debug-macro.S + * + * Author: Kevin Wells + * + * Copyright (C) 2010 NXP Semiconductors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * Debug output is hardcoded to standard UART 5 +*/ + + .macro addruart,rx, tmp + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =0x40090000 + ldrne \rx, =0xF4090000 + .endm + +#define UART_SHIFT 2 +#include diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S new file mode 100644 index 000000000000..870227c96602 --- /dev/null +++ b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-lpc32xx/include/mach/entry-macro.S + * + * Author: Kevin Wells + * + * Copyright (C) 2010 NXP Semiconductors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +#define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + +/* + * Return IRQ number in irqnr. Also return processor Z flag status in CPSR + * as set if an interrupt is pending. + */ + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqstat, [\base, #LPC32XX_INTC_MASKED_STATUS_OFS] + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 + teq \irqstat, #0 + .endm + + .macro irq_prio_table + .endm +