usb: phy: samsung: Introducing usb phy driver for hsotg
This driver uses usb_phy interface to interact with s3c-hsotg. Supports phy_init and phy_shutdown functions to enable/disable usb phy. Support will be extended to host controllers and more Samsung SoCs. Signed-off-by: Praveen Paneri <p.paneri@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Praveen Paneri
Felipe Balbi
parent
04a6221c50
commit
337dc3a768
5 changed files with 401 additions and 0 deletions
11
Documentation/devicetree/bindings/usb/samsung-usbphy.txt
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11
Documentation/devicetree/bindings/usb/samsung-usbphy.txt
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@ -0,0 +1,11 @@
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* Samsung's usb phy transceiver
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The Samsung's phy transceiver is used for controlling usb otg phy for
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s3c-hsotg usb device controller.
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TODO: Adding the PHY binding with controller(s) according to the under
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developement generic PHY driver.
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Required properties:
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- compatible : should be "samsung,exynos4210-usbphy"
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- reg : base physical address of the phy registers and length of memory mapped
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region.
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@ -45,3 +45,11 @@ config USB_RCAR_PHY
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To compile this driver as a module, choose M here: the
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module will be called rcar-phy.
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config SAMSUNG_USBPHY
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bool "Samsung USB PHY controller Driver"
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depends on USB_S3C_HSOTG
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select USB_OTG_UTILS
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help
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Enable this to support Samsung USB phy controller for samsung
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SoCs.
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@ -9,3 +9,4 @@ obj-$(CONFIG_USB_ISP1301) += isp1301.o
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obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o
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obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
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obj-$(CONFIG_USB_RCAR_PHY) += rcar-phy.o
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obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o
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354
drivers/usb/phy/samsung-usbphy.c
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354
drivers/usb/phy/samsung-usbphy.c
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@ -0,0 +1,354 @@
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/* linux/drivers/usb/phy/samsung-usbphy.c
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Author: Praveen Paneri <p.paneri@samsung.com>
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*
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* Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/usb/otg.h>
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#include <linux/platform_data/samsung-usbphy.h>
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/* Register definitions */
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#define SAMSUNG_PHYPWR (0x00)
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#define PHYPWR_NORMAL_MASK (0x19 << 0)
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#define PHYPWR_OTG_DISABLE (0x1 << 4)
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#define PHYPWR_ANALOG_POWERDOWN (0x1 << 3)
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#define PHYPWR_FORCE_SUSPEND (0x1 << 1)
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/* For Exynos4 */
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#define PHYPWR_NORMAL_MASK_PHY0 (0x39 << 0)
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#define PHYPWR_SLEEP_PHY0 (0x1 << 5)
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#define SAMSUNG_PHYCLK (0x04)
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#define PHYCLK_MODE_USB11 (0x1 << 6)
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#define PHYCLK_EXT_OSC (0x1 << 5)
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#define PHYCLK_COMMON_ON_N (0x1 << 4)
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#define PHYCLK_ID_PULL (0x1 << 2)
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#define PHYCLK_CLKSEL_MASK (0x3 << 0)
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#define PHYCLK_CLKSEL_48M (0x0 << 0)
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#define PHYCLK_CLKSEL_12M (0x2 << 0)
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#define PHYCLK_CLKSEL_24M (0x3 << 0)
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#define SAMSUNG_RSTCON (0x08)
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#define RSTCON_PHYLINK_SWRST (0x1 << 2)
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#define RSTCON_HLINK_SWRST (0x1 << 1)
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#define RSTCON_SWRST (0x1 << 0)
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#ifndef MHZ
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#define MHZ (1000*1000)
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#endif
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enum samsung_cpu_type {
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TYPE_S3C64XX,
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TYPE_EXYNOS4210,
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};
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/*
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* struct samsung_usbphy - transceiver driver state
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* @phy: transceiver structure
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* @plat: platform data
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* @dev: The parent device supplied to the probe function
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* @clk: usb phy clock
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* @regs: usb phy register memory base
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* @ref_clk_freq: reference clock frequency selection
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* @cpu_type: machine identifier
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*/
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struct samsung_usbphy {
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struct usb_phy phy;
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struct samsung_usbphy_data *plat;
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struct device *dev;
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struct clk *clk;
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void __iomem *regs;
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int ref_clk_freq;
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int cpu_type;
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};
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#define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy)
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/*
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* Returns reference clock frequency selection value
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*/
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static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
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{
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struct clk *ref_clk;
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int refclk_freq = 0;
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ref_clk = clk_get(sphy->dev, "xusbxti");
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if (IS_ERR(ref_clk)) {
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dev_err(sphy->dev, "Failed to get reference clock\n");
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return PTR_ERR(ref_clk);
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}
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switch (clk_get_rate(ref_clk)) {
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case 12 * MHZ:
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refclk_freq = PHYCLK_CLKSEL_12M;
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break;
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case 24 * MHZ:
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refclk_freq = PHYCLK_CLKSEL_24M;
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break;
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case 48 * MHZ:
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refclk_freq = PHYCLK_CLKSEL_48M;
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break;
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default:
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if (sphy->cpu_type == TYPE_S3C64XX)
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refclk_freq = PHYCLK_CLKSEL_48M;
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else
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refclk_freq = PHYCLK_CLKSEL_24M;
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break;
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}
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clk_put(ref_clk);
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return refclk_freq;
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}
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static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
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{
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void __iomem *regs = sphy->regs;
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u32 phypwr;
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u32 phyclk;
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u32 rstcon;
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/* set clock frequency for PLL */
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phyclk = sphy->ref_clk_freq;
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phypwr = readl(regs + SAMSUNG_PHYPWR);
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rstcon = readl(regs + SAMSUNG_RSTCON);
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switch (sphy->cpu_type) {
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case TYPE_S3C64XX:
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phyclk &= ~PHYCLK_COMMON_ON_N;
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phypwr &= ~PHYPWR_NORMAL_MASK;
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rstcon |= RSTCON_SWRST;
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break;
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case TYPE_EXYNOS4210:
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phypwr &= ~PHYPWR_NORMAL_MASK_PHY0;
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rstcon |= RSTCON_SWRST;
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default:
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break;
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}
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writel(phyclk, regs + SAMSUNG_PHYCLK);
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/* Configure PHY0 for normal operation*/
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writel(phypwr, regs + SAMSUNG_PHYPWR);
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/* reset all ports of PHY and Link */
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writel(rstcon, regs + SAMSUNG_RSTCON);
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udelay(10);
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rstcon &= ~RSTCON_SWRST;
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writel(rstcon, regs + SAMSUNG_RSTCON);
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}
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static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
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{
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void __iomem *regs = sphy->regs;
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u32 phypwr;
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phypwr = readl(regs + SAMSUNG_PHYPWR);
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switch (sphy->cpu_type) {
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case TYPE_S3C64XX:
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phypwr |= PHYPWR_NORMAL_MASK;
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break;
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case TYPE_EXYNOS4210:
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phypwr |= PHYPWR_NORMAL_MASK_PHY0;
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default:
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break;
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}
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/* Disable analog and otg block power */
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writel(phypwr, regs + SAMSUNG_PHYPWR);
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}
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/*
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* The function passed to the usb driver for phy initialization
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*/
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static int samsung_usbphy_init(struct usb_phy *phy)
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{
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struct samsung_usbphy *sphy;
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int ret = 0;
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sphy = phy_to_sphy(phy);
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/* Enable the phy clock */
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ret = clk_prepare_enable(sphy->clk);
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if (ret) {
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dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
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return ret;
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}
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/* Disable phy isolation */
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if (sphy->plat && sphy->plat->pmu_isolation)
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sphy->plat->pmu_isolation(false);
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/* Initialize usb phy registers */
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samsung_usbphy_enable(sphy);
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/* Disable the phy clock */
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clk_disable_unprepare(sphy->clk);
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return ret;
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}
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/*
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* The function passed to the usb driver for phy shutdown
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*/
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static void samsung_usbphy_shutdown(struct usb_phy *phy)
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{
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struct samsung_usbphy *sphy;
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sphy = phy_to_sphy(phy);
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if (clk_prepare_enable(sphy->clk)) {
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dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
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return;
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}
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/* De-initialize usb phy registers */
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samsung_usbphy_disable(sphy);
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/* Enable phy isolation */
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if (sphy->plat && sphy->plat->pmu_isolation)
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sphy->plat->pmu_isolation(true);
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clk_disable_unprepare(sphy->clk);
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}
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static const struct of_device_id samsung_usbphy_dt_match[];
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static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
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{
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if (pdev->dev.of_node) {
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const struct of_device_id *match;
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match = of_match_node(samsung_usbphy_dt_match,
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pdev->dev.of_node);
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return (int) match->data;
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}
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return platform_get_device_id(pdev)->driver_data;
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}
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static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
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{
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struct samsung_usbphy *sphy;
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struct samsung_usbphy_data *pdata;
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struct device *dev = &pdev->dev;
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struct resource *phy_mem;
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void __iomem *phy_base;
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struct clk *clk;
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pdata = pdev->dev.platform_data;
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if (!pdata) {
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dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
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return -EINVAL;
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}
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phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!phy_mem) {
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dev_err(dev, "%s: missing mem resource\n", __func__);
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return -ENODEV;
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}
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phy_base = devm_request_and_ioremap(dev, phy_mem);
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if (!phy_base) {
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dev_err(dev, "%s: register mapping failed\n", __func__);
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return -ENXIO;
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}
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sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
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if (!sphy)
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return -ENOMEM;
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clk = devm_clk_get(dev, "otg");
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if (IS_ERR(clk)) {
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dev_err(dev, "Failed to get otg clock\n");
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return PTR_ERR(clk);
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}
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sphy->dev = &pdev->dev;
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sphy->plat = pdata;
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sphy->regs = phy_base;
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sphy->clk = clk;
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sphy->phy.dev = sphy->dev;
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sphy->phy.label = "samsung-usbphy";
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sphy->phy.init = samsung_usbphy_init;
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sphy->phy.shutdown = samsung_usbphy_shutdown;
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sphy->cpu_type = samsung_usbphy_get_driver_data(pdev);
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sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy);
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platform_set_drvdata(pdev, sphy);
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return usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
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}
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static int __exit samsung_usbphy_remove(struct platform_device *pdev)
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{
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struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
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usb_remove_phy(&sphy->phy);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id samsung_usbphy_dt_match[] = {
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{
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.compatible = "samsung,s3c64xx-usbphy",
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.data = (void *)TYPE_S3C64XX,
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}, {
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.compatible = "samsung,exynos4210-usbphy",
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.data = (void *)TYPE_EXYNOS4210,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
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#endif
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static struct platform_device_id samsung_usbphy_driver_ids[] = {
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{
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.name = "s3c64xx-usbphy",
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.driver_data = TYPE_S3C64XX,
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}, {
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.name = "exynos4210-usbphy",
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.driver_data = TYPE_EXYNOS4210,
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},
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{},
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};
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MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
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static struct platform_driver samsung_usbphy_driver = {
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.probe = samsung_usbphy_probe,
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.remove = __devexit_p(samsung_usbphy_remove),
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.id_table = samsung_usbphy_driver_ids,
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.driver = {
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.name = "samsung-usbphy",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(samsung_usbphy_dt_match),
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},
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};
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module_platform_driver(samsung_usbphy_driver);
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MODULE_DESCRIPTION("Samsung USB phy controller");
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MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:samsung-usbphy");
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27
include/linux/platform_data/samsung-usbphy.h
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27
include/linux/platform_data/samsung-usbphy.h
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@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2012 Samsung Electronics Co.Ltd
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* http://www.samsung.com/
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* Author: Praveen Paneri <p.paneri@samsung.com>
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*
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* Defines platform data for samsung usb phy driver.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __SAMSUNG_USBPHY_PLATFORM_H
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#define __SAMSUNG_USBPHY_PLATFORM_H
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/**
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* samsung_usbphy_data - Platform data for USB PHY driver.
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* @pmu_isolation: Function to control usb phy isolation in PMU.
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*/
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struct samsung_usbphy_data {
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void (*pmu_isolation)(int on);
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};
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extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
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#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
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