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[MIPS] Momentum: Resurrect after things were moved around a while ago.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2006-03-08 14:22:27 +00:00
parent bb7d83f744
commit 3367fd5075
7 changed files with 29 additions and 23 deletions
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8
arch/mips/kernel/irq-mv6434x.c
View file

@ -11,12 +11,14 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <asm/ptrace.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/mv643xx.h>
#include <linux/sched.h>
#include <asm/ptrace.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/mv643xx.h>
#include <asm/marvell.h>
static unsigned int irq_base;

2
arch/mips/momentum/jaguar_atx/prom.c
View file

@ -21,10 +21,10 @@
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <linux/mv643xx.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/mv64340.h>
#include <asm/pmon.h>
#include "jaguar_atx_fpga.h"

5
arch/mips/momentum/jaguar_atx/setup.c
View file

@ -2,7 +2,7 @@
* BRIEF MODULE DESCRIPTION
* Momentum Computer Jaguar-ATX board dependent boot routines
*
* Copyright (C) 1996, 1997, 2001, 2004 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2000 RidgeRun, Inc.
* Copyright (C) 2001 Red Hat, Inc.
* Copyright (C) 2002 Momentum Computer
@ -55,6 +55,8 @@
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/vmalloc.h>
#include <linux/mv643xx.h>
#include <asm/time.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
@ -64,7 +66,6 @@
#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/tlbflush.h>
#include <asm/mv64340.h>
#include "jaguar_atx_fpga.h"

2
arch/mips/momentum/ocelot_c/irq.c
View file

@ -41,11 +41,11 @@
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/bitops.h>
#include <linux/mv643xx.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/mv64340.h>
#include <asm/system.h>
extern asmlinkage void ocelot_handle_int(void);

2
arch/mips/momentum/ocelot_c/prom.c
View file

@ -19,10 +19,10 @@
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <linux/mv643xx.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/mv64340.h>
#include <asm/pmon.h>
#include "ocelot_c_fpga.h"

27
arch/mips/momentum/ocelot_c/setup.c
View file

@ -54,6 +54,7 @@
#include <linux/pm.h>
#include <linux/timex.h>
#include <linux/vmalloc.h>
#include <linux/mv643xx.h>
#include <asm/time.h>
#include <asm/bootinfo.h>
@ -64,9 +65,9 @@
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/marvell.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#include <asm/mv64340.h>
#include "ocelot_c_fpga.h"
unsigned long marvell_base;
@ -252,22 +253,22 @@ void __init plat_setup(void)
/* shut down ethernet ports, just to be sure our memory doesn't get
* corrupted by random ethernet traffic.
*/
MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
do {}
while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
do {}
while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
do {}
while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
do {}
while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0),
MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1),
MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0),
MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1),
MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
/* Turn off the Bit-Error LED */
OCELOT_FPGA_WRITE(0x80, CLR);

6
arch/mips/pci/pci-ocelot-c.c
View file

@ -3,15 +3,17 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2004, 06 by Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/mv64340.h>
#include <linux/mv643xx.h>
#include <linux/init.h>
#include <asm/marvell.h>
/*
* We assume the address ranges have already been setup appropriately by
* the firmware. PMON in case of the Ocelot C does that.