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ARM: mvebu: prepare pm-board.c for the introduction of Armada 38x support

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The pm-board.c code contains the board-specific logic to enter suspend
to RAM. Until now, the code supported only the Armada XP GP board, so
all functions and symbols were named with armada_xp_gp. However, it
turns out that the Armada 388 GP also uses the same 3 GPIOs protocol
to talk to the PIC microcontroller that controls the power supply.

Since we are going to re-use the same code with no change for Armada
38x, this commit renames the functions and symbols to use just
"armada" instead of "armada_xp_gp". Better names can be found if one
day other boards having a different protocol/mechanism are supported
in the kernel.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Thomas Petazzoni 2015-07-08 17:02:33 +02:00 committed by Gregory CLEMENT
parent 88ed69f2a1
commit 32f9494c9d
1 changed files with 11 additions and 11 deletions
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22
arch/arm/mach-mvebu/pm-board.c
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@ -1,7 +1,7 @@
/* /*
* Board-level suspend/resume support. * Board-level suspend/resume support.
* *
* Copyright (C) 2014 Marvell * Copyright (C) 2014-2015 Marvell
* *
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* *
@ -20,27 +20,27 @@
#include <linux/slab.h> #include <linux/slab.h>
#include "common.h" #include "common.h"
#define ARMADA_XP_GP_PIC_NR_GPIOS 3 #define ARMADA_PIC_NR_GPIOS 3
static void __iomem *gpio_ctrl; static void __iomem *gpio_ctrl;
static int pic_gpios[ARMADA_XP_GP_PIC_NR_GPIOS]; static int pic_gpios[ARMADA_PIC_NR_GPIOS];
static int pic_raw_gpios[ARMADA_XP_GP_PIC_NR_GPIOS]; static int pic_raw_gpios[ARMADA_PIC_NR_GPIOS];
static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd) static void mvebu_armada_pm_enter(void __iomem *sdram_reg, u32 srcmd)
{ {
u32 reg, ackcmd; u32 reg, ackcmd;
int i; int i;
/* Put 001 as value on the GPIOs */ /* Put 001 as value on the GPIOs */
reg = readl(gpio_ctrl); reg = readl(gpio_ctrl);
for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++) for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
reg &= ~BIT(pic_raw_gpios[i]); reg &= ~BIT(pic_raw_gpios[i]);
reg |= BIT(pic_raw_gpios[0]); reg |= BIT(pic_raw_gpios[0]);
writel(reg, gpio_ctrl); writel(reg, gpio_ctrl);
/* Prepare writing 111 to the GPIOs */ /* Prepare writing 111 to the GPIOs */
ackcmd = readl(gpio_ctrl); ackcmd = readl(gpio_ctrl);
for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++) for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
ackcmd |= BIT(pic_raw_gpios[i]); ackcmd |= BIT(pic_raw_gpios[i]);
srcmd = cpu_to_le32(srcmd); srcmd = cpu_to_le32(srcmd);
@ -76,7 +76,7 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
[ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1"); [ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1");
} }
static int mvebu_armada_xp_gp_pm_init(void) static int mvebu_armada_pm_init(void)
{ {
struct device_node *np; struct device_node *np;
struct device_node *gpio_ctrl_np; struct device_node *gpio_ctrl_np;
@ -89,7 +89,7 @@ static int mvebu_armada_xp_gp_pm_init(void)
if (!np) if (!np)
return -ENODEV; return -ENODEV;
for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++) { for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) {
char *name; char *name;
struct of_phandle_args args; struct of_phandle_args args;
@ -134,11 +134,11 @@ static int mvebu_armada_xp_gp_pm_init(void)
if (!gpio_ctrl) if (!gpio_ctrl)
return -ENOMEM; return -ENOMEM;
mvebu_pm_init(mvebu_armada_xp_gp_pm_enter); mvebu_pm_init(mvebu_armada_pm_enter);
out: out:
of_node_put(np); of_node_put(np);
return ret; return ret;
} }
late_initcall(mvebu_armada_xp_gp_pm_init); late_initcall(mvebu_armada_pm_init);