spidernet: driver docmentation
Documentation for the spidernet driver. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Documentation/networking/spider_net.txt
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Documentation/networking/spider_net.txt
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The Spidernet Device Driver
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===========================
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Written by Linas Vepstas <linas@austin.ibm.com>
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Version of 7 June 2007
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Abstract
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========
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This document sketches the structure of portions of the spidernet
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device driver in the Linux kernel tree. The spidernet is a gigabit
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ethernet device built into the Toshiba southbridge commonly used
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in the SONY Playstation 3 and the IBM QS20 Cell blade.
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The Structure of the RX Ring.
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=============================
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The receive (RX) ring is a circular linked list of RX descriptors,
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together with three pointers into the ring that are used to manage its
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contents.
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The elements of the ring are called "descriptors" or "descrs"; they
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describe the received data. This includes a pointer to a buffer
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containing the received data, the buffer size, and various status bits.
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There are three primary states that a descriptor can be in: "empty",
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"full" and "not-in-use". An "empty" or "ready" descriptor is ready
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to receive data from the hardware. A "full" descriptor has data in it,
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and is waiting to be emptied and processed by the OS. A "not-in-use"
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descriptor is neither empty or full; it is simply not ready. It may
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not even have a data buffer in it, or is otherwise unusable.
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During normal operation, on device startup, the OS (specifically, the
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spidernet device driver) allocates a set of RX descriptors and RX
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buffers. These are all marked "empty", ready to receive data. This
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ring is handed off to the hardware, which sequentially fills in the
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buffers, and marks them "full". The OS follows up, taking the full
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buffers, processing them, and re-marking them empty.
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This filling and emptying is managed by three pointers, the "head"
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and "tail" pointers, managed by the OS, and a hardware current
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descriptor pointer (GDACTDPA). The GDACTDPA points at the descr
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currently being filled. When this descr is filled, the hardware
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marks it full, and advances the GDACTDPA by one. Thus, when there is
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flowing RX traffic, every descr behind it should be marked "full",
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and everything in front of it should be "empty". If the hardware
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discovers that the current descr is not empty, it will signal an
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interrupt, and halt processing.
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The tail pointer tails or trails the hardware pointer. When the
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hardware is ahead, the tail pointer will be pointing at a "full"
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descr. The OS will process this descr, and then mark it "not-in-use",
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and advance the tail pointer. Thus, when there is flowing RX traffic,
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all of the descrs in front of the tail pointer should be "full", and
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all of those behind it should be "not-in-use". When RX traffic is not
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flowing, then the tail pointer can catch up to the hardware pointer.
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The OS will then note that the current tail is "empty", and halt
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processing.
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The head pointer (somewhat mis-named) follows after the tail pointer.
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When traffic is flowing, then the head pointer will be pointing at
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a "not-in-use" descr. The OS will perform various housekeeping duties
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on this descr. This includes allocating a new data buffer and
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dma-mapping it so as to make it visible to the hardware. The OS will
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then mark the descr as "empty", ready to receive data. Thus, when there
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is flowing RX traffic, everything in front of the head pointer should
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be "not-in-use", and everything behind it should be "empty". If no
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RX traffic is flowing, then the head pointer can catch up to the tail
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pointer, at which point the OS will notice that the head descr is
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"empty", and it will halt processing.
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Thus, in an idle system, the GDACTDPA, tail and head pointers will
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all be pointing at the same descr, which should be "empty". All of the
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other descrs in the ring should be "empty" as well.
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The show_rx_chain() routine will print out the the locations of the
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GDACTDPA, tail and head pointers. It will also summarize the contents
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of the ring, starting at the tail pointer, and listing the status
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of the descrs that follow.
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A typical example of the output, for a nearly idle system, might be
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net eth1: Total number of descrs=256
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net eth1: Chain tail located at descr=20
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net eth1: Chain head is at 20
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net eth1: HW curr desc (GDACTDPA) is at 21
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net eth1: Have 1 descrs with stat=x40800101
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net eth1: HW next desc (GDACNEXTDA) is at 22
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net eth1: Last 255 descrs with stat=xa0800000
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In the above, the hardware has filled in one descr, number 20. Both
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head and tail are pointing at 20, because it has not yet been emptied.
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Meanwhile, hw is pointing at 21, which is free.
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The "Have nnn decrs" refers to the descr starting at the tail: in this
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case, nnn=1 descr, starting at descr 20. The "Last nnn descrs" refers
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to all of the rest of the descrs, from the last status change. The "nnn"
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is a count of how many descrs have exactly the same status.
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The status x4... corresponds to "full" and status xa... corresponds
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to "empty". The actual value printed is RXCOMST_A.
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In the device driver source code, a different set of names are
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used for these same concepts, so that
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"empty" == SPIDER_NET_DESCR_CARDOWNED == 0xa
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"full" == SPIDER_NET_DESCR_FRAME_END == 0x4
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"not in use" == SPIDER_NET_DESCR_NOT_IN_USE == 0xf
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The RX RAM full bug/feature
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===========================
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As long as the OS can empty out the RX buffers at a rate faster than
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the hardware can fill them, there is no problem. If, for some reason,
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the OS fails to empty the RX ring fast enough, the hardware GDACTDPA
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pointer will catch up to the head, notice the not-empty condition,
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ad stop. However, RX packets may still continue arriving on the wire.
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The spidernet chip can save some limited number of these in local RAM.
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When this local ram fills up, the spider chip will issue an interrupt
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indicating this (GHIINT0STS will show ERRINT, and the GRMFLLINT bit
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will be set in GHIINT1STS). When the RX ram full condition occurs,
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a certain bug/feature is triggered that has to be specially handled.
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This section describes the special handling for this condition.
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When the OS finally has a chance to run, it will empty out the RX ring.
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In particular, it will clear the descriptor on which the hardware had
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stopped. However, once the hardware has decided that a certain
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descriptor is invalid, it will not restart at that descriptor; instead
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it will restart at the next descr. This potentially will lead to a
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deadlock condition, as the tail pointer will be pointing at this descr,
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which, from the OS point of view, is empty; the OS will be waiting for
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this descr to be filled. However, the hardware has skipped this descr,
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and is filling the next descrs. Since the OS doesn't see this, there
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is a potential deadlock, with the OS waiting for one descr to fill,
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while the hardware is waiting for a different set of descrs to become
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empty.
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A call to show_rx_chain() at this point indicates the nature of the
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problem. A typical print when the network is hung shows the following:
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net eth1: Spider RX RAM full, incoming packets might be discarded!
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net eth1: Total number of descrs=256
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net eth1: Chain tail located at descr=255
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net eth1: Chain head is at 255
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net eth1: HW curr desc (GDACTDPA) is at 0
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net eth1: Have 1 descrs with stat=xa0800000
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net eth1: HW next desc (GDACNEXTDA) is at 1
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net eth1: Have 127 descrs with stat=x40800101
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net eth1: Have 1 descrs with stat=x40800001
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net eth1: Have 126 descrs with stat=x40800101
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net eth1: Last 1 descrs with stat=xa0800000
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Both the tail and head pointers are pointing at descr 255, which is
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marked xa... which is "empty". Thus, from the OS point of view, there
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is nothing to be done. In particular, there is the implicit assumption
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that everything in front of the "empty" descr must surely also be empty,
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as explained in the last section. The OS is waiting for descr 255 to
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become non-empty, which, in this case, will never happen.
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The HW pointer is at descr 0. This descr is marked 0x4.. or "full".
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Since its already full, the hardware can do nothing more, and thus has
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halted processing. Notice that descrs 0 through 254 are all marked
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"full", while descr 254 and 255 are empty. (The "Last 1 descrs" is
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descr 254, since tail was at 255.) Thus, the system is deadlocked,
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and there can be no forward progress; the OS thinks there's nothing
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to do, and the hardware has nowhere to put incoming data.
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This bug/feature is worked around with the spider_net_resync_head_ptr()
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routine. When the driver receives RX interrupts, but an examination
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of the RX chain seems to show it is empty, then it is probable that
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the hardware has skipped a descr or two (sometimes dozens under heavy
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network conditions). The spider_net_resync_head_ptr() subroutine will
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search the ring for the next full descr, and the driver will resume
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operations there. Since this will leave "holes" in the ring, there
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is also a spider_net_resync_tail_ptr() that will skip over such holes.
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As of this writing, the spider_net_resync() strategy seems to work very
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well, even under heavy network loads.
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The TX ring
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===========
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The TX ring uses a low-watermark interrupt scheme to make sure that
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the TX queue is appropriately serviced for large packet sizes.
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For packet sizes greater than about 1KBytes, the kernel can fill
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the TX ring quicker than the device can drain it. Once the ring
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is full, the netdev is stopped. When there is room in the ring,
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the netdev needs to be reawakened, so that more TX packets are placed
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in the ring. The hardware can empty the ring about four times per jiffy,
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so its not appropriate to wait for the poll routine to refill, since
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the poll routine runs only once per jiffy. The low-watermark mechanism
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marks a descr about 1/4th of the way from the bottom of the queue, so
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that an interrupt is generated when the descr is processed. This
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interrupt wakes up the netdev, which can then refill the queue.
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For large packets, this mechanism generates a relatively small number
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of interrupts, about 1K/sec. For smaller packets, this will drop to zero
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interrupts, as the hardware can empty the queue faster than the kernel
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can fill it.
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======= END OF DOCUMENT ========
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