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generic GPIO support for the Freescale Coldfire 5272.

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Add support for the 5272.

Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
sfking@fdwdc.com 2009-06-19 18:11:07 -07:00 committed by Greg Ungerer
parent f1554da34f
commit 316f2c483c
3 changed files with 97 additions and 10 deletions
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24
arch/m68k/include/asm/m5272sim.h
View file

@ -63,16 +63,22 @@
#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */
#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */
#define MCFSIM_PACNT 0x80 /* Port A Control (r/w) */
#define MCFSIM_PADDR 0x84 /* Port A Direction (r/w) */
#define MCFSIM_PADAT 0x86 /* Port A Data (r/w) */
#define MCFSIM_PBCNT 0x88 /* Port B Control (r/w) */
#define MCFSIM_PBDDR 0x8c /* Port B Direction (r/w) */
#define MCFSIM_PBDAT 0x8e /* Port B Data (r/w) */
#define MCFSIM_PCDDR 0x94 /* Port C Direction (r/w) */
#define MCFSIM_PCDAT 0x96 /* Port C Data (r/w) */
#define MCFSIM_PDCNT 0x98 /* Port D Control (r/w) */
#define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */
#define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x86) /* Port A Data (r/w) */
#define MCFSIM_PBCNT (MCF_MBAR + 0x88) /* Port B Control (r/w) */
#define MCFSIM_PBDDR (MCF_MBAR + 0x8c) /* Port B Direction (r/w) */
#define MCFSIM_PBDAT (MCF_MBAR + 0x8e) /* Port B Data (r/w) */
#define MCFSIM_PCDDR (MCF_MBAR + 0x94) /* Port C Direction (r/w) */
#define MCFSIM_PCDAT (MCF_MBAR + 0x96) /* Port C Data (r/w) */
#define MCFSIM_PDCNT (MCF_MBAR + 0x98) /* Port D Control (r/w) */
/*
* Generic GPIO support
*/
#define MCFGPIO_PIN_MAX 48
#define MCFGPIO_IRQ_MAX -1
#define MCFGPIO_IRQ_VECBASE -1
/****************************************************************************/
#endif /* m5272sim_h */

2
arch/m68knommu/platform/5272/Makefile
View file

@ -14,5 +14,5 @@
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
obj-y := config.o
obj-y := config.o gpio.o

81
arch/m68knommu/platform/5272/gpio.c Normal file
View file

@ -0,0 +1,81 @@
/*
* Coldfire generic GPIO support
*
* (C) Copyright 2009, Steven King <sfking@fdwdc.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>
static struct mcf_gpio_chip mcf_gpio_chips[] = {
{
.gpio_chip = {
.label = "PA",
.request = mcf_gpio_request,
.free = mcf_gpio_free,
.direction_input = mcf_gpio_direction_input,
.direction_output = mcf_gpio_direction_output,
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.ngpio = 16,
},
.pddr = MCFSIM_PADDR,
.podr = MCFSIM_PADAT,
.ppdr = MCFSIM_PADAT,
},
{
.gpio_chip = {
.label = "PB",
.request = mcf_gpio_request,
.free = mcf_gpio_free,
.direction_input = mcf_gpio_direction_input,
.direction_output = mcf_gpio_direction_output,
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.base = 16,
.ngpio = 16,
},
.pddr = MCFSIM_PBDDR,
.podr = MCFSIM_PBDAT,
.ppdr = MCFSIM_PBDAT,
},
{
.gpio_chip = {
.label = "PC",
.request = mcf_gpio_request,
.free = mcf_gpio_free,
.direction_input = mcf_gpio_direction_input,
.direction_output = mcf_gpio_direction_output,
.get = mcf_gpio_get_value,
.set = mcf_gpio_set_value,
.base = 32,
.ngpio = 16,
},
.pddr = MCFSIM_PCDDR,
.podr = MCFSIM_PCDAT,
.ppdr = MCFSIM_PCDAT,
},
};
static int __init mcf_gpio_init(void)
{
unsigned i = 0;
while (i < ARRAY_SIZE(mcf_gpio_chips))
(void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
return 0;
}
core_initcall(mcf_gpio_init);