V4L/DVB (8474): pvrusb2: Enable IR chip on HVR-1900 class devices
The Zilog IR chip on HVR-1900 devices is held in reset when the device initializes. We have to bring this chip out of reset before LIRC has any chance of operating the chip. So do it. Signed-off-by: Mike Isely <isely@pobox.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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7e994302ed
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31335b13ca
5 changed files with 35 additions and 11 deletions
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@ -97,13 +97,13 @@ static const struct pvr2_device_desc pvr2_device_24xxx = {
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.flag_has_cx25840 = !0,
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.flag_has_wm8775 = !0,
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.flag_has_hauppauge_rom = !0,
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.flag_has_hauppauge_custom_ir = !0,
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.flag_has_analogtuner = !0,
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.flag_has_fmradio = !0,
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.flag_has_composite = !0,
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.flag_has_svideo = !0,
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.signal_routing_scheme = PVR2_ROUTING_SCHEME_HAUPPAUGE,
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.led_scheme = PVR2_LED_SCHEME_HAUPPAUGE,
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.ir_scheme = PVR2_IR_SCHEME_24XXX,
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};
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@ -344,6 +344,7 @@ static const struct pvr2_device_desc pvr2_device_73xxx = {
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.signal_routing_scheme = PVR2_ROUTING_SCHEME_HAUPPAUGE,
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.digital_control_scheme = PVR2_DIGITAL_SCHEME_HAUPPAUGE,
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.led_scheme = PVR2_LED_SCHEME_HAUPPAUGE,
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.ir_scheme = PVR2_IR_SCHEME_ZILOG,
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#ifdef CONFIG_VIDEO_PVRUSB2_DVB
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.dvb_props = &pvr2_73xxx_dvb_props,
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#endif
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@ -453,6 +454,7 @@ static const struct pvr2_device_desc pvr2_device_750xx = {
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.digital_control_scheme = PVR2_DIGITAL_SCHEME_HAUPPAUGE,
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.default_std_mask = V4L2_STD_NTSC_M,
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.led_scheme = PVR2_LED_SCHEME_HAUPPAUGE,
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.ir_scheme = PVR2_IR_SCHEME_ZILOG,
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#ifdef CONFIG_VIDEO_PVRUSB2_DVB
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.dvb_props = &pvr2_750xx_dvb_props,
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#endif
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@ -474,6 +476,7 @@ static const struct pvr2_device_desc pvr2_device_751xx = {
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.digital_control_scheme = PVR2_DIGITAL_SCHEME_HAUPPAUGE,
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.default_std_mask = V4L2_STD_NTSC_M,
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.led_scheme = PVR2_LED_SCHEME_HAUPPAUGE,
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.ir_scheme = PVR2_IR_SCHEME_ZILOG,
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#ifdef CONFIG_VIDEO_PVRUSB2_DVB
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.dvb_props = &pvr2_751xx_dvb_props,
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#endif
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@ -48,6 +48,10 @@ struct pvr2_string_table {
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#define PVR2_LED_SCHEME_NONE 0
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#define PVR2_LED_SCHEME_HAUPPAUGE 1
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#define PVR2_IR_SCHEME_NONE 0
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#define PVR2_IR_SCHEME_24XXX 1
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#define PVR2_IR_SCHEME_ZILOG 2
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/* This describes a particular hardware type (except for the USB device ID
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which must live in a separate structure due to environmental
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constraints). See the top of pvrusb2-hdw.c for where this is
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@ -126,15 +130,19 @@ struct pvr2_device_desc {
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ensure that it is found. */
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unsigned int flag_has_wm8775:1;
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/* Device has IR hardware that can be faked into looking like a
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normal Hauppauge i2c IR receiver. This is currently very
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specific to the 24xxx device, where Hauppauge had replaced their
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'standard' I2C IR receiver with a bunch of FPGA logic controlled
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directly via the FX2. Turning this on tells the pvrusb2 driver
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to virtualize the presence of the non-existant IR receiver chip and
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implement the virtual receiver in terms of appropriate FX2
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commands. */
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unsigned int flag_has_hauppauge_custom_ir:1;
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/* Indicate any specialized IR scheme that might need to be
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supported by this driver. If not set, then it is assumed that
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IR can work without help from the driver (which is frequently
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the case). This is otherwise set to one of
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PVR2_IR_SCHEME_xxxx. For "xxxx", the value "24XXX" indicates a
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Hauppauge 24xxx class device which has an FPGA-hosted IR
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receiver that can only be reached via FX2 command codes. In
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that case the pvrusb2 driver will emulate the behavior of the
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older 29xxx device's IR receiver (a "virtual" I2C chip) in terms
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of those command codes. For the value "ZILOG", we're dealing
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with an IR chip that must be taken out of reset via another FX2
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command code (which is the case for HVR-1950 devices). */
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unsigned int ir_scheme:2;
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/* These bits define which kinds of sources the device can handle.
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Note: Digital tuner presence is inferred by the
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@ -24,6 +24,8 @@
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#define FX2CMD_MEM_WRITE_DWORD 0x01u
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#define FX2CMD_MEM_READ_DWORD 0x02u
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#define FX2CMD_HCW_ZILOG_RESET 0x10u /* 1=reset 0=release */
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#define FX2CMD_MEM_READ_64BYTES 0x28u
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#define FX2CMD_REG_WRITE 0x04u
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@ -250,6 +250,7 @@ struct pvr2_fx2cmd_descdef {
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static const struct pvr2_fx2cmd_descdef pvr2_fx2cmd_desc[] = {
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{FX2CMD_MEM_WRITE_DWORD, "write encoder dword"},
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{FX2CMD_MEM_READ_DWORD, "read encoder dword"},
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{FX2CMD_HCW_ZILOG_RESET, "zilog IR reset control"},
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{FX2CMD_MEM_READ_64BYTES, "read encoder 64bytes"},
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{FX2CMD_REG_WRITE, "write encoder register"},
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{FX2CMD_REG_READ, "read encoder register"},
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@ -1711,6 +1712,14 @@ static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
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if (!pvr2_hdw_dev_ok(hdw)) return;
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}
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/* Take the IR chip out of reset, if appropriate */
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if (hdw->hdw_desc->ir_scheme == PVR2_IR_SCHEME_ZILOG) {
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pvr2_issue_simple_cmd(hdw,
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FX2CMD_HCW_ZILOG_RESET |
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(1 << 8) |
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((0) << 16));
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}
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// This step MUST happen after the earlier powerup step.
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pvr2_i2c_core_init(hdw);
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if (!pvr2_hdw_dev_ok(hdw)) return;
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@ -979,7 +979,9 @@ void pvr2_i2c_core_init(struct pvr2_hdw *hdw)
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printk(KERN_INFO "%s: IR disabled\n",hdw->name);
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hdw->i2c_func[0x18] = i2c_black_hole;
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} else if (ir_mode[hdw->unit_number] == 1) {
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if (hdw->hdw_desc->flag_has_hauppauge_custom_ir) {
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if (hdw->hdw_desc->ir_scheme == PVR2_IR_SCHEME_24XXX) {
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/* This comment is present PURELY to get
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checkpatch.pl to STFU. Lovely, eh? */
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hdw->i2c_func[0x18] = i2c_24xxx_ir;
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}
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}
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