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ARC: [plat-eznps] Fix TLB Errata

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Due to a HW bug in NPS400 we get from time to time false TLB miss.
Workaround this by validating each miss.

Signed-off-by: Noam Camus <noamca@mellanox.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Noam Camus 2017-05-28 09:52:03 +03:00 • committed by Vineet Gupta
parent 9e9395525b
commit 30b7af252e
1 changed files with 9 additions and 0 deletions
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9
arch/arc/mm/tlbex.S
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@ -274,6 +274,13 @@ ex_saved_reg1:
.macro COMMIT_ENTRY_TO_MMU .macro COMMIT_ENTRY_TO_MMU
#if (CONFIG_ARC_MMU_VER < 4) #if (CONFIG_ARC_MMU_VER < 4)
#ifdef CONFIG_EZNPS_MTM_EXT
/* verify if entry for this vaddr+ASID already exists */
sr TLBProbe, [ARC_REG_TLBCOMMAND]
lr r0, [ARC_REG_TLBINDEX]
bbit0 r0, 31, 88f
#endif
/* Get free TLB slot: Set = computed from vaddr, way = random */ /* Get free TLB slot: Set = computed from vaddr, way = random */
sr TLBGetIndex, [ARC_REG_TLBCOMMAND] sr TLBGetIndex, [ARC_REG_TLBCOMMAND]
@ -287,6 +294,8 @@ ex_saved_reg1:
#else #else
sr TLBInsertEntry, [ARC_REG_TLBCOMMAND] sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]
#endif #endif
88:
.endm .endm