KVM/ARM Fixes for v4.8-rc3
This tag contains the following fixes on top of v4.8-rc1: - ITS init issues - ITS error handling issues - ITS IRQ leakage fix - Plug a couple of ITS race conditions - An erratum workaround for timers - Some removal of misleading use of errors and comments - A fix for GICv3 on 32-bit guests -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJXtLicAAoJEEtpOizt6ddyEC4H/16IngntN6Gz1WPwtBBelgyj ZfU970uzGOyDtDOeOX1NT+gJpkDvUMhsNlngWnMrMwqqqPVKdE4XBShPiW2v53E7 JquDTd2kKl+OO9e9XnkLw9yUcARmJFKIjHdISlg+E78t2kcNHn+XB2jrfTLKQVl8 tk1ztDALb4LXSGYPZQ/uHTYp9U0qei+2SbbQufRcdQ3ggyxLDwPP2aO25amctzEP 0Y42tlnNoZj7yBBp0X9BWRrHF2AZuOp+qBJnpFiQdsgLL6G1P3DcU/t9+KDjVBVr LYKN8jId2r5eyGGg8aKb4I3trevayToWhDw/jzarrTNAovB1cp8G5J7ozfmeS3g= =4PCW -----END PGP SIGNATURE----- Merge tag 'kvm-arm-for-v4.8-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/ARM Fixes for v4.8-rc3 This tag contains the following fixes on top of v4.8-rc1: - ITS init issues - ITS error handling issues - ITS IRQ leakage fix - Plug a couple of ITS race conditions - An erratum workaround for timers - Some removal of misleading use of errors and comments - A fix for GICv3 on 32-bit guests
This commit is contained in:
commit
2eeb321fd2
11 changed files with 164 additions and 71 deletions
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@ -53,6 +53,7 @@ stable kernels.
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| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
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| ARM | Cortex-A57 | #852523 | N/A |
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| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
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| ARM | Cortex-A72 | #853709 | N/A |
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| ARM | MMU-500 | #841119,#826419 | N/A |
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| | | | |
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| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
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@ -1309,7 +1309,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
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smp_rmb();
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pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
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if (is_error_pfn(pfn))
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if (is_error_noslot_pfn(pfn))
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return -EFAULT;
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if (kvm_is_device_pfn(pfn)) {
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@ -256,7 +256,7 @@ static int __hyp_text __guest_run(struct kvm_vcpu *vcpu)
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/*
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* We must restore the 32-bit state before the sysregs, thanks
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* to Cortex-A57 erratum #852523.
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* to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72).
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*/
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__sysreg32_restore_state(vcpu);
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__sysreg_restore_guest_state(guest_ctxt);
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@ -823,14 +823,6 @@ static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
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* Architected system registers.
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* Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
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*
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* We could trap ID_DFR0 and tell the guest we don't support performance
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* monitoring. Unfortunately the patch to make the kernel check ID_DFR0 was
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* NAKed, so it will read the PMCR anyway.
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*
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* Therefore we tell the guest we have 0 counters. Unfortunately, we
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* must always support PMCCNTR (the cycle counter): we just RAZ/WI for
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* all PM registers, which doesn't crash the guest kernel at least.
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*
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* Debug handling: We do trap most, if not all debug related system
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* registers. The implementation is good enough to ensure that a guest
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* can use these with minimal performance degradation. The drawback is
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@ -1360,7 +1352,7 @@ static const struct sys_reg_desc cp15_regs[] = {
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{ Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 },
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/* ICC_SRE */
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{ Op1( 0), CRn(12), CRm(12), Op2( 5), trap_raz_wi },
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{ Op1( 0), CRn(12), CRm(12), Op2( 5), access_gic_sre },
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{ Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID },
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@ -337,6 +337,7 @@
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*/
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#define E_ITS_MOVI_UNMAPPED_INTERRUPT 0x010107
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#define E_ITS_MOVI_UNMAPPED_COLLECTION 0x010109
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#define E_ITS_INT_UNMAPPED_INTERRUPT 0x010307
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#define E_ITS_CLEAR_UNMAPPED_INTERRUPT 0x010507
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#define E_ITS_MAPD_DEVICE_OOR 0x010801
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#define E_ITS_MAPC_PROCNUM_OOR 0x010902
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@ -33,6 +33,7 @@
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static struct timecounter *timecounter;
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static struct workqueue_struct *wqueue;
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static unsigned int host_vtimer_irq;
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static u32 host_vtimer_irq_flags;
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void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
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{
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@ -365,7 +366,7 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
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static void kvm_timer_init_interrupt(void *info)
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{
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enable_percpu_irq(host_vtimer_irq, 0);
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enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
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}
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int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value)
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@ -432,6 +433,14 @@ int kvm_timer_hyp_init(void)
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}
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host_vtimer_irq = info->virtual_irq;
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host_vtimer_irq_flags = irq_get_trigger_type(host_vtimer_irq);
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if (host_vtimer_irq_flags != IRQF_TRIGGER_HIGH &&
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host_vtimer_irq_flags != IRQF_TRIGGER_LOW) {
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kvm_err("Invalid trigger for IRQ%d, assuming level low\n",
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host_vtimer_irq);
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host_vtimer_irq_flags = IRQF_TRIGGER_LOW;
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}
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err = request_percpu_irq(host_vtimer_irq, kvm_arch_timer_handler,
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"kvm guest timer", kvm_get_running_vcpus());
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if (err) {
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@ -51,7 +51,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid)
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irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL);
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if (!irq)
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return NULL;
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return ERR_PTR(-ENOMEM);
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INIT_LIST_HEAD(&irq->lpi_list);
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INIT_LIST_HEAD(&irq->ap_list);
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@ -441,39 +441,63 @@ static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
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* Find the target VCPU and the LPI number for a given devid/eventid pair
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* and make this IRQ pending, possibly injecting it.
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* Must be called with the its_lock mutex held.
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* Returns 0 on success, a positive error value for any ITS mapping
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* related errors and negative error values for generic errors.
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*/
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static void vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
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u32 devid, u32 eventid)
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static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
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u32 devid, u32 eventid)
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{
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struct kvm_vcpu *vcpu;
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struct its_itte *itte;
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if (!its->enabled)
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return;
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return -EBUSY;
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itte = find_itte(its, devid, eventid);
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/* Triggering an unmapped IRQ gets silently dropped. */
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if (itte && its_is_collection_mapped(itte->collection)) {
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struct kvm_vcpu *vcpu;
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if (!itte || !its_is_collection_mapped(itte->collection))
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return E_ITS_INT_UNMAPPED_INTERRUPT;
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vcpu = kvm_get_vcpu(kvm, itte->collection->target_addr);
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if (vcpu && vcpu->arch.vgic_cpu.lpis_enabled) {
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spin_lock(&itte->irq->irq_lock);
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itte->irq->pending = true;
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vgic_queue_irq_unlock(kvm, itte->irq);
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}
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}
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vcpu = kvm_get_vcpu(kvm, itte->collection->target_addr);
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if (!vcpu)
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return E_ITS_INT_UNMAPPED_INTERRUPT;
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if (!vcpu->arch.vgic_cpu.lpis_enabled)
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return -EBUSY;
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spin_lock(&itte->irq->irq_lock);
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itte->irq->pending = true;
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vgic_queue_irq_unlock(kvm, itte->irq);
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return 0;
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}
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static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev)
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{
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struct vgic_io_device *iodev;
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if (dev->ops != &kvm_io_gic_ops)
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return NULL;
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iodev = container_of(dev, struct vgic_io_device, dev);
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if (iodev->iodev_type != IODEV_ITS)
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return NULL;
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return iodev;
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}
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/*
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* Queries the KVM IO bus framework to get the ITS pointer from the given
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* doorbell address.
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* We then call vgic_its_trigger_msi() with the decoded data.
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* According to the KVM_SIGNAL_MSI API description returns 1 on success.
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*/
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int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
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{
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u64 address;
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struct kvm_io_device *kvm_io_dev;
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struct vgic_io_device *iodev;
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int ret;
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if (!vgic_has_its(kvm))
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return -ENODEV;
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@ -485,15 +509,28 @@ int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
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kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address);
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if (!kvm_io_dev)
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return -ENODEV;
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return -EINVAL;
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iodev = container_of(kvm_io_dev, struct vgic_io_device, dev);
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iodev = vgic_get_its_iodev(kvm_io_dev);
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if (!iodev)
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return -EINVAL;
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mutex_lock(&iodev->its->its_lock);
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vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
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ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
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mutex_unlock(&iodev->its->its_lock);
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return 0;
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if (ret < 0)
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return ret;
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/*
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* KVM_SIGNAL_MSI demands a return value > 0 for success and 0
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* if the guest has blocked the MSI. So we map any LPI mapping
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* related error to that.
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*/
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if (ret)
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return 0;
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else
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return 1;
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}
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/* Requires the its_lock to be held. */
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@ -502,7 +539,8 @@ static void its_free_itte(struct kvm *kvm, struct its_itte *itte)
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list_del(&itte->itte_list);
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/* This put matches the get in vgic_add_lpi. */
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vgic_put_irq(kvm, itte->irq);
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if (itte->irq)
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vgic_put_irq(kvm, itte->irq);
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kfree(itte);
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}
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@ -697,6 +735,7 @@ static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
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struct its_device *device;
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struct its_collection *collection, *new_coll = NULL;
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int lpi_nr;
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struct vgic_irq *irq;
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device = find_its_device(its, device_id);
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if (!device)
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@ -710,6 +749,10 @@ static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
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lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
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return E_ITS_MAPTI_PHYSICALID_OOR;
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/* If there is an existing mapping, behavior is UNPREDICTABLE. */
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if (find_itte(its, device_id, event_id))
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return 0;
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collection = find_collection(its, coll_id);
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if (!collection) {
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int ret = vgic_its_alloc_collection(its, &collection, coll_id);
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@ -718,22 +761,28 @@ static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
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new_coll = collection;
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}
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itte = find_itte(its, device_id, event_id);
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itte = kzalloc(sizeof(struct its_itte), GFP_KERNEL);
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if (!itte) {
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itte = kzalloc(sizeof(struct its_itte), GFP_KERNEL);
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if (!itte) {
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if (new_coll)
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vgic_its_free_collection(its, coll_id);
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return -ENOMEM;
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}
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itte->event_id = event_id;
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list_add_tail(&itte->itte_list, &device->itt_head);
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if (new_coll)
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vgic_its_free_collection(its, coll_id);
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return -ENOMEM;
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}
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itte->event_id = event_id;
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list_add_tail(&itte->itte_list, &device->itt_head);
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itte->collection = collection;
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itte->lpi = lpi_nr;
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itte->irq = vgic_add_lpi(kvm, lpi_nr);
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irq = vgic_add_lpi(kvm, lpi_nr);
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if (IS_ERR(irq)) {
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if (new_coll)
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vgic_its_free_collection(its, coll_id);
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its_free_itte(kvm, itte);
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return PTR_ERR(irq);
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}
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itte->irq = irq;
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update_affinity_itte(kvm, itte);
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/*
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@ -981,9 +1030,7 @@ static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
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u32 msi_data = its_cmd_get_id(its_cmd);
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u64 msi_devid = its_cmd_get_deviceid(its_cmd);
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vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
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return 0;
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return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
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}
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/*
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@ -1288,13 +1335,13 @@ void vgic_enable_lpis(struct kvm_vcpu *vcpu)
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its_sync_lpi_pending_table(vcpu);
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}
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static int vgic_its_init_its(struct kvm *kvm, struct vgic_its *its)
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static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its)
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{
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struct vgic_io_device *iodev = &its->iodev;
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int ret;
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if (its->initialized)
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return 0;
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if (!its->initialized)
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return -EBUSY;
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if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base))
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return -ENXIO;
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@ -1311,9 +1358,6 @@ static int vgic_its_init_its(struct kvm *kvm, struct vgic_its *its)
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KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
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mutex_unlock(&kvm->slots_lock);
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if (!ret)
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its->initialized = true;
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return ret;
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}
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@ -1435,9 +1479,6 @@ static int vgic_its_set_attr(struct kvm_device *dev,
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if (type != KVM_VGIC_ITS_ADDR_TYPE)
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return -ENODEV;
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if (its->initialized)
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return -EBUSY;
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if (copy_from_user(&addr, uaddr, sizeof(addr)))
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return -EFAULT;
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@ -1453,7 +1494,9 @@ static int vgic_its_set_attr(struct kvm_device *dev,
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case KVM_DEV_ARM_VGIC_GRP_CTRL:
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switch (attr->attr) {
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case KVM_DEV_ARM_VGIC_CTRL_INIT:
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return vgic_its_init_its(dev->kvm, its);
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its->initialized = true;
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|
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return 0;
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}
|
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break;
|
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}
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|
@ -1498,3 +1541,30 @@ int kvm_vgic_register_its_device(void)
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return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
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KVM_DEV_TYPE_ARM_VGIC_ITS);
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}
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/*
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* Registers all ITSes with the kvm_io_bus framework.
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* To follow the existing VGIC initialization sequence, this has to be
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* done as late as possible, just before the first VCPU runs.
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*/
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int vgic_register_its_iodevs(struct kvm *kvm)
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{
|
||||
struct kvm_device *dev;
|
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int ret = 0;
|
||||
|
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list_for_each_entry(dev, &kvm->devices, vm_node) {
|
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if (dev->ops != &kvm_arm_vgic_its_ops)
|
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continue;
|
||||
|
||||
ret = vgic_register_its_iodev(kvm, dev->private);
|
||||
if (ret)
|
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return ret;
|
||||
/*
|
||||
* We don't need to care about tearing down previously
|
||||
* registered ITSes, as the kvm_io_bus framework removes
|
||||
* them for us if the VM gets destroyed.
|
||||
*/
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -306,16 +306,19 @@ static void vgic_mmio_write_propbase(struct kvm_vcpu *vcpu,
|
|||
{
|
||||
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
|
||||
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
|
||||
u64 propbaser = dist->propbaser;
|
||||
u64 old_propbaser, propbaser;
|
||||
|
||||
/* Storing a value with LPIs already enabled is undefined */
|
||||
if (vgic_cpu->lpis_enabled)
|
||||
return;
|
||||
|
||||
propbaser = update_64bit_reg(propbaser, addr & 4, len, val);
|
||||
propbaser = vgic_sanitise_propbaser(propbaser);
|
||||
|
||||
dist->propbaser = propbaser;
|
||||
do {
|
||||
old_propbaser = dist->propbaser;
|
||||
propbaser = old_propbaser;
|
||||
propbaser = update_64bit_reg(propbaser, addr & 4, len, val);
|
||||
propbaser = vgic_sanitise_propbaser(propbaser);
|
||||
} while (cmpxchg64(&dist->propbaser, old_propbaser,
|
||||
propbaser) != old_propbaser);
|
||||
}
|
||||
|
||||
static unsigned long vgic_mmio_read_pendbase(struct kvm_vcpu *vcpu,
|
||||
|
@ -331,16 +334,19 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu,
|
|||
unsigned long val)
|
||||
{
|
||||
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
|
||||
u64 pendbaser = vgic_cpu->pendbaser;
|
||||
u64 old_pendbaser, pendbaser;
|
||||
|
||||
/* Storing a value with LPIs already enabled is undefined */
|
||||
if (vgic_cpu->lpis_enabled)
|
||||
return;
|
||||
|
||||
pendbaser = update_64bit_reg(pendbaser, addr & 4, len, val);
|
||||
pendbaser = vgic_sanitise_pendbaser(pendbaser);
|
||||
|
||||
vgic_cpu->pendbaser = pendbaser;
|
||||
do {
|
||||
old_pendbaser = vgic_cpu->pendbaser;
|
||||
pendbaser = old_pendbaser;
|
||||
pendbaser = update_64bit_reg(pendbaser, addr & 4, len, val);
|
||||
pendbaser = vgic_sanitise_pendbaser(pendbaser);
|
||||
} while (cmpxchg64(&vgic_cpu->pendbaser, old_pendbaser,
|
||||
pendbaser) != old_pendbaser);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -289,6 +289,14 @@ int vgic_v3_map_resources(struct kvm *kvm)
|
|||
goto out;
|
||||
}
|
||||
|
||||
if (vgic_has_its(kvm)) {
|
||||
ret = vgic_register_its_iodevs(kvm);
|
||||
if (ret) {
|
||||
kvm_err("Unable to register VGIC ITS MMIO regions\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
dist->ready = true;
|
||||
|
||||
out:
|
||||
|
|
|
@ -117,17 +117,17 @@ static void vgic_irq_release(struct kref *ref)
|
|||
|
||||
void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
|
||||
{
|
||||
struct vgic_dist *dist;
|
||||
struct vgic_dist *dist = &kvm->arch.vgic;
|
||||
|
||||
if (irq->intid < VGIC_MIN_LPI)
|
||||
return;
|
||||
|
||||
if (!kref_put(&irq->refcount, vgic_irq_release))
|
||||
return;
|
||||
|
||||
dist = &kvm->arch.vgic;
|
||||
|
||||
spin_lock(&dist->lpi_list_lock);
|
||||
if (!kref_put(&irq->refcount, vgic_irq_release)) {
|
||||
spin_unlock(&dist->lpi_list_lock);
|
||||
return;
|
||||
};
|
||||
|
||||
list_del(&irq->lpi_list);
|
||||
dist->lpi_list_count--;
|
||||
spin_unlock(&dist->lpi_list_lock);
|
||||
|
|
|
@ -84,6 +84,7 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu);
|
|||
int vgic_v3_probe(const struct gic_kvm_info *info);
|
||||
int vgic_v3_map_resources(struct kvm *kvm);
|
||||
int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t dist_base_address);
|
||||
int vgic_register_its_iodevs(struct kvm *kvm);
|
||||
bool vgic_has_its(struct kvm *kvm);
|
||||
int kvm_vgic_register_its_device(void);
|
||||
void vgic_enable_lpis(struct kvm_vcpu *vcpu);
|
||||
|
@ -140,6 +141,11 @@ static inline int vgic_register_redist_iodevs(struct kvm *kvm,
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int vgic_register_its_iodevs(struct kvm *kvm)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline bool vgic_has_its(struct kvm *kvm)
|
||||
{
|
||||
return false;
|
||||
|
|
Loading…
Reference in a new issue