ath9k: simplify AR9220 fixup code for AR_AN_TOP2 register
Don't modify ah->iniModes, it's supposed to be constant. Instead, apply the fixup when the data is written to the registers. Change ath9k_hw_init_eeprom_fix() to only determine whether the fixup is needed. This allows similteneous support for AR9220 cards that need AR_AN_TOP2 fixup (such as Ubiquiti SR71-12) and those that don't need it (D-Link DWA-552 rev A2). Signed-off-by: Pavel Roskin <proski@gnu.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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2 changed files with 13 additions and 64 deletions
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@ -27,9 +27,6 @@
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static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
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static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan);
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static u32 ath9k_hw_ini_fixup(struct ath_hw *ah,
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struct ar5416_eeprom_def *pEepData,
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u32 reg, u32 value);
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MODULE_AUTHOR("Atheros Communications");
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MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
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@ -844,24 +841,17 @@ static void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
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static void ath9k_hw_init_eeprom_fix(struct ath_hw *ah)
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{
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u32 i, j;
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struct base_eep_header *pBase = &(ah->eeprom.def.baseEepHeader);
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struct ath_common *common = ath9k_hw_common(ah);
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if (ah->hw_version.devid == AR9280_DEVID_PCI) {
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ah->need_an_top2_fixup = (ah->hw_version.devid == AR9280_DEVID_PCI) &&
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(ah->eep_map != EEP_MAP_4KBITS) &&
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((pBase->version & 0xff) > 0x0a) &&
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(pBase->pwdclkind == 0);
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/* EEPROM Fixup */
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for (i = 0; i < ah->iniModes.ia_rows; i++) {
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u32 reg = INI_RA(&ah->iniModes, i, 0);
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for (j = 1; j < ah->iniModes.ia_columns; j++) {
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u32 val = INI_RA(&ah->iniModes, i, j);
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INI_RA(&ah->iniModes, i, j) =
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ath9k_hw_ini_fixup(ah,
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&ah->eeprom.def,
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reg, val);
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}
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}
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}
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if (ah->need_an_top2_fixup)
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ath_print(common, ATH_DBG_EEPROM,
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"needs fixup for AR_AN_TOP2 register\n");
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}
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int ath9k_hw_init(struct ath_hw *ah)
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@ -1305,51 +1295,6 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
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}
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}
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static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah,
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struct ar5416_eeprom_def *pEepData,
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u32 reg, u32 value)
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{
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struct base_eep_header *pBase = &(pEepData->baseEepHeader);
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struct ath_common *common = ath9k_hw_common(ah);
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switch (ah->hw_version.devid) {
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case AR9280_DEVID_PCI:
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if (reg == 0x7894) {
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ath_print(common, ATH_DBG_EEPROM,
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"ini VAL: %x EEPROM: %x\n", value,
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(pBase->version & 0xff));
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if ((pBase->version & 0xff) > 0x0a) {
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ath_print(common, ATH_DBG_EEPROM,
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"PWDCLKIND: %d\n",
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pBase->pwdclkind);
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value &= ~AR_AN_TOP2_PWDCLKIND;
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value |= AR_AN_TOP2_PWDCLKIND &
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(pBase->pwdclkind << AR_AN_TOP2_PWDCLKIND_S);
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} else {
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ath_print(common, ATH_DBG_EEPROM,
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"PWDCLKIND Earlier Rev\n");
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}
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ath_print(common, ATH_DBG_EEPROM,
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"final ini VAL: %x\n", value);
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}
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break;
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}
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return value;
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}
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static u32 ath9k_hw_ini_fixup(struct ath_hw *ah,
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struct ar5416_eeprom_def *pEepData,
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u32 reg, u32 value)
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{
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if (ah->eep_map == EEP_MAP_4KBITS)
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return value;
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else
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return ath9k_hw_def_ini_fixup(ah, pEepData, reg, value);
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}
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static void ath9k_olc_init(struct ath_hw *ah)
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{
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u32 i;
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@ -1455,6 +1400,9 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
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u32 reg = INI_RA(&ah->iniModes, i, 0);
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u32 val = INI_RA(&ah->iniModes, i, modesIndex);
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if (reg == AR_AN_TOP2 && ah->need_an_top2_fixup)
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val &= ~AR_AN_TOP2_PWDCLKIND;
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REG_WRITE(ah, reg, val);
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if (reg >= 0x7800 && reg < 0x78a0
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@ -459,6 +459,7 @@ struct ath_hw {
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bool sw_mgmt_crypto;
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bool is_pciexpress;
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bool need_an_top2_fixup;
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u16 tx_trig_level;
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u16 rfsilent;
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u32 rfkill_gpio;
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