Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Convert INTC2 to IRQ table registration.
  sh: Updates for irq-flow-type naming changes.
  sh: Add some missing board headers.
  sh: Fix exception_handling_table alignment.
  sh: Cleanup board header directories.
  sh: Remove board-specific ide.h headers.
  sh: Proper show_stack/show_trace() implementation.
This commit is contained in:
Linus Torvalds 2006-10-23 07:50:00 -07:00
commit 2e11665c5e
46 changed files with 289 additions and 409 deletions

View file

@ -14,7 +14,7 @@
#include <asm/io.h>
#include <asm/apm.h>
#include <asm/adc.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#define SH7709_PGDR 0xa400012c

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@ -12,7 +12,7 @@
#include <linux/time.h>
#include <asm/io.h>
#include <asm/hd64461.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#include <asm/cpu/dac.h>
#include <asm/pm.h>

View file

@ -13,7 +13,7 @@
#include <asm/hd64461.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#include <asm/cpu/dac.h>
#define SCPCR 0xa4000116

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@ -15,7 +15,7 @@
#include <linux/module.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/hs7751rvoip/hs7751rvoip.h>
#include <asm/hs7751rvoip.h>
#include <asm/addrspace.h>
extern void *area6_io8_base; /* Area 6 8bit I/O Base address */

View file

@ -14,7 +14,7 @@
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hs7751rvoip/hs7751rvoip.h>
#include <asm/hs7751rvoip.h>
static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};

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@ -10,15 +10,10 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/pm.h>
#include <asm/hs7751rvoip.h>
#include <asm/io.h>
#include <asm/hs7751rvoip/hs7751rvoip.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
#include <asm/irq.h>
static void __init hs7751rvoip_init_irq(void)
{

View file

@ -11,7 +11,7 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/r7780rp/r7780rp.h>
#include <asm/r7780rp.h>
#include <asm/addrspace.h>
#include <asm/io.h>

View file

@ -10,7 +10,8 @@
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#ifdef CONFIG_SH_R7780MP
static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
@ -32,7 +33,7 @@ static void disable_r7780rp_irq(unsigned int irq)
}
static struct irq_chip r7780rp_irq_chip __read_mostly = {
.name = "r7780rp",
.name = "R7780RP",
.mask = disable_r7780rp_irq,
.unmask = enable_r7780rp_irq,
.mask_ack = disable_r7780rp_irq,
@ -47,8 +48,8 @@ void __init init_r7780rp_IRQ(void)
for (i = 0; i < 15; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler(i, &r7780rp_irq_chip,
handle_level_irq);
set_irq_chip_and_handler_name(i, &r7780rp_irq_chip,
handle_level_irq, "level");
enable_r7780rp_irq(i);
}
}

View file

@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/r7780rp/r7780rp.h>
#include <asm/r7780rp.h>
#include <asm/clock.h>
#include <asm/io.h>

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@ -11,8 +11,8 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include <asm/addrspace.h>
/*

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@ -8,12 +8,10 @@
* Modified for RTS7751R2D by
* Atom Create Engineering Co., Ltd. 2002.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#if defined(CONFIG_RTS7751R2D_REV11)
static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0};

View file

@ -8,13 +8,9 @@
*
* This file contains Renesas Technology Sales RTS7751R2D specific LED code.
*/
#include <asm/io.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#ifdef CONFIG_HEARTBEAT
#include <linux/io.h>
#include <linux/sched.h>
#include <asm/rts7751r2d.h>
/* Cycle the LED's in the clasic Knightriger/Sun pattern */
void heartbeat_rts7751r2d(void)
@ -46,10 +42,3 @@ void heartbeat_rts7751r2d(void)
else
bit--;
}
#endif /* CONFIG_HEARTBEAT */
void rts7751r2d_led(unsigned short value)
{
ctrl_outw(value, PA_OUTPORT);
}

View file

@ -12,9 +12,9 @@
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/pm.h>
#include <asm/io.h>
#include <asm/machvec.h>
#include <asm/mach/rts7751r2d.h>
#include <asm/io.h>
#include <asm/voyagergx.h>
extern void heartbeat_rts7751r2d(void);

View file

@ -7,7 +7,7 @@
*/
#include <linux/init.h>
#include <asm/machvec.h>
#include <asm/shmin/shmin.h>
#include <asm/shmin.h>
#include <asm/clock.h>
#include <asm/irq.h>
#include <asm/io.h>

View file

@ -17,29 +17,18 @@
Copyright 2003 (c) Lineo uSolutions,Inc.
*/
/* -------------------------------------------------------------------- */
#undef DEBUG
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/io.h>
#include <asm/voyagergx.h>
#include <asm/rts7751r2d.h>
static void disable_voyagergx_irq(unsigned int irq)
{
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = inl(VOYAGER_INT_MASK);
val &= ~mask;
outl(val, VOYAGER_INT_MASK);
@ -50,7 +39,7 @@ static void enable_voyagergx_irq(unsigned int irq)
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = inl(VOYAGER_INT_MASK);
val |= mask;
outl(val, VOYAGER_INT_MASK);
@ -137,7 +126,7 @@ int voyagergx_irq_demux(int irq)
} else {
printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
}
pr_debug("voyagergx_irq_demux %d \n", i);
pr_debug("voyagergx_irq_demux %ld\n", i);
#else
for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
if (val & bit)
@ -185,4 +174,3 @@ void __init setup_voyagergx_irq(void)
setup_irq(IRQ_VOYAGER, &irq0);
}

View file

@ -13,7 +13,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/r7780rp/r7780rp.h>
#include <asm/r7780rp.h>
#include <asm/io.h>
#include "pci-sh4.h"

View file

@ -10,28 +10,24 @@
*
* PCI initialization for the Renesas SH7751R RTS7751R2D board
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/rts7751r2d/rts7751r2d.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include "pci-sh4.h"
static u8 rts7751r2d_irq_tab[] __initdata = {
IRQ_PCISLOT1,
IRQ_PCISLOT2,
IRQ_PCMCIA,
IRQ_PCIETH,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
switch (slot) {
case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */
case 1: return IRQ_PCISLOT2; /* PCI Extend slot #2 */
case 2: return IRQ_PCMCIA; /* PCI Cardbus Bridge */
case 3: return IRQ_PCIETH; /* Realtek Ethernet controller */
default:
printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
return -1;
}
return rts7751r2d_irq_tab[slot];
}
static struct resource sh7751_io_resource = {

View file

@ -11,10 +11,9 @@
* Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/system.h>
#include <asm/io.h>
static void disable_intc2_irq(unsigned int irq)
{
@ -31,7 +30,7 @@ static void enable_intc2_irq(unsigned int irq)
}
static struct irq_chip intc2_irq_chip = {
.typename = "intc2",
.name = "INTC2",
.mask = disable_intc2_irq,
.unmask = enable_intc2_irq,
.mask_ack = disable_intc2_irq,
@ -45,150 +44,36 @@ static struct irq_chip intc2_irq_chip = {
* PIO1 which is INTPRI00[19,16] and INTMSK00[13]
* would be: ^ ^ ^ ^
* | | | |
* make_intc2_irq(84, 0, 16, 0, 13);
* { 84, 0, 16, 0, 13 },
*
* in the intc2_data table.
*/
void make_intc2_irq(struct intc2_data *p)
void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
{
unsigned int flags;
unsigned long ipr;
int i;
for (i = 0; i < nr_irqs; i++) {
unsigned long ipr, flags;
struct intc2_data *p = table + i;
disable_irq_nosync(p->irq);
/* Set the priority level */
local_irq_save(flags);
ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET + p->ipr_offset);
ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET +
p->ipr_offset);
ipr &= ~(0xf << p->ipr_shift);
ipr |= p->priority << p->ipr_shift;
ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET + p->ipr_offset);
ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET +
p->ipr_offset);
local_irq_restore(flags);
set_irq_chip_and_handler(p->irq, &intc2_irq_chip, handle_level_irq);
set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
handle_level_irq, "level");
set_irq_chip_data(p->irq, p);
enable_intc2_irq(p->irq);
}
static struct intc2_data intc2_irq_table[] = {
#if defined(CONFIG_CPU_SUBTYPE_ST40)
{64, 0, 0, 0, 0, 13}, /* PCI serr */
{65, 0, 4, 0, 1, 13}, /* PCI err */
{66, 0, 4, 0, 2, 13}, /* PCI ad */
{67, 0, 4, 0, 3, 13}, /* PCI pwd down */
{72, 0, 8, 0, 5, 13}, /* DMAC INT0 */
{73, 0, 8, 0, 6, 13}, /* DMAC INT1 */
{74, 0, 8, 0, 7, 13}, /* DMAC INT2 */
{75, 0, 8, 0, 8, 13}, /* DMAC INT3 */
{76, 0, 8, 0, 9, 13}, /* DMAC INT4 */
{78, 0, 8, 0, 11, 13}, /* DMAC ERR */
{80, 0, 12, 0, 12, 13}, /* PIO0 */
{84, 0, 16, 0, 13, 13}, /* PIO1 */
{88, 0, 20, 0, 14, 13}, /* PIO2 */
{112, 4, 0, 4, 0, 13}, /* Mailbox */
#ifdef CONFIG_CPU_SUBTYPE_ST40GX1
{116, 4, 4, 4, 4, 13}, /* SSC0 */
{120, 4, 8, 4, 8, 13}, /* IR Blaster */
{124, 4, 12, 4, 12, 13}, /* USB host */
{128, 4, 16, 4, 16, 13}, /* Video processor BLITTER */
{132, 4, 20, 4, 20, 13}, /* UART0 */
{134, 4, 20, 4, 22, 13}, /* UART2 */
{136, 4, 24, 4, 24, 13}, /* IO_PIO0 */
{140, 4, 28, 4, 28, 13}, /* EMPI */
{144, 8, 0, 8, 0, 13}, /* MAFE */
{148, 8, 4, 8, 4, 13}, /* PWM */
{152, 8, 8, 8, 8, 13}, /* SSC1 */
{156, 8, 12, 8, 12, 13}, /* IO_PIO1 */
{160, 8, 16, 8, 16, 13}, /* USB target */
{164, 8, 20, 8, 20, 13}, /* UART1 */
{168, 8, 24, 8, 24, 13}, /* Teletext */
{172, 8, 28, 8, 28, 13}, /* VideoSync VTG */
{173, 8, 28, 8, 29, 13}, /* VideoSync DVP0 */
{174, 8, 28, 8, 30, 13}, /* VideoSync DVP1 */
#endif
#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
/*
* SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
*/
/* INTPRIO0 | INTMSK0 */
{48, 0, 28, 0, 31, 3}, /* IRQ 4 */
{49, 0, 24, 0, 30, 3}, /* IRQ 3 */
{50, 0, 20, 0, 29, 3}, /* IRQ 2 */
{51, 0, 16, 0, 28, 3}, /* IRQ 1 */
/* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
/* INTPRIO4 | INTMSK0 */
{56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
{57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
{58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
{59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
{60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
{61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
{62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
{63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
/* INTPRIO8 | INTMSK0 */
{52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
{53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
{54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
{55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
{64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
{65, 8, 24, 0, 16, 3}, /* LCDC */
/* 66, 67 unused */
{68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
{69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
{70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
/* 71 unused */
{72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
{73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
{74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
{75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
{76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
{77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
{78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
{79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
/* | INTMSK4 */
{80, 8, 4, 4, 23, 3}, /* SIM_ERI */
{81, 8, 4, 4, 22, 3}, /* SIM_RXI */
{82, 8, 4, 4, 21, 3}, /* SIM_TXI */
{83, 8, 4, 4, 20, 3}, /* SIM_TEI */
{84, 8, 0, 4, 19, 3}, /* HSPII */
/* INTPRIOC | INTMSK4 */
/* 85-87 unused/reserved */
{88, 12, 20, 4, 18, 3}, /* MMCI0 */
{89, 12, 20, 4, 17, 3}, /* MMCI1 */
{90, 12, 20, 4, 16, 3}, /* MMCI2 */
{91, 12, 20, 4, 15, 3}, /* MMCI3 */
{92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
/* 93-107 reserved/undocumented */
{108,12, 4, 4, 1, 3}, /* ADC */
{109,12, 0, 4, 0, 3}, /* CMTI */
/* 110-111 reserved/unused */
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
{ TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2},
{ 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
{ PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
{ PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
{ PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
{ PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
#endif
};
void __init init_IRQ_intc2(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++)
make_intc2_irq(intc2_irq_table + i);
}
}

View file

@ -44,7 +44,7 @@ static void enable_ipr_irq(unsigned int irq)
}
static struct irq_chip ipr_irq_chip = {
.name = "ipr",
.name = "IPR",
.mask = disable_ipr_irq,
.unmask = enable_ipr_irq,
.mask_ack = disable_ipr_irq,
@ -60,7 +60,8 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
ipr_data.shift = pos*4; /* POSition (0-3) x 4 means shift */
ipr_data.priority = priority;
set_irq_chip_and_handler(irq, &ipr_irq_chip, handle_level_irq);
set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
handle_level_irq, "level");
set_irq_chip_data(irq, &ipr_data);
enable_ipr_irq(irq);

View file

@ -4,7 +4,7 @@
* The SH-3 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
* Copyright (C) 2003 Paul Mundt
* Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -49,3 +49,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
/*
* Pad the remainder of the table out, exceptions residing in far
* away offsets can be manually inserted in to their appropriate
* location via set_exception_table_{evt,vec}().
*/
.balign 4096,0,4096

View file

@ -4,7 +4,7 @@
* The SH-4 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
* Copyright (C) 2003 Paul Mundt
* Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -53,3 +53,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
/*
* Pad the remainder of the table out, exceptions residing in far
* away offsets can be manually inserted in to their appropriate
* location via set_exception_table_{evt,vec}().
*/
.balign 4096,0,4096

View file

@ -51,3 +51,66 @@ static int __init sh7760_devices_setup(void)
ARRAY_SIZE(sh7760_devices));
}
__initcall(sh7760_devices_setup);
/*
* SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
*/
static struct intc2_data intc2_irq_table[] = {
/* INTPRIO0 | INTMSK0 */
{48, 0, 28, 0, 31, 3}, /* IRQ 4 */
{49, 0, 24, 0, 30, 3}, /* IRQ 3 */
{50, 0, 20, 0, 29, 3}, /* IRQ 2 */
{51, 0, 16, 0, 28, 3}, /* IRQ 1 */
/* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
/* INTPRIO4 | INTMSK0 */
{56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
{57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
{58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
{59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
{60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
{61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
{62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
{63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
/* INTPRIO8 | INTMSK0 */
{52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
{53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
{54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
{55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
{64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
{65, 8, 24, 0, 16, 3}, /* LCDC */
/* 66, 67 unused */
{68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
{69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
{70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
/* 71 unused */
{72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
{73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
{74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
{75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
{76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
{77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
{78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
{79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
/* | INTMSK4 */
{80, 8, 4, 4, 23, 3}, /* SIM_ERI */
{81, 8, 4, 4, 22, 3}, /* SIM_RXI */
{82, 8, 4, 4, 21, 3}, /* SIM_TXI */
{83, 8, 4, 4, 20, 3}, /* SIM_TEI */
{84, 8, 0, 4, 19, 3}, /* HSPII */
/* INTPRIOC | INTMSK4 */
/* 85-87 unused/reserved */
{88, 12, 20, 4, 18, 3}, /* MMCI0 */
{89, 12, 20, 4, 17, 3}, /* MMCI1 */
{90, 12, 20, 4, 16, 3}, /* MMCI2 */
{91, 12, 20, 4, 15, 3}, /* MMCI3 */
{92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
/* 93-107 reserved/undocumented */
{108,12, 4, 4, 1, 3}, /* ADC */
{109,12, 0, 4, 0, 3}, /* CMTI */
/* 110-111 reserved/unused */
};
void __init init_IRQ_intc2(void)
{
make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
}

View file

@ -77,3 +77,30 @@ static int __init sh7780_devices_setup(void)
ARRAY_SIZE(sh7780_devices));
}
__initcall(sh7780_devices_setup);
static struct intc2_data intc2_irq_table[] = {
{ TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2 },
{ 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
{ SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
{ SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
{ PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
{ PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
{ PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
{ PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
{ PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
};
void __init init_IRQ_intc2(void)
{
make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
}

View file

@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v)
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
seq_printf(p, " %14s", irq_desc[i].chip->name);
seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
seq_printf(p, "-%-8s", irq_desc[i].name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)

View file

@ -105,7 +105,7 @@ void show_regs(struct pt_regs * regs)
{
printk("\n");
printk("Pid : %d, Comm: %20s\n", current->pid, current->comm);
print_symbol("PC is at %s\n", regs->pc);
print_symbol("PC is at %s\n", instruction_pointer(regs));
printk("PC : %08lx SP : %08lx SR : %08lx ",
regs->pc, regs->regs[15], regs->sr);
#ifdef CONFIG_MMU
@ -130,15 +130,7 @@ void show_regs(struct pt_regs * regs)
printk("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n",
regs->mach, regs->macl, regs->gbr, regs->pr);
/*
* If we're in kernel mode, dump the stack too..
*/
if (!user_mode(regs)) {
extern void show_task(unsigned long *sp);
unsigned long sp = regs->regs[15];
show_task((unsigned long *)sp);
}
show_trace(NULL, (unsigned long *)regs->regs[15], regs);
}
/*

View file

@ -1,38 +1,25 @@
/* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $
*
* linux/arch/sh/traps.c
/*
* 'traps.c' handles hardware traps and faults after we have saved some
* state in 'entry.S'.
*
* SuperH version: Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf
* Copyright (C) 2000 David Howells
* Copyright (C) 2002, 2003 Paul Mundt
* Copyright (C) 2002 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
/*
* 'Traps.c' handles hardware traps and faults after we have saved some
* state in 'entry.S'.
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
#include <linux/io.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/atomic.h>
#include <asm/processor.h>
#include <asm/sections.h>
#ifdef CONFIG_SH_KGDB
#include <asm/kgdb.h>
@ -53,13 +40,32 @@
#define TRAP_ILLEGAL_SLOT_INST 13
#endif
/*
* These constants are for searching for possible module text
* segments. VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
* a guess of how much space is likely to be vmalloced.
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define MODULE_RANGE (8*1024*1024)
static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
{
unsigned long p;
int i;
printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
for (p = bottom & ~31; p < top; ) {
printk("%04lx: ", p & 0xffff);
for (i = 0; i < 8; i++, p += 4) {
unsigned int val;
if (p < bottom || p >= top)
printk(" ");
else {
if (__get_user(val, (unsigned int __user *)p)) {
printk("\n");
return;
}
printk("%08x ", val);
}
}
printk("\n");
}
}
DEFINE_SPINLOCK(die_lock);
@ -69,14 +75,28 @@ void die(const char * str, struct pt_regs * regs, long err)
console_verbose();
spin_lock_irq(&die_lock);
bust_spinlocks(1);
printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
CHK_REMOTE_DEBUG(regs);
print_modules();
show_regs(regs);
printk("Process: %s (pid: %d, stack limit = %p)\n",
current->comm, current->pid, task_stack_page(current) + 1);
if (!user_mode(regs) || in_interrupt())
dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
(unsigned long)task_stack_page(current));
bust_spinlocks(0);
spin_unlock_irq(&die_lock);
do_exit(SIGSEGV);
}
static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
static inline void die_if_kernel(const char *str, struct pt_regs *regs,
long err)
{
if (!user_mode(regs))
die(str, regs, err);
@ -93,8 +113,7 @@ static int handle_unaligned_notify_count = 10;
*/
static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
{
if (!user_mode(regs))
{
if (!user_mode(regs)) {
const struct exception_table_entry *fixup;
fixup = search_exception_tables(regs->pc);
if (fixup) {
@ -550,7 +569,10 @@ int is_dsp_inst(struct pt_regs *regs)
#define is_dsp_inst(regs) (0)
#endif /* CONFIG_SH_DSP */
extern int do_fpu_inst(unsigned short, struct pt_regs*);
/* arch/sh/kernel/cpu/sh4/fpu.c */
extern int do_fpu_inst(unsigned short, struct pt_regs *);
extern asmlinkage void do_fpu_state_restore(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7, struct pt_regs regs);
asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
@ -709,14 +731,20 @@ void __init per_cpu_trap_init(void)
: "memory");
}
void __init trap_init(void)
void *set_exception_table_vec(unsigned int vec, void *handler)
{
extern void *exception_handling_table[];
void *old_handler;
exception_handling_table[TRAP_RESERVED_INST]
= (void *)do_reserved_inst;
exception_handling_table[TRAP_ILLEGAL_SLOT_INST]
= (void *)do_illegal_slot_inst;
old_handler = exception_handling_table[vec];
exception_handling_table[vec] = handler;
return old_handler;
}
void __init trap_init(void)
{
set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
defined(CONFIG_SH_FPU_EMU)
@ -725,21 +753,42 @@ void __init trap_init(void)
* reserved. They'll be handled in the math-emu case, or faulted on
* otherwise.
*/
/* entry 64 corresponds to EXPEVT=0x800 */
exception_handling_table[64] = (void *)do_reserved_inst;
exception_handling_table[65] = (void *)do_illegal_slot_inst;
set_exception_table_evt(0x800, do_reserved_inst);
set_exception_table_evt(0x820, do_illegal_slot_inst);
#elif defined(CONFIG_SH_FPU)
set_exception_table_evt(0x800, do_fpu_state_restore);
set_exception_table_evt(0x820, do_fpu_state_restore);
#endif
/* Setup VBR for boot cpu */
per_cpu_trap_init();
}
void show_trace(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs)
{
unsigned long addr;
if (regs && user_mode(regs))
return;
printk("\nCall trace: ");
#ifdef CONFIG_KALLSYMS
printk("\n");
#endif
while (!kstack_end(sp)) {
addr = *sp++;
if (kernel_text_address(addr))
print_ip_sym(addr);
}
printk("\n");
}
void show_stack(struct task_struct *tsk, unsigned long *sp)
{
unsigned long *stack, addr;
unsigned long module_start = VMALLOC_START;
unsigned long module_end = VMALLOC_END;
int i = 1;
unsigned long stack;
if (!tsk)
tsk = current;
@ -748,38 +797,10 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
else
sp = (unsigned long *)tsk->thread.sp;
stack = sp;
printk("\nCall trace: ");
#ifdef CONFIG_KALLSYMS
printk("\n");
#endif
while (!kstack_end(stack)) {
addr = *stack++;
if (((addr >= (unsigned long)_text) &&
(addr <= (unsigned long)_etext)) ||
((addr >= module_start) && (addr <= module_end))) {
/*
* For 80-columns display, 6 entry is maximum.
* NOTE: '[<8c00abcd>] ' consumes 13 columns .
*/
#ifndef CONFIG_KALLSYMS
if (i && ((i % 6) == 0))
printk("\n ");
#endif
printk("[<%08lx>] ", addr);
print_symbol("%s\n", addr);
i++;
}
}
printk("\n");
}
void show_task(unsigned long *sp)
{
show_stack(NULL, sp);
stack = (unsigned long)sp;
dump_mem("Stack: ", stack, THREAD_SIZE +
(unsigned long)task_stack_page(tsk));
show_trace(tsk, sp, NULL);
}
void dump_stack(void)

View file

@ -6,7 +6,7 @@
#include <asm/io.h>
#include <asm/delay.h>
#include <asm/adc.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#define MODNAME "hp680_ts_input"

View file

@ -29,7 +29,6 @@
#include <asm/io.h>
#include <asm/hd64461.h>
#include <asm/cpu/dac.h>
#include <asm/hp6xx/hp6xx.h>
#define WIDTH 640

View file

@ -1,8 +0,0 @@
#ifndef __ASM_SH_HP6XX_IDE_H
#define __ASM_SH_HP6XX_IDE_H
#define IRQ_CFCARD 93
#define IRQ_PCMCIA 94
#endif /* __ASM_SH_HP6XX_IDE_H */

View file

@ -1,10 +0,0 @@
#ifndef __ASM_SH_HP6XX_IO_H
#define __ASM_SH_HP6XX_IO_H
/*
* Nothing special here.. just use the generic cchip io routines.
*/
#include <asm/hd64461.h>
#endif /* __ASM_SH_HP6XX_IO_H */

View file

@ -1,8 +0,0 @@
#ifndef __ASM_SH_HS7751RVOIP_IDE_H
#define __ASM_SH_HS7751RVOIP_IDE_H
/* Nothing to see here.. */
#include <asm/hs7751rvoip/hs7751rvoip.h>
#endif /* __ASM_SH_HS7751RVOIP_IDE_H */

View file

@ -6,16 +6,6 @@
*
* Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp>
*/
#ifdef CONFIG_IDE
# ifndef IRQ_CFCARD
# define IRQ_CFCARD 14
# endif
# ifndef IRQ_PCMCIA
# define IRQ_PCMCIA 15
# endif
#endif
#define INTC_BASE 0xffd00000
#define INTC_ICR0 (INTC_BASE+0x0)
#define INTC_ICR1 (INTC_BASE+0x1c)

View file

@ -14,16 +14,6 @@
#include <asm/machvec.h>
#include <asm/ptrace.h> /* for pt_regs */
#if defined(CONFIG_SH_HP6XX) || \
defined(CONFIG_SH_RTS7751R2D) || \
defined(CONFIG_SH_HS7751RVOIP) || \
defined(CONFIG_SH_HS7751RVOIP) || \
defined(CONFIG_SH_SH03) || \
defined(CONFIG_SH_R7780RP) || \
defined(CONFIG_SH_LANDISK)
#include <asm/mach/ide.h>
#endif
#ifndef CONFIG_CPU_SUBTYPE_SH7780
#define INTC_DMAC0_MSK 0
@ -38,15 +28,6 @@
#define INTC_IPRD 0xffd00010UL
#endif
#ifdef CONFIG_IDE
# ifndef IRQ_CFCARD
# define IRQ_CFCARD 14
# endif
# ifndef IRQ_PCMCIA
# define IRQ_PCMCIA 15
# endif
#endif
#define TIMER_IRQ 16
#define TIMER_IPR_ADDR INTC_IPRA
#define TIMER_IPR_POS 3
@ -704,7 +685,7 @@ struct intc2_data {
unsigned char priority;
};
void make_intc2_irq(struct intc2_data *);
void make_intc2_irq(struct intc2_data *, unsigned int nr_irqs);
void init_IRQ_intc2(void);
#endif

View file

@ -1,14 +0,0 @@
/*
* modifed by kogiidena
* 2005.03.03
*/
#ifndef __ASM_SH_LANDISK_IDE_H
#define __ASM_SH_LANDISK_IDE_H
/* Nothing to see here.. */
#include <asm/landisk/iodata_landisk.h>
#define IRQ_CFCARD IRQ_FATA /* CF Card IRQ */
#define IRQ_PCMCIA IRQ_ATA /* PCMCIA IRQ */
#endif /* __ASM_SH_LANDISK_IDE_H */

View file

@ -255,6 +255,8 @@ extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
*/
#define thread_saved_pc(tsk) (tsk->thread.pc)
void show_trace(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs);
extern unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) ((tsk)->thread.pc)

View file

@ -72,8 +72,6 @@
#define PA_AX88796L 0xa4100400 /* AX88796L Area */
#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
@ -83,7 +81,6 @@
#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */
#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */
#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */
#define IRQ_CFCARD 1 /* CF Card IRQ */
// #define IRQ_CFINST 0 /* CF Card Insert IRQ */
#define IRQ_TP 2 /* Touch Panel IRQ */
#define IRQ_SCI1 3 /* SCI1 IRQ */
@ -146,8 +143,6 @@
#define PA_AX88796L 0xa5800400 /* AX88796L Area */
#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
@ -157,7 +152,6 @@
#define IRQ_PCISLOT2 1 /* PCI Slot #2 IRQ */
#define IRQ_PCISLOT3 2 /* PCI Slot #3 IRQ */
#define IRQ_PCISLOT4 3 /* PCI Slot #4 IRQ */
#define IRQ_CFCARD 4 /* CF Card IRQ */
#define IRQ_CFINST 5 /* CF Card Insert IRQ */
#define IRQ_M66596 6 /* M66596 IRQ */
#define IRQ_SDCARD 7 /* SD Card IRQ */

View file

@ -1,8 +0,0 @@
#ifndef __ASM_SH_R7780RP_IDE_H
#define __ASM_SH_R7780RP_IDE_H
/* Nothing to see here.. */
#include <asm/mach/r7780rp.h>
#endif /* __ASM_SH_R7780RP_IDE_H */

View file

@ -1,8 +0,0 @@
#ifndef __ASM_SH_RTS7751R2D_IDE_H
#define __ASM_SH_RTS7751R2D_IDE_H
/* Nothing to see here.. */
#include <asm/rts7751r2d/rts7751r2d.h>
#endif /* __ASM_SH_RTS7751R2D_IDE_H */

View file

@ -1,7 +0,0 @@
#ifndef __ASM_SH_SH03_IDE_H
#define __ASM_SH_SH03_IDE_H
#define IRQ_CFCARD 8
#define IRQ_PCMCIA 8
#endif /* __ASM_SH_SH03_IDE_H */

View file

@ -353,6 +353,13 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
(unsigned long)_n_, sizeof(*(ptr))); \
})
extern void *set_exception_table_vec(unsigned int vec, void *handler);
static inline void *set_exception_table_evt(unsigned int evt, void *handler)
{
return set_exception_table_vec(evt >> 5, handler);
}
/* XXX
* disable hlt during certain critical i/o operations
*/

View file

@ -26,7 +26,7 @@
#include <asm/cpu/dac.h>
#include <asm/cpu/timer.h>
#include <asm/machvec.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/hp6xx.h>
#include <asm/hd64461.h>
#define MODNAME "sh_dac_audio"