From 46f8c3c7e95c0d30d95911e7975ddc4f93b3e237 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Fri, 7 Oct 2011 03:08:44 -0600 Subject: [PATCH 1/2] ARM: OMAP: ctrl: Fix CONTROL_DSIPHY register fields Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The OMAP4430 Public TRM vV has these fields mentioned correctly. Signed-off-by: Archit Taneja Acked-by: Benoit Cousson Acked-by: Santosh Shilimkar Signed-off-by: Paul Walmsley --- .../mach-omap2/include/mach/ctrl_module_pad_core_44xx.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h index c88420de1151..1e2d3322f33e 100644 --- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h @@ -941,10 +941,10 @@ #define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29) #define OMAP4_DSI1_LANEENABLE_SHIFT 24 #define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24) -#define OMAP4_DSI1_PIPD_SHIFT 19 -#define OMAP4_DSI1_PIPD_MASK (0x1f << 19) -#define OMAP4_DSI2_PIPD_SHIFT 14 -#define OMAP4_DSI2_PIPD_MASK (0x1f << 14) +#define OMAP4_DSI2_PIPD_SHIFT 19 +#define OMAP4_DSI2_PIPD_MASK (0x1f << 19) +#define OMAP4_DSI1_PIPD_SHIFT 14 +#define OMAP4_DSI1_PIPD_MASK (0x1f << 14) /* CONTROL_MCBSPLP */ #define OMAP4_ALBCTRLRX_FSX_SHIFT 31 From 7e89098cd63a188932043258d54688e965750e2c Mon Sep 17 00:00:00 2001 From: Abhilash K V Date: Fri, 7 Oct 2011 03:08:56 -0600 Subject: [PATCH 2/2] ARM: OMAP: AM35x: remove hwmods that aren't generic Removing modules iva, sr1_hwmod, sr2_hwmod, mailbox from the base omap3xxx_hwmods list, so that they can be excluded for am35x. This removes quite a few warnings on boot for AM35x. Signed-off-by: Abhilash K V [paul@pwsan.com: dropped 'mailbox class' comments; updated changelog] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ab35acbc2d1d..ac12cd5fb073 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -3132,7 +3132,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_mmc2_hwmod, &omap3xxx_mmc3_hwmod, &omap3xxx_mpu_hwmod, - &omap3xxx_iva_hwmod, &omap3xxx_timer1_hwmod, &omap3xxx_timer2_hwmod, @@ -3161,8 +3160,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_i2c1_hwmod, &omap3xxx_i2c2_hwmod, &omap3xxx_i2c3_hwmod, - &omap34xx_sr1_hwmod, - &omap34xx_sr2_hwmod, /* gpio class */ &omap3xxx_gpio1_hwmod, @@ -3184,8 +3181,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_mcbsp2_sidetone_hwmod, &omap3xxx_mcbsp3_sidetone_hwmod, - /* mailbox class */ - &omap3xxx_mailbox_hwmod, /* mcspi class */ &omap34xx_mcspi1, @@ -3198,31 +3193,39 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { /* 3430ES1-only hwmods */ static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { + &omap3xxx_iva_hwmod, &omap3430es1_dss_core_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; /* 3430ES2+-only hwmods */ static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { + &omap3xxx_iva_hwmod, &omap3xxx_dss_core_hwmod, &omap3xxx_usbhsotg_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; /* 34xx-only hwmods (all ES revisions) */ static __initdata struct omap_hwmod *omap34xx_hwmods[] = { + &omap3xxx_iva_hwmod, &omap34xx_sr1_hwmod, &omap34xx_sr2_hwmod, + &omap3xxx_mailbox_hwmod, NULL }; /* 36xx-only hwmods (all ES revisions) */ static __initdata struct omap_hwmod *omap36xx_hwmods[] = { + &omap3xxx_iva_hwmod, &omap3xxx_uart4_hwmod, &omap3xxx_dss_core_hwmod, &omap36xx_sr1_hwmod, &omap36xx_sr2_hwmod, &omap3xxx_usbhsotg_hwmod, + &omap3xxx_mailbox_hwmod, NULL };