ath5k: Implement antenna control
* Add code to support the various antenna scenarios supported by hw * For now hardcode the default scenario (single or dual omnis with tx/rx diversity working and tx antenna handled by session -hw keeps track on which antenna it got ack from each ap/station and maps each ap/station to one of the antennas-). Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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8 changed files with 271 additions and 51 deletions
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@ -209,7 +209,6 @@
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#define AR5K_TUNE_MAX_TXPOWER 63
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#define AR5K_TUNE_DEFAULT_TXPOWER 25
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#define AR5K_TUNE_TPC_TXPOWER false
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#define AR5K_TUNE_ANT_DIVERSITY true
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#define AR5K_TUNE_HWTXTRIES 4
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#define AR5K_INIT_CARR_SENSE_EN 1
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@ -420,6 +419,17 @@ enum ath5k_driver_mode {
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AR5K_MODE_MAX = 5
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};
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enum ath5k_ant_mode {
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AR5K_ANTMODE_DEFAULT = 0, /* default antenna setup */
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AR5K_ANTMODE_FIXED_A = 1, /* only antenna A is present */
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AR5K_ANTMODE_FIXED_B = 2, /* only antenna B is present */
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AR5K_ANTMODE_SINGLE_AP = 3, /* sta locked on a single ap */
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AR5K_ANTMODE_SECTOR_AP = 4, /* AP with tx antenna set on tx desc */
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AR5K_ANTMODE_SECTOR_STA = 5, /* STA with tx antenna set on tx desc */
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AR5K_ANTMODE_DEBUG = 6, /* Debug mode -A -> Rx, B-> Tx- */
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AR5K_ANTMODE_MAX,
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};
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/****************\
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TX DEFINITIONS
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@ -1051,8 +1061,11 @@ struct ath5k_hw {
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bool ah_software_retry;
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u32 ah_limit_tx_retries;
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u32 ah_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
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bool ah_ant_diversity;
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/* Antenna Control */
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u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
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u8 ah_ant_mode;
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u8 ah_tx_ant;
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u8 ah_def_ant;
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u8 ah_sta_id[ETH_ALEN];
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@ -1267,9 +1280,11 @@ extern int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct ieee80211_channel
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extern int ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq);
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/* Misc PHY functions */
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extern u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan);
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extern void ath5k_hw_set_def_antenna(struct ath5k_hw *ah, unsigned int ant);
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extern unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah);
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extern int ath5k_hw_phy_disable(struct ath5k_hw *ah);
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/* Antenna control */
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extern void ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode);
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extern void ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant);
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extern unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah);
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/* TX power setup */
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extern int ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, u8 ee_mode, u8 txpower);
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extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower);
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@ -133,7 +133,6 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
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ah->ah_cw_min = AR5K_TUNE_CWMIN;
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ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;
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ah->ah_software_retry = false;
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ah->ah_ant_diversity = AR5K_TUNE_ANT_DIVERSITY;
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/*
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* Set the mac version based on the pci id
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@ -1279,7 +1279,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
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ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL,
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(sc->power_level * 2),
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hw_rate,
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info->control.rates[0].count, keyidx, 0, flags,
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info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
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cts_rate, duration);
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if (ret)
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goto err_unmap;
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@ -2009,7 +2009,8 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct ath5k_hw *ah = sc->ah;
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struct ath5k_desc *ds;
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int ret, antenna = 0;
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int ret = 0;
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u8 antenna;
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u32 flags;
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bf->skbaddr = pci_map_single(sc->pdev, skb->data, skb->len,
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@ -2023,23 +2024,35 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
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}
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ds = bf->desc;
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antenna = ah->ah_tx_ant;
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flags = AR5K_TXDESC_NOACK;
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if (sc->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) {
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ds->ds_link = bf->daddr; /* self-linked */
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flags |= AR5K_TXDESC_VEOL;
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/*
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* Let hardware handle antenna switching if txantenna is not set
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*/
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} else {
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} else
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ds->ds_link = 0;
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/*
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* Switch antenna every 4 beacons if txantenna is not set
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* XXX assumes two antennas
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*/
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if (antenna == 0)
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antenna = sc->bsent & 4 ? 2 : 1;
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}
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/*
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* If we use multiple antennas on AP and use
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* the Sectored AP scenario, switch antenna every
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* 4 beacons to make sure everybody hears our AP.
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* When a client tries to associate, hw will keep
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* track of the tx antenna to be used for this client
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* automaticaly, based on ACKed packets.
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*
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* Note: AP still listens and transmits RTS on the
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* default antenna which is supposed to be an omni.
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*
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* Note2: On sectored scenarios it's possible to have
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* multiple antennas (1omni -the default- and 14 sectors)
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* so if we choose to actually support this mode we need
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* to allow user to set how many antennas we have and tweak
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* the code below to send beacons on all of them.
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*/
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if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
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antenna = sc->bsent & 4 ? 2 : 1;
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/* FIXME: If we are in g mode and rate is a CCK rate
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* subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta
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@ -2752,12 +2765,16 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
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struct ath5k_softc *sc = hw->priv;
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struct ath5k_hw *ah = sc->ah;
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struct ieee80211_conf *conf = &hw->conf;
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int ret;
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int ret = 0;
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mutex_lock(&sc->lock);
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sc->bintval = conf->beacon_int;
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ret = ath5k_chan_set(sc, conf->channel);
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if (ret < 0)
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return ret;
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if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
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(sc->power_level != conf->power_level)) {
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sc->power_level = conf->power_level;
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@ -2766,10 +2783,27 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
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ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
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}
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ret = ath5k_chan_set(sc, conf->channel);
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/* TODO:
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* 1) Move this on config_interface and handle each case
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* separately eg. when we have only one STA vif, use
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* AR5K_ANTMODE_SINGLE_AP
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*
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* 2) Allow the user to change antenna mode eg. when only
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* one antenna is present
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*
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* 3) Allow the user to set default/tx antenna when possible
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*
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* 4) Default mode should handle 90% of the cases, together
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* with fixed a/b and single AP modes we should be able to
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* handle 99%. Sectored modes are extreme cases and i still
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* haven't found a usage for them. If we decide to support them,
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* then we must allow the user to set how many tx antennas we
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* have available
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*/
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ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
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mutex_unlock(&sc->lock);
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return ret;
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return 0;
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}
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#define SUPPORTED_FIF_FLAGS \
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@ -208,16 +208,16 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset,
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ee->ee_ant_control[mode][i++] = (val >> 6) & 0x3f;
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ee->ee_ant_control[mode][i++] = val & 0x3f;
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/* Get antenna modes */
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ah->ah_antenna[mode][0] =
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/* Get antenna switch tables */
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ah->ah_ant_ctl[mode][AR5K_ANT_CTL] =
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(ee->ee_ant_control[mode][0] << 4);
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ah->ah_antenna[mode][AR5K_ANT_FIXED_A] =
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ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_A] =
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ee->ee_ant_control[mode][1] |
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(ee->ee_ant_control[mode][2] << 6) |
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(ee->ee_ant_control[mode][3] << 12) |
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(ee->ee_ant_control[mode][4] << 18) |
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(ee->ee_ant_control[mode][5] << 24);
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ah->ah_antenna[mode][AR5K_ANT_FIXED_B] =
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ah->ah_ant_ctl[mode][AR5K_ANT_SWTABLE_B] =
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ee->ee_ant_control[mode][6] |
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(ee->ee_ant_control[mode][7] << 6) |
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(ee->ee_ant_control[mode][8] << 12) |
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@ -240,11 +240,11 @@ enum ath5k_eeprom_freq_bands{
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#define AR5K_EEPROM_READ_HDR(_o, _v) \
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AR5K_EEPROM_READ(_o, ah->ah_capabilities.cap_eeprom._v); \
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enum ath5k_ant_setting {
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AR5K_ANT_VARIABLE = 0, /* variable by programming */
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AR5K_ANT_FIXED_A = 1, /* fixed to 11a frequencies */
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AR5K_ANT_FIXED_B = 2, /* fixed to 11b frequencies */
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AR5K_ANT_MAX = 3,
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enum ath5k_ant_table {
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AR5K_ANT_CTL = 0, /* Idle switch table settings */
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AR5K_ANT_SWTABLE_A = 1, /* Switch table for antenna A */
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AR5K_ANT_SWTABLE_B = 2, /* Switch table for antenna B */
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AR5K_ANT_MAX,
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};
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enum ath5k_ctl_mode {
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@ -461,6 +461,7 @@ struct ath5k_eeprom_info {
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/* Spur mitigation data (fbin values for spur channels) */
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u16 ee_spur_chans[AR5K_EEPROM_N_SPUR_CHANS][AR5K_EEPROM_N_FREQ_BANDS];
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/* Antenna raw switch tables */
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u32 ee_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
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};
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@ -1414,25 +1414,189 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
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return ret;
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}
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/*****************\
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* Antenna control *
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\*****************/
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void /*TODO:Boundary check*/
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ath5k_hw_set_def_antenna(struct ath5k_hw *ah, unsigned int ant)
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ath5k_hw_set_def_antenna(struct ath5k_hw *ah, u8 ant)
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{
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ATH5K_TRACE(ah->ah_sc);
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/*Just a try M.F.*/
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if (ah->ah_version != AR5K_AR5210)
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ath5k_hw_reg_write(ah, ant, AR5K_DEFAULT_ANTENNA);
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ath5k_hw_reg_write(ah, ant & 0x7, AR5K_DEFAULT_ANTENNA);
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}
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unsigned int ath5k_hw_get_def_antenna(struct ath5k_hw *ah)
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{
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ATH5K_TRACE(ah->ah_sc);
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/*Just a try M.F.*/
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if (ah->ah_version != AR5K_AR5210)
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return ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA);
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return ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA) & 0x7;
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return false; /*XXX: What do we return for 5210 ?*/
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}
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/*
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* Enable/disable fast rx antenna diversity
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*/
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static void
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ath5k_hw_set_fast_div(struct ath5k_hw *ah, u8 ee_mode, bool enable)
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{
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switch (ee_mode) {
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case AR5K_EEPROM_MODE_11G:
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/* XXX: This is set to
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* disabled on initvals !!! */
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case AR5K_EEPROM_MODE_11A:
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if (enable)
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AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGCCTL,
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AR5K_PHY_AGCCTL_OFDM_DIV_DIS);
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else
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AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
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AR5K_PHY_AGCCTL_OFDM_DIV_DIS);
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break;
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case AR5K_EEPROM_MODE_11B:
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AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
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AR5K_PHY_AGCCTL_OFDM_DIV_DIS);
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break;
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default:
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return;
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}
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if (enable) {
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AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART,
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AR5K_PHY_RESTART_DIV_GC, 0xc);
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AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
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AR5K_PHY_FAST_ANT_DIV_EN);
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} else {
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AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART,
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AR5K_PHY_RESTART_DIV_GC, 0x8);
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AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
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AR5K_PHY_FAST_ANT_DIV_EN);
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}
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}
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/*
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* Set antenna operating mode
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*/
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void
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ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
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{
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struct ieee80211_channel *channel = &ah->ah_current_channel;
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bool use_def_for_tx, update_def_on_tx, use_def_for_rts, fast_div;
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bool use_def_for_sg;
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u8 def_ant, tx_ant, ee_mode;
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u32 sta_id1 = 0;
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def_ant = ah->ah_def_ant;
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ATH5K_TRACE(ah->ah_sc);
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switch (channel->hw_value & CHANNEL_MODES) {
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case CHANNEL_A:
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case CHANNEL_T:
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case CHANNEL_XR:
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ee_mode = AR5K_EEPROM_MODE_11A;
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break;
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case CHANNEL_G:
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case CHANNEL_TG:
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ee_mode = AR5K_EEPROM_MODE_11G;
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break;
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case CHANNEL_B:
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ee_mode = AR5K_EEPROM_MODE_11B;
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break;
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default:
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ATH5K_ERR(ah->ah_sc,
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"invalid channel: %d\n", channel->center_freq);
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return;
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}
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switch (ant_mode) {
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case AR5K_ANTMODE_DEFAULT:
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tx_ant = 0;
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use_def_for_tx = false;
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update_def_on_tx = false;
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use_def_for_rts = false;
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use_def_for_sg = false;
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fast_div = true;
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break;
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case AR5K_ANTMODE_FIXED_A:
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def_ant = 1;
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tx_ant = 0;
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use_def_for_tx = true;
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update_def_on_tx = false;
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use_def_for_rts = true;
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use_def_for_sg = true;
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fast_div = false;
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break;
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case AR5K_ANTMODE_FIXED_B:
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def_ant = 2;
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tx_ant = 0;
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use_def_for_tx = true;
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update_def_on_tx = false;
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use_def_for_rts = true;
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use_def_for_sg = true;
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fast_div = false;
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break;
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case AR5K_ANTMODE_SINGLE_AP:
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def_ant = 1; /* updated on tx */
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tx_ant = 0;
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use_def_for_tx = true;
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update_def_on_tx = true;
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use_def_for_rts = true;
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use_def_for_sg = true;
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fast_div = true;
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break;
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case AR5K_ANTMODE_SECTOR_AP:
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tx_ant = 1; /* variable */
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use_def_for_tx = false;
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update_def_on_tx = false;
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use_def_for_rts = true;
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use_def_for_sg = false;
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fast_div = false;
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break;
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case AR5K_ANTMODE_SECTOR_STA:
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tx_ant = 1; /* variable */
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use_def_for_tx = true;
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update_def_on_tx = false;
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use_def_for_rts = true;
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use_def_for_sg = false;
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fast_div = true;
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break;
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case AR5K_ANTMODE_DEBUG:
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def_ant = 1;
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tx_ant = 2;
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use_def_for_tx = false;
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update_def_on_tx = false;
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use_def_for_rts = false;
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use_def_for_sg = false;
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fast_div = false;
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break;
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default:
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return;
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}
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ah->ah_tx_ant = tx_ant;
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ah->ah_ant_mode = ant_mode;
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sta_id1 |= use_def_for_tx ? AR5K_STA_ID1_DEFAULT_ANTENNA : 0;
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sta_id1 |= update_def_on_tx ? AR5K_STA_ID1_DESC_ANTENNA : 0;
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sta_id1 |= use_def_for_rts ? AR5K_STA_ID1_RTS_DEF_ANTENNA : 0;
|
||||
sta_id1 |= use_def_for_sg ? AR5K_STA_ID1_SELFGEN_DEF_ANT : 0;
|
||||
|
||||
AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, AR5K_STA_ID1_ANTENNA_SETTINGS);
|
||||
|
||||
if (sta_id1)
|
||||
AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, sta_id1);
|
||||
|
||||
/* Note: set diversity before default antenna
|
||||
* because it won't work correctly */
|
||||
ath5k_hw_set_fast_div(ah, ee_mode, fast_div);
|
||||
ath5k_hw_set_def_antenna(ah, def_ant);
|
||||
}
|
||||
|
||||
|
||||
/****************\
|
||||
* TX power setup *
|
||||
|
|
|
@ -1148,6 +1148,11 @@
|
|||
#define AR5K_STA_ID1_CBCIV_ENDIAN 0x40000000 /* ??? */
|
||||
#define AR5K_STA_ID1_KEYSRCH_MCAST 0x80000000 /* Do key cache search for mcast frames */
|
||||
|
||||
#define AR5K_STA_ID1_ANTENNA_SETTINGS (AR5K_STA_ID1_DEFAULT_ANTENNA | \
|
||||
AR5K_STA_ID1_DESC_ANTENNA | \
|
||||
AR5K_STA_ID1_RTS_DEF_ANTENNA | \
|
||||
AR5K_STA_ID1_SELFGEN_DEF_ANT)
|
||||
|
||||
/*
|
||||
* First BSSID register (MAC address, lower 32bits)
|
||||
*/
|
||||
|
@ -2028,7 +2033,9 @@
|
|||
#define AR5K_PHY_AGCCTL 0x9860 /* Register address */
|
||||
#define AR5K_PHY_AGCCTL_CAL 0x00000001 /* Enable PHY calibration */
|
||||
#define AR5K_PHY_AGCCTL_NF 0x00000002 /* Enable Noise Floor calibration */
|
||||
#define AR5K_PHY_AGCCTL_OFDM_DIV_DIS 0x00000008 /* Disable antenna diversity on OFDM modes */
|
||||
#define AR5K_PHY_AGCCTL_NF_EN 0x00008000 /* Enable nf calibration to happen (?) */
|
||||
#define AR5K_PHY_AGCTL_FLTR_CAL 0x00010000 /* Allow filter calibration (?) */
|
||||
#define AR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 /* Don't update nf automaticaly */
|
||||
|
||||
/*
|
||||
|
@ -2528,7 +2535,7 @@
|
|||
* PHY CCK Cross-correlator Barker RSSI threshold register [5212+]
|
||||
*/
|
||||
#define AR5K_PHY_CCK_CROSSCORR 0xa208
|
||||
#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR 0x0000000f
|
||||
#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR 0x0000003f
|
||||
#define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR_S 0
|
||||
|
||||
/* Same address is used for antenna diversity activation */
|
||||
|
|
|
@ -698,13 +698,13 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
|
|||
/* Set antenna idle switch table */
|
||||
AR5K_REG_WRITE_BITS(ah, AR5K_PHY_ANT_CTL,
|
||||
AR5K_PHY_ANT_CTL_SWTABLE_IDLE,
|
||||
(ah->ah_antenna[ee_mode][0] |
|
||||
(ah->ah_ant_ctl[ee_mode][0] |
|
||||
AR5K_PHY_ANT_CTL_TXRX_EN));
|
||||
|
||||
/* Set antenna switch table */
|
||||
ath5k_hw_reg_write(ah, ah->ah_antenna[ee_mode][ant[0]],
|
||||
/* Set antenna switch tables */
|
||||
ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[0]],
|
||||
AR5K_PHY_ANT_SWITCH_TABLE_0);
|
||||
ath5k_hw_reg_write(ah, ah->ah_antenna[ee_mode][ant[1]],
|
||||
ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant[1]],
|
||||
AR5K_PHY_ANT_SWITCH_TABLE_1);
|
||||
|
||||
/* Noise floor threshold */
|
||||
|
@ -1042,17 +1042,15 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
|
|||
|
||||
/*
|
||||
* In case a fixed antenna was set as default
|
||||
* write the same settings on both AR5K_PHY_ANT_SWITCH_TABLE
|
||||
* registers.
|
||||
* use the same switch table twice.
|
||||
*/
|
||||
if (s_ant != 0) {
|
||||
if (s_ant == AR5K_ANT_FIXED_A) /* 1 - Main */
|
||||
ant[0] = ant[1] = AR5K_ANT_FIXED_A;
|
||||
else /* 2 - Aux */
|
||||
ant[0] = ant[1] = AR5K_ANT_FIXED_B;
|
||||
} else {
|
||||
ant[0] = AR5K_ANT_FIXED_A;
|
||||
ant[1] = AR5K_ANT_FIXED_B;
|
||||
if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_A)
|
||||
ant[0] = ant[1] = AR5K_ANT_SWTABLE_A;
|
||||
else if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_B)
|
||||
ant[0] = ant[1] = AR5K_ANT_SWTABLE_B;
|
||||
else {
|
||||
ant[0] = AR5K_ANT_SWTABLE_A;
|
||||
ant[1] = AR5K_ANT_SWTABLE_B;
|
||||
}
|
||||
|
||||
/* Commit values from EEPROM */
|
||||
|
@ -1260,6 +1258,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
|
|||
*/
|
||||
ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
|
||||
|
||||
/* Restore antenna mode */
|
||||
ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode);
|
||||
|
||||
/*
|
||||
* Configure QCUs/DCUs
|
||||
|
|
Loading…
Reference in a new issue