ARM: realview: remove private barrier implementation
The realview barrier implementation tries to avoid calling outer_sync in order to not lock up as a result of a bug in the l220 cache controller. This gets in the way of the multiplatform support, but we can still remove it if we make sure that the outer_sync function never gets called, by replacing the function pointer with NULL, right after initialization. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [Fixed up header inclusions] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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38541bf485
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2b749cb3a5
4 changed files with 13 additions and 10 deletions
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@ -36,7 +36,6 @@ config REALVIEW_EB_A9MP
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config REALVIEW_EB_ARM11MP
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config REALVIEW_EB_ARM11MP
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bool "Support ARM11MPCore Tile"
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bool "Support ARM11MPCore Tile"
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depends on MACH_REALVIEW_EB
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depends on MACH_REALVIEW_EB
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select ARCH_HAS_BARRIERS if SMP
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select CPU_V6K
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select CPU_V6K
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select HAVE_ARM_TWD if SMP
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@ -57,7 +56,6 @@ config REALVIEW_EB_ARM11MP_REVB
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config MACH_REALVIEW_PB11MP
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config MACH_REALVIEW_PB11MP
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bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
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bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
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select ARCH_HAS_BARRIERS if SMP
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select ARM_GIC
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select ARM_GIC
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select CPU_V6K
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select CPU_V6K
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_SCU if SMP
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@ -1,8 +0,0 @@
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/*
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* Barriers redefined for RealView ARM11MPCore platforms with L220 cache
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* controller to work around hardware errata causing the outer_sync()
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* operation to deadlock the system.
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*/
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#define mb() dsb()
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#define rmb() dsb()
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#define wmb() mb()
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@ -38,6 +38,7 @@
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/smp_twd.h>
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#include <asm/smp_twd.h>
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#include <asm/system_info.h>
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#include <asm/system_info.h>
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#include <asm/outercache.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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@ -450,6 +451,12 @@ static void __init realview_eb_init(void)
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* Bits: .... ...0 0111 1001 0000 .... .... ....
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* Bits: .... ...0 0111 1001 0000 .... .... ....
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*/
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*/
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l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
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l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
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/*
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* due to a bug in the l220 cache controller, we must not call
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* the sync function. stub it out here instead!
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*/
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outer_cache.sync = NULL;
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#endif
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#endif
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pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu";
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pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu";
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platform_device_register(&pmu_device);
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platform_device_register(&pmu_device);
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@ -42,6 +42,7 @@
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#include <asm/mach/flash.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include <asm/outercache.h>
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#include <mach/board-pb11mp.h>
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#include <mach/board-pb11mp.h>
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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@ -345,6 +346,11 @@ static void __init realview_pb11mp_init(void)
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* Bits: .... ...0 0111 1001 0000 .... .... ....
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* Bits: .... ...0 0111 1001 0000 .... .... ....
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*/
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*/
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l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
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l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
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/*
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* due to a bug in the l220 cache controller, we must not call
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* the sync function. stub it out here instead!
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*/
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outer_cache.sync = NULL;
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#endif
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#endif
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realview_flash_register(realview_pb11mp_flash_resource,
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realview_flash_register(realview_pb11mp_flash_resource,
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