percpu: Generic this_cpu_cmpxchg() and this_cpu_xchg support
Generic code to provide new per cpu atomic features
this_cpu_cmpxchg
this_cpu_xchg
Fallback occurs to functions using interrupts disable/enable
to ensure correct per cpu atomicity.
Fallback to regular cmpxchg and xchg is not possible since per cpu atomic
semantics include the guarantee that the current cpus per cpu data is
accessed atomically. Use of regular cmpxchg and xchg requires the
determination of the address of the per cpu data before regular cmpxchg
or xchg which therefore cannot be atomically included in an xchg or
cmpxchg without segment override.
tj: - Relocated new ops to conform better to the general organization.
- This patch contains a trivial comment fix.
Signed-off-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Christoph Lameter
Tejun Heo
parent
403047754c
commit
2b71244285
1 changed files with 133 additions and 1 deletions
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@ -447,6 +447,59 @@ do { \
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#define this_cpu_inc_return(pcp) this_cpu_add_return(pcp, 1)
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#define this_cpu_dec_return(pcp) this_cpu_add_return(pcp, -1)
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#define _this_cpu_generic_xchg(pcp, nval) \
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({ typeof(pcp) ret__; \
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preempt_disable(); \
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ret__ = __this_cpu_read(pcp); \
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__this_cpu_write(pcp, nval); \
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preempt_enable(); \
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ret__; \
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})
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#ifndef this_cpu_xchg
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# ifndef this_cpu_xchg_1
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# define this_cpu_xchg_1(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
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# endif
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# ifndef this_cpu_xchg_2
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# define this_cpu_xchg_2(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
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# endif
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# ifndef this_cpu_xchg_4
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# define this_cpu_xchg_4(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
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# endif
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# ifndef this_cpu_xchg_8
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# define this_cpu_xchg_8(pcp, nval) _this_cpu_generic_xchg(pcp, nval)
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# endif
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# define this_cpu_xchg(pcp, nval) \
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__pcpu_size_call_return2(this_cpu_xchg_, (pcp), nval)
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#endif
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#define _this_cpu_generic_cmpxchg(pcp, oval, nval) \
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({ typeof(pcp) ret__; \
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preempt_disable(); \
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ret__ = __this_cpu_read(pcp); \
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if (ret__ == (oval)) \
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__this_cpu_write(pcp, nval); \
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preempt_enable(); \
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ret__; \
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})
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#ifndef this_cpu_cmpxchg
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# ifndef this_cpu_cmpxchg_1
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# define this_cpu_cmpxchg_1(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef this_cpu_cmpxchg_2
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# define this_cpu_cmpxchg_2(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef this_cpu_cmpxchg_4
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# define this_cpu_cmpxchg_4(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef this_cpu_cmpxchg_8
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# define this_cpu_cmpxchg_8(pcp, oval, nval) _this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# define this_cpu_cmpxchg(pcp, oval, nval) \
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__pcpu_size_call_return2(this_cpu_cmpxchg_, pcp, oval, nval)
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#endif
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/*
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* Generic percpu operations that do not require preemption handling.
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* Either we do not care about races or the caller has the
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@ -600,11 +653,61 @@ do { \
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#define __this_cpu_inc_return(pcp) this_cpu_add_return(pcp, 1)
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#define __this_cpu_dec_return(pcp) this_cpu_add_return(pcp, -1)
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#define __this_cpu_generic_xchg(pcp, nval) \
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({ typeof(pcp) ret__; \
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ret__ = __this_cpu_read(pcp); \
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__this_cpu_write(pcp, nval); \
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ret__; \
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})
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#ifndef __this_cpu_xchg
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# ifndef __this_cpu_xchg_1
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# define __this_cpu_xchg_1(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
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# endif
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# ifndef __this_cpu_xchg_2
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# define __this_cpu_xchg_2(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
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# endif
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# ifndef __this_cpu_xchg_4
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# define __this_cpu_xchg_4(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
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# endif
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# ifndef __this_cpu_xchg_8
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# define __this_cpu_xchg_8(pcp, nval) __this_cpu_generic_xchg(pcp, nval)
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# endif
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# define __this_cpu_xchg(pcp, nval) \
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__pcpu_size_call_return2(__this_cpu_xchg_, (pcp), nval)
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#endif
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#define __this_cpu_generic_cmpxchg(pcp, oval, nval) \
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({ \
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typeof(pcp) ret__; \
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ret__ = __this_cpu_read(pcp); \
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if (ret__ == (oval)) \
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__this_cpu_write(pcp, nval); \
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ret__; \
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})
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#ifndef __this_cpu_cmpxchg
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# ifndef __this_cpu_cmpxchg_1
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# define __this_cpu_cmpxchg_1(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef __this_cpu_cmpxchg_2
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# define __this_cpu_cmpxchg_2(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef __this_cpu_cmpxchg_4
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# define __this_cpu_cmpxchg_4(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef __this_cpu_cmpxchg_8
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# define __this_cpu_cmpxchg_8(pcp, oval, nval) __this_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# define __this_cpu_cmpxchg(pcp, oval, nval) \
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__pcpu_size_call_return2(__this_cpu_cmpxchg_, pcp, oval, nval)
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#endif
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/*
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* IRQ safe versions of the per cpu RMW operations. Note that these operations
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* are *not* safe against modification of the same variable from another
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* processors (which one gets when using regular atomic operations)
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. They are guaranteed to be atomic vs. local interrupts and
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* They are guaranteed to be atomic vs. local interrupts and
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* preemption only.
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*/
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#define irqsafe_cpu_generic_to_op(pcp, val, op) \
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@ -691,4 +794,33 @@ do { \
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# define irqsafe_cpu_xor(pcp, val) __pcpu_size_call(irqsafe_cpu_xor_, (val))
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#endif
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#define irqsafe_cpu_generic_cmpxchg(pcp, oval, nval) \
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({ \
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typeof(pcp) ret__; \
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unsigned long flags; \
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local_irq_save(flags); \
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ret__ = __this_cpu_read(pcp); \
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if (ret__ == (oval)) \
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__this_cpu_write(pcp, nval); \
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local_irq_restore(flags); \
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ret__; \
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})
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#ifndef irqsafe_cpu_cmpxchg
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# ifndef irqsafe_cpu_cmpxchg_1
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# define irqsafe_cpu_cmpxchg_1(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_2
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# define irqsafe_cpu_cmpxchg_2(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_4
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# define irqsafe_cpu_cmpxchg_4(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# ifndef irqsafe_cpu_cmpxchg_8
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# define irqsafe_cpu_cmpxchg_8(pcp, oval, nval) irqsafe_cpu_generic_cmpxchg(pcp, oval, nval)
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# endif
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# define irqsafe_cpu_cmpxchg(pcp, oval, nval) \
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__pcpu_size_call_return2(irqsafe_cpu_cmpxchg_, (pcp), oval, nval)
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#endif
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#endif /* __LINUX_PERCPU_H */
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