ASoC: arizona: Support variable FLL VCO multipliers
Some Arizona chips have a higher frequency for the FLL VCO, support this in the common code. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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3 changed files with 7 additions and 3 deletions
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@ -734,9 +734,9 @@ static int arizona_calc_fll(struct arizona_fll *fll,
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/* Apply the division for our remaining calculations */
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Fref /= div;
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/* Fvco should be 90-100MHz; don't check the upper bound */
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/* Fvco should be over the targt; don't check the upper bound */
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div = 1;
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while (Fout * div < 90000000) {
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while (Fout * div < 90000000 * fll->vco_mult) {
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div++;
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if (div > 7) {
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arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
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@ -744,7 +744,7 @@ static int arizona_calc_fll(struct arizona_fll *fll,
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return -EINVAL;
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}
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}
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target = Fout * div;
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target = Fout * div / fll->vco_mult;
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cfg->outdiv = div;
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arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
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@ -141,6 +141,7 @@ struct arizona_fll {
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struct arizona *arizona;
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int id;
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unsigned int base;
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unsigned int vco_mult;
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struct completion lock;
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struct completion ok;
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@ -853,6 +853,9 @@ static int __devinit wm5102_probe(struct platform_device *pdev)
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wm5102->core.arizona = arizona;
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for (i = 0; i < ARRAY_SIZE(wm5102->fll); i++)
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wm5102->fll[i].vco_mult = 1;
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arizona_init_fll(arizona, 1, ARIZONA_FLL1_CONTROL_1 - 1,
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ARIZONA_IRQ_FLL1_LOCK, ARIZONA_IRQ_FLL1_CLOCK_OK,
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&wm5102->fll[0]);
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