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[MIPS] Cobalt: Split PCI codes from setup.c

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It's removed #ifdef CONFIG_PCI/#endif from cobalt setup.c .

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yoichi Yuasa 2007-03-05 19:10:03 +09:00 committed by Ralf Baechle
parent cc50b67dcd
commit 2a9effc678
3 changed files with 48 additions and 28 deletions
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1
arch/mips/cobalt/Makefile
View file

@ -4,5 +4,6 @@
obj-y := irq.o reset.o setup.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
obj-$(CONFIG_MTD_PHYSMAP) += mtd.o

47
arch/mips/cobalt/pci.c Normal file
View file

@ -0,0 +1,47 @@
/*
* Register PCI controller.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/gt64120.h>
extern struct pci_ops gt64111_pci_ops;
static struct resource cobalt_mem_resource = {
.start = GT_DEF_PCI0_MEM0_BASE,
.end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
.name = "PCI memory",
.flags = IORESOURCE_MEM,
};
static struct resource cobalt_io_resource = {
.start = 0x1000,
.end = GT_DEF_PCI0_IO_SIZE - 1,
.name = "PCI I/O",
.flags = IORESOURCE_IO,
};
static struct pci_controller cobalt_pci_controller = {
.pci_ops = &gt64111_pci_ops,
.mem_resource = &cobalt_mem_resource,
.io_resource = &cobalt_io_resource,
.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
};
static int __init cobalt_pci_init(void)
{
register_pci_controller(&cobalt_pci_controller);
return 0;
}
arch_initcall(cobalt_pci_init);

28
arch/mips/cobalt/setup.c
View file

@ -61,22 +61,6 @@ void __init plat_timer_setup(struct irqaction *irq)
GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
}
extern struct pci_ops gt64111_pci_ops;
static struct resource cobalt_mem_resource = {
.start = GT_DEF_PCI0_MEM0_BASE,
.end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
.name = "PCI memory",
.flags = IORESOURCE_MEM
};
static struct resource cobalt_io_resource = {
.start = 0x1000,
.end = 0xffff,
.name = "PCI I/O",
.flags = IORESOURCE_IO
};
/*
* Cobalt doesn't have PS/2 keyboard/mouse interfaces,
* keyboard conntroller is never used.
@ -109,14 +93,6 @@ static struct resource cobalt_reserved_resources[] = {
},
};
static struct pci_controller cobalt_pci_controller = {
.pci_ops = &gt64111_pci_ops,
.mem_resource = &cobalt_mem_resource,
.mem_offset = 0,
.io_resource = &cobalt_io_resource,
.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
};
void __init plat_mem_setup(void)
{
static struct uart_port uart;
@ -144,10 +120,6 @@ void __init plat_mem_setup(void)
printk("Cobalt board ID: %d\n", cobalt_board_id);
#ifdef CONFIG_PCI
register_pci_controller(&cobalt_pci_controller);
#endif
if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
#ifdef CONFIG_SERIAL_8250
uart.line = 0;