b43: LCN-PHY: load TX gain table on init

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki 2011-09-04 09:11:46 +02:00 committed by John W. Linville
parent 108f4f3c4a
commit 28e3181a77
2 changed files with 195 additions and 4 deletions

View file

@ -27,6 +27,18 @@
#include "phy_common.h"
#include "phy_lcn.h"
struct b43_lcntab_tx_gain_tbl_entry {
u8 gm;
u8 pga;
u8 pad;
u8 dac;
u8 bb_mult;
};
/**************************************************
* Static tables.
**************************************************/
static const u16 b43_lcntab_0x02[] = {
0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
@ -297,6 +309,146 @@ static const u32 b43_lcntab_0x18[] = {
0x00080000, 0x00080000, 0x00080000, 0x00080000,
};
/**************************************************
* TX gain.
**************************************************/
const struct b43_lcntab_tx_gain_tbl_entry
b43_lcntab_tx_gain_tbl_2ghz_ext_pa_rev0[B43_LCNTAB_TX_GAIN_SIZE] = {
{ 0x03, 0x00, 0x1f, 0x0, 0x48 },
{ 0x03, 0x00, 0x1f, 0x0, 0x46 },
{ 0x03, 0x00, 0x1f, 0x0, 0x44 },
{ 0x03, 0x00, 0x1e, 0x0, 0x43 },
{ 0x03, 0x00, 0x1d, 0x0, 0x44 },
{ 0x03, 0x00, 0x1c, 0x0, 0x44 },
{ 0x03, 0x00, 0x1b, 0x0, 0x45 },
{ 0x03, 0x00, 0x1a, 0x0, 0x46 },
{ 0x03, 0x00, 0x19, 0x0, 0x46 },
{ 0x03, 0x00, 0x18, 0x0, 0x47 },
{ 0x03, 0x00, 0x17, 0x0, 0x48 },
{ 0x03, 0x00, 0x17, 0x0, 0x46 },
{ 0x03, 0x00, 0x16, 0x0, 0x47 },
{ 0x03, 0x00, 0x15, 0x0, 0x48 },
{ 0x03, 0x00, 0x15, 0x0, 0x46 },
{ 0x03, 0x00, 0x15, 0x0, 0x44 },
{ 0x03, 0x00, 0x15, 0x0, 0x42 },
{ 0x03, 0x00, 0x15, 0x0, 0x40 },
{ 0x03, 0x00, 0x15, 0x0, 0x3f },
{ 0x03, 0x00, 0x14, 0x0, 0x40 },
{ 0x03, 0x00, 0x13, 0x0, 0x41 },
{ 0x03, 0x00, 0x13, 0x0, 0x40 },
{ 0x03, 0x00, 0x12, 0x0, 0x41 },
{ 0x03, 0x00, 0x12, 0x0, 0x40 },
{ 0x03, 0x00, 0x11, 0x0, 0x41 },
{ 0x03, 0x00, 0x11, 0x0, 0x40 },
{ 0x03, 0x00, 0x10, 0x0, 0x41 },
{ 0x03, 0x00, 0x10, 0x0, 0x40 },
{ 0x03, 0x00, 0x10, 0x0, 0x3e },
{ 0x03, 0x00, 0x10, 0x0, 0x3c },
{ 0x03, 0x00, 0x10, 0x0, 0x3a },
{ 0x03, 0x00, 0x0f, 0x0, 0x3d },
{ 0x03, 0x00, 0x0f, 0x0, 0x3b },
{ 0x03, 0x00, 0x0e, 0x0, 0x3d },
{ 0x03, 0x00, 0x0e, 0x0, 0x3c },
{ 0x03, 0x00, 0x0e, 0x0, 0x3a },
{ 0x03, 0x00, 0x0d, 0x0, 0x3c },
{ 0x03, 0x00, 0x0d, 0x0, 0x3b },
{ 0x03, 0x00, 0x0c, 0x0, 0x3e },
{ 0x03, 0x00, 0x0c, 0x0, 0x3c },
{ 0x03, 0x00, 0x0c, 0x0, 0x3a },
{ 0x03, 0x00, 0x0b, 0x0, 0x3e },
{ 0x03, 0x00, 0x0b, 0x0, 0x3c },
{ 0x03, 0x00, 0x0b, 0x0, 0x3b },
{ 0x03, 0x00, 0x0b, 0x0, 0x39 },
{ 0x03, 0x00, 0x0a, 0x0, 0x3d },
{ 0x03, 0x00, 0x0a, 0x0, 0x3b },
{ 0x03, 0x00, 0x0a, 0x0, 0x39 },
{ 0x03, 0x00, 0x09, 0x0, 0x3e },
{ 0x03, 0x00, 0x09, 0x0, 0x3c },
{ 0x03, 0x00, 0x09, 0x0, 0x3a },
{ 0x03, 0x00, 0x09, 0x0, 0x39 },
{ 0x03, 0x00, 0x08, 0x0, 0x3e },
{ 0x03, 0x00, 0x08, 0x0, 0x3c },
{ 0x03, 0x00, 0x08, 0x0, 0x3a },
{ 0x03, 0x00, 0x08, 0x0, 0x39 },
{ 0x03, 0x00, 0x08, 0x0, 0x37 },
{ 0x03, 0x00, 0x07, 0x0, 0x3d },
{ 0x03, 0x00, 0x07, 0x0, 0x3c },
{ 0x03, 0x00, 0x07, 0x0, 0x3a },
{ 0x03, 0x00, 0x07, 0x0, 0x38 },
{ 0x03, 0x00, 0x07, 0x0, 0x37 },
{ 0x03, 0x00, 0x06, 0x0, 0x3e },
{ 0x03, 0x00, 0x06, 0x0, 0x3c },
{ 0x03, 0x00, 0x06, 0x0, 0x3a },
{ 0x03, 0x00, 0x06, 0x0, 0x39 },
{ 0x03, 0x00, 0x06, 0x0, 0x37 },
{ 0x03, 0x00, 0x06, 0x0, 0x36 },
{ 0x03, 0x00, 0x06, 0x0, 0x34 },
{ 0x03, 0x00, 0x05, 0x0, 0x3d },
{ 0x03, 0x00, 0x05, 0x0, 0x3b },
{ 0x03, 0x00, 0x05, 0x0, 0x39 },
{ 0x03, 0x00, 0x05, 0x0, 0x38 },
{ 0x03, 0x00, 0x05, 0x0, 0x36 },
{ 0x03, 0x00, 0x05, 0x0, 0x35 },
{ 0x03, 0x00, 0x05, 0x0, 0x33 },
{ 0x03, 0x00, 0x04, 0x0, 0x3e },
{ 0x03, 0x00, 0x04, 0x0, 0x3c },
{ 0x03, 0x00, 0x04, 0x0, 0x3a },
{ 0x03, 0x00, 0x04, 0x0, 0x39 },
{ 0x03, 0x00, 0x04, 0x0, 0x37 },
{ 0x03, 0x00, 0x04, 0x0, 0x36 },
{ 0x03, 0x00, 0x04, 0x0, 0x34 },
{ 0x03, 0x00, 0x04, 0x0, 0x33 },
{ 0x03, 0x00, 0x04, 0x0, 0x31 },
{ 0x03, 0x00, 0x04, 0x0, 0x30 },
{ 0x03, 0x00, 0x04, 0x0, 0x2e },
{ 0x03, 0x00, 0x03, 0x0, 0x3c },
{ 0x03, 0x00, 0x03, 0x0, 0x3a },
{ 0x03, 0x00, 0x03, 0x0, 0x39 },
{ 0x03, 0x00, 0x03, 0x0, 0x37 },
{ 0x03, 0x00, 0x03, 0x0, 0x36 },
{ 0x03, 0x00, 0x03, 0x0, 0x34 },
{ 0x03, 0x00, 0x03, 0x0, 0x33 },
{ 0x03, 0x00, 0x03, 0x0, 0x31 },
{ 0x03, 0x00, 0x03, 0x0, 0x30 },
{ 0x03, 0x00, 0x03, 0x0, 0x2e },
{ 0x03, 0x00, 0x03, 0x0, 0x2d },
{ 0x03, 0x00, 0x03, 0x0, 0x2c },
{ 0x03, 0x00, 0x03, 0x0, 0x2b },
{ 0x03, 0x00, 0x03, 0x0, 0x29 },
{ 0x03, 0x00, 0x02, 0x0, 0x3d },
{ 0x03, 0x00, 0x02, 0x0, 0x3b },
{ 0x03, 0x00, 0x02, 0x0, 0x39 },
{ 0x03, 0x00, 0x02, 0x0, 0x38 },
{ 0x03, 0x00, 0x02, 0x0, 0x36 },
{ 0x03, 0x00, 0x02, 0x0, 0x35 },
{ 0x03, 0x00, 0x02, 0x0, 0x33 },
{ 0x03, 0x00, 0x02, 0x0, 0x32 },
{ 0x03, 0x00, 0x02, 0x0, 0x30 },
{ 0x03, 0x00, 0x02, 0x0, 0x2f },
{ 0x03, 0x00, 0x02, 0x0, 0x2e },
{ 0x03, 0x00, 0x02, 0x0, 0x2c },
{ 0x03, 0x00, 0x02, 0x0, 0x2b },
{ 0x03, 0x00, 0x02, 0x0, 0x2a },
{ 0x03, 0x00, 0x02, 0x0, 0x29 },
{ 0x03, 0x00, 0x02, 0x0, 0x27 },
{ 0x03, 0x00, 0x02, 0x0, 0x26 },
{ 0x03, 0x00, 0x02, 0x0, 0x25 },
{ 0x03, 0x00, 0x02, 0x0, 0x24 },
{ 0x03, 0x00, 0x02, 0x0, 0x23 },
{ 0x03, 0x00, 0x02, 0x0, 0x22 },
{ 0x03, 0x00, 0x02, 0x0, 0x21 },
{ 0x03, 0x00, 0x02, 0x0, 0x20 },
{ 0x03, 0x00, 0x01, 0x0, 0x3f },
{ 0x03, 0x00, 0x01, 0x0, 0x3d },
{ 0x03, 0x00, 0x01, 0x0, 0x3b },
{ 0x03, 0x00, 0x01, 0x0, 0x39 },
};
/**************************************************
* SW control.
**************************************************/
const u16 b43_lcntab_sw_ctl_4313_epa_rev0[] = {
0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
@ -479,6 +631,32 @@ static void b43_phy_lcn_upload_static_tables(struct b43_wldev *dev)
lcntab_upload(dev, B43_LCNTAB32(0x18, 0), b43_lcntab_0x18);
}
void b43_phy_lcn_load_tx_gain_tab(struct b43_wldev *dev,
const struct b43_lcntab_tx_gain_tbl_entry *gain_table)
{
u32 i;
u32 val;
u16 pa_gain = 0x70;
if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM)
pa_gain = 0x10;
for (i = 0; i < B43_LCNTAB_TX_GAIN_SIZE; i++) {
val = ((pa_gain << 24) |
(gain_table[i].pad << 16) |
(gain_table[i].pga << 8) |
gain_table[i].gm);
b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0xc0 + i), val);
/* brcmsmac doesn't maskset, we follow newer wl here */
val = b43_lcntab_read(dev, B43_LCNTAB32(0x7, 0x140 + i));
val &= 0x000fffff;
val |= ((gain_table[i].dac << 28) |
(gain_table[i].bb_mult << 20));
b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0x140 + i), val);
}
}
/* Not implemented in brcmsmac, noticed in wl in MMIO dump */
static void b43_phy_lcn_rewrite_tables(struct b43_wldev *dev)
{
@ -499,13 +677,24 @@ static void b43_phy_lcn_clean_papd_comp_table(struct b43_wldev *dev)
b43_lcntab_write(dev, B43_LCNTAB32(0x18, i), 0x80000);
}
/* wlc_lcnphy_tbl_init */
void b43_phy_lcn_tables_init(struct b43_wldev *dev)
{
b43_phy_lcn_upload_static_tables(dev);
/* TODO: various tables ops here */
struct ssb_sprom *sprom = dev->dev->bus_sprom;
if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM &&
!(dev->dev->bus_sprom->boardflags_hi & B43_BFH_FEM_BT))
b43_phy_lcn_upload_static_tables(dev);
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
if (sprom->boardflags_lo & B43_BFL_EXTLNA)
b43_phy_lcn_load_tx_gain_tab(dev,
b43_lcntab_tx_gain_tbl_2ghz_ext_pa_rev0);
else
b43err(dev->wl,
"TX gain table unknown for this card\n");
}
if (sprom->boardflags_lo & B43_BFL_FEM &&
!(sprom->boardflags_hi & B43_BFH_FEM_BT))
b43_lcntab_write_bulk(dev, B43_LCNTAB16(0xf, 0),
ARRAY_SIZE(b43_lcntab_sw_ctl_4313_epa_rev0),
b43_lcntab_sw_ctl_4313_epa_rev0);

View file

@ -10,6 +10,8 @@
#define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT)
#define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT)
#define B43_LCNTAB_TX_GAIN_SIZE 128
u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset);
void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset,
unsigned int nr_elements, void *_data);