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ARM: mx5: check for error in ioremap

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Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Fabio Estevam 2010-12-13 10:47:05 -02:00 committed by Sascha Hauer
parent bb477de2ef
commit 28a4f908ac
5 changed files with 18 additions and 0 deletions
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4
arch/arm/mach-mx5/board-cpuimx51.c
View file

@ -178,6 +178,8 @@ static int initialize_otg_port(struct platform_device *pdev)
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
/* Set the PHY clock to 19.2MHz */ /* Set the PHY clock to 19.2MHz */
@ -196,6 +198,8 @@ static int initialize_usbh1_port(struct platform_device *pdev)
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
/* The clock for the USBH1 ULPI port will come externally from the PHY. */ /* The clock for the USBH1 ULPI port will come externally from the PHY. */

4
arch/arm/mach-mx5/board-cpuimx51sd.c
View file

@ -157,6 +157,8 @@ static int initialize_otg_port(struct platform_device *pdev)
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
/* Set the PHY clock to 19.2MHz */ /* Set the PHY clock to 19.2MHz */
@ -175,6 +177,8 @@ static int initialize_usbh1_port(struct platform_device *pdev)
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
/* The clock for the USBH1 ULPI port will come from the PHY. */ /* The clock for the USBH1 ULPI port will come from the PHY. */

4
arch/arm/mach-mx5/board-mx51_babbage.c
View file

@ -262,6 +262,8 @@ static int initialize_otg_port(struct platform_device *pdev)
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
/* Set the PHY clock to 19.2MHz */ /* Set the PHY clock to 19.2MHz */
@ -280,6 +282,8 @@ static int initialize_usbh1_port(struct platform_device *pdev)
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
/* The clock for the USBH1 ULPI port will come externally from the PHY. */ /* The clock for the USBH1 ULPI port will come externally from the PHY. */

2
arch/arm/mach-mx5/board-mx51_efikamx.c
View file

@ -148,6 +148,8 @@ static int initialize_otg_port(struct platform_device *pdev)
void __iomem *usb_base; void __iomem *usb_base;
void __iomem *usbother_base; void __iomem *usbother_base;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base)
return -ENOMEM;
usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
/* Set the PHY clock to 19.2MHz */ /* Set the PHY clock to 19.2MHz */

4
arch/arm/plat-mxc/ehci.c
View file

@ -254,6 +254,10 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
int ret = 0; int ret = 0;
usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
if (!usb_base) {
printk(KERN_ERR "%s(): ioremap failed\n", __func__);
return -ENOMEM;
}
switch (port) { switch (port) {
case 0: /* OTG port */ case 0: /* OTG port */