[MTD] NAND extended commands, badb block table autorefresh
Added extended commands for AG-AND device and added option for BBT_AUTO_REFRESH. Signed-off-by: David A. Marlin <dmarlin@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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2 changed files with 28 additions and 3 deletions
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@ -3,7 +3,7 @@
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*
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* Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
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*
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* $Id: nand_ids.c,v 1.10 2004/05/26 13:40:12 gleixner Exp $
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* $Id: nand_ids.c,v 1.11 2005/01/17 18:26:27 dmarlin Exp $
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -103,7 +103,7 @@ struct nand_flash_dev nand_flash_ids[] = {
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* Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go
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* There are more speed improvements for reads and writes possible, but not implemented now
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*/
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{"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY},
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{"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
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{NULL,}
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};
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@ -5,7 +5,7 @@
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* Steven J. Hill <sjhill@realitydiluted.com>
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* Thomas Gleixner <tglx@linutronix.de>
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*
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* $Id: nand.h,v 1.68 2004/11/12 10:40:37 gleixner Exp $
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* $Id: nand.h,v 1.69 2005/01/17 18:29:18 dmarlin Exp $
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -48,6 +48,8 @@
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* 02-08-2004 tglx added option field to nand structure for chip anomalities
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* 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
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* update of nand_chip structure description
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* 01-17-2005 dmarlin added extended commands for AG-AND device and added option
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* for BBT_AUTO_REFRESH.
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*/
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#ifndef __LINUX_MTD_NAND_H
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#define __LINUX_MTD_NAND_H
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@ -115,6 +117,25 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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#define NAND_CMD_READSTART 0x30
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#define NAND_CMD_CACHEDPROG 0x15
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/* Extended commands for AG-AND device */
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/*
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* Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
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* there is no way to distinguish that from NAND_CMD_READ0
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* until the remaining sequence of commands has been completed
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* so add a high order bit and mask it off in the command.
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*/
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#define NAND_CMD_DEPLETE1 0x100
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#define NAND_CMD_DEPLETE2 0x38
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#define NAND_CMD_STATUS_MULTI 0x71
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#define NAND_CMD_STATUS_ERROR 0x72
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/* multi-bank error status (banks 0-3) */
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#define NAND_CMD_STATUS_ERROR0 0x73
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#define NAND_CMD_STATUS_ERROR1 0x74
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#define NAND_CMD_STATUS_ERROR2 0x75
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#define NAND_CMD_STATUS_ERROR3 0x76
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#define NAND_CMD_STATUS_RESET 0x7f
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#define NAND_CMD_STATUS_CLEAR 0xff
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/* Status bits */
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#define NAND_STATUS_FAIL 0x01
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#define NAND_STATUS_FAIL_N1 0x02
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@ -170,6 +191,10 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
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/* Chip has a array of 4 pages which can be read without
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* additional ready /busy waits */
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#define NAND_4PAGE_ARRAY 0x00000040
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/* Chip requires that BBT is periodically rewritten to prevent
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* bits from adjacent blocks from 'leaking' in altering data.
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* This happens with the Renesas AG-AND chips, possibly others. */
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#define BBT_AUTO_REFRESH 0x00000080
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/* Options valid for Samsung large page devices */
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#define NAND_SAMSUNG_LP_OPTIONS \
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