drivers/rtc/rtc-stmp3xxx.c: provide timeout for potentially endless loop polling a HW bit
It's always a bad idea to poll on HW bits without a timeout. The i.MX28 RTC can be easily brought into a state in which the RTC is not running (until after a power-on-reset) and thus the status bits which are polled in the driver won't ever change. This patch prevents the kernel from getting stuck in this case. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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1 changed files with 25 additions and 10 deletions
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@ -23,6 +23,7 @@
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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#include <linux/of_device.h>
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@ -119,24 +120,39 @@ static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
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}
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#endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
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static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
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static int stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
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{
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int timeout = 5000; /* 3ms according to i.MX28 Ref Manual */
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/*
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* The datasheet doesn't say which way round the
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* NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0,
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* 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS
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* The i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
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* states:
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* | The order in which registers are updated is
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* | Persistent 0, 1, 2, 3, 4, 5, Alarm, Seconds.
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* | (This list is in bitfield order, from LSB to MSB, as they would
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* | appear in the STALE_REGS and NEW_REGS bitfields of the HW_RTC_STAT
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* | register. For example, the Seconds register corresponds to
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* | STALE_REGS or NEW_REGS containing 0x80.)
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*/
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while (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
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(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT))
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cpu_relax();
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do {
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if (!(readl(rtc_data->io + STMP3XXX_RTC_STAT) &
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(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)))
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return 0;
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udelay(1);
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} while (--timeout > 0);
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return (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
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(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)) ? -ETIME : 0;
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}
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/* Time read/write */
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static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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{
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int ret;
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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stmp3xxx_wait_time(rtc_data);
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ret = stmp3xxx_wait_time(rtc_data);
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if (ret)
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return ret;
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rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
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return 0;
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}
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@ -146,8 +162,7 @@ static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
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struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
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writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
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stmp3xxx_wait_time(rtc_data);
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return 0;
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return stmp3xxx_wait_time(rtc_data);
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}
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/* interrupt(s) handler */
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